CN207147640U - A kind of burst pulse generative circuit for single photon detection - Google Patents
A kind of burst pulse generative circuit for single photon detection Download PDFInfo
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- CN207147640U CN207147640U CN201721095131.8U CN201721095131U CN207147640U CN 207147640 U CN207147640 U CN 207147640U CN 201721095131 U CN201721095131 U CN 201721095131U CN 207147640 U CN207147640 U CN 207147640U
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Abstract
A kind of burst pulse generative circuit for single photon detection, including Low Frequency Sine Signals generator, first high-speed comparator, first delay circuit, second delay circuit, second high-speed comparator, 3rd high-speed comparator, d type flip flop and radio frequency amplification appliance, first delay circuit and the second delay circuit are RC delay circuits, the output end of first high-speed comparator connects the first delay circuit respectively, second delay circuit, first delay circuit, second delay circuit is connected respectively the second high-speed comparator, the input of 3rd high-speed comparator, the output end of radio frequency amplifier is used to export narrow pulse signal.Compared with prior art, this practicality passes through two-way RC delay circuits and the high priority of the reseting port of d type flip flop, final trigger output is depending on clock end end and the pulse signal of the relative time delay difference width of reset terminal, for single photon detection, the use of the delay chip of costliness has been abandoned, has reduced design cost.
Description
Technical field
Single photon detection technical field is the utility model is related to, more particularly to a kind of burst pulse for single photon detection is given birth to
Into circuit.
Background technology
In quantum information technology, single photon detection is indispensable, existing single photon as important part
Detection is mostly realized using avalanche photodide, when avalanche photodide detects single photon, is detected to improve
Efficiency is, it is necessary to which narrower pulse signal is detected as the enabling signal of single photon, as shown in figure 1, current narrow pulse signal
Mostly using delay chip overlap joint external circuit generation, improve the design of single photon detection due to delay chip costly
Cost.
Utility model content
The utility model purpose is to provide a kind of burst pulse generative circuit for single photon detection, to reduce single photon
The design cost of detection.
What the technical solution of the utility model was realized in:
A kind of burst pulse generative circuit for single photon detection, Low Frequency Sine Signals generator, the first high-speed comparator,
First delay circuit, the second delay circuit, the second high-speed comparator, the 3rd high-speed comparator, d type flip flop and radio frequency amplification electricity
Device, first delay circuit and the second delay circuit are RC delay circuits, the Low Frequency Sine Signals generator connection first
High-speed comparator input, the output end of first high-speed comparator connect the first delay circuit, the second delay circuit respectively,
First delay circuit, the second delay circuit are connected respectively the input of the second high-speed comparator, the 3rd high-speed comparator
End, the clock end of the output end connection d type flip flop of second high-speed comparator, the output end of the 3rd high-speed comparator connect
The reset terminal of d type flip flop is connect, the Q output of the d type flip flop connects the input of radio frequency amplifier, the radio frequency amplifier
Output end is used to export narrow pulse signal.
Preferably, the RC delay circuits include a resistance R and electric capacity C, the resistance R are serially connected in the first high-speed comparator
Between output end and the input of the second high-speed comparator or the 3rd high-speed comparator, electric capacity C one end ground connection, the other end connects
It is connected on the input of the second high-speed comparator or the 3rd high-speed comparator.
Compared with prior art, the utility model has following beneficial effect:
Burst pulse generative circuit of the present utility model for single photon detection, touched by two-way RC delay circuits and D
The high priority of the reseting port of device is sent out, final trigger output is depending on clock end end and the relative time delay difference width of reset terminal
Pulse signal, for single photon detection, abandoned the use of the delay chip of costliness, reduced design cost.
Brief description of the drawings
Fig. 1 is the burst pulse generative circuit schematic diagram of prior art;
Fig. 2 is the burst pulse generative circuit schematic diagram of single photon detection of the present utility model;
Fig. 3 is the utility model delay circuit diagram;
Fig. 4 is the timing diagram that d type flip flop exports burst pulse.
In figure:Low Frequency Sine Signals generator 1, the first high-speed comparator 2, the first delay circuit 3, the second delay circuit 4,
Second high-speed comparator 5, the 3rd high-speed comparator 6, d type flip flop 7, radio frequency amplification appliance 8.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the utility model is clearly and completely described.
As shown in Fig. 2 a kind of burst pulse generative circuit for single photon detection, Low Frequency Sine Signals generator 1, first
High-speed comparator 2, the first delay circuit 3, the second delay circuit 4, the second high-speed comparator 5, the 3rd high-speed comparator 6, D triggerings
Device 7 and radio frequency amplification appliance 8, the delay circuit 4 of the first delay circuit 3 and second is RC delay circuits, and the low frequency is just
String signal generator 1 connects the input of the first high-speed comparator 2, and the output end of first high-speed comparator 2 connects the respectively
One delay circuit 3, the second delay circuit 4, first delay circuit 3, the second delay circuit 4 are connected respectively second at a high speed
The input of comparator 5, the 3rd high-speed comparator 6, the clock of the output end connection d type flip flop 7 of second high-speed comparator 5
End, the reset terminal of the output end connection d type flip flop 7 of the 3rd high-speed comparator 6, the Q output connection of the d type flip flop 7
The input of radio frequency amplifier 8, the output end of the radio frequency amplifier 8 are used to export narrow pulse signal.It is as shown in figure 3, described
RC delay circuits include a resistance R and are serially connected in the output end of the first high-speed comparator 2 and the second high ratio with electric capacity C, the resistance R
Between input compared with the high-speed comparator 6 of device 5 or the 3rd, described electric capacity C one end ground connection, the other end be connected to the second high ratio compared with
The input of the high-speed comparator 6 of device 5 or the 3rd, the delay time of the RC delay circuits pass through formulaRepresent, wherein τ is delay time, Vin is delay input voltage, Vout is delay output voltage, R
For the capacitance that resistance R resistance, C are electric capacity C, for example, it is assumed that Vin=5V, Vout=3.5V, R=600ohm, C=8pF,
So τ ≈ 5.78ns.
Embodiment
According to above-mentioned RC delay circuits, Vin=5V, Vout=3.5V, in the first delay circuit 3, value R1=
600ohm, C=8pF, then τ ≈ 5.78ns;In the second delay circuit 4, value R1=690ohm, C=8pF, then τ ≈
4.72ns, i.e., when same signal passes through two-way delay circuit, obtained relative time delay is about 1ns, as shown in figure 4, wherein D is to make
Energy signal, clk are the clock signal being delayed by the first delay circuit 5.78ns, and R is to prolong by the second delay circuit 4.72ns
When reset signal, Q be d type flip flop output 1ns narrow pulse signals, wherein, 1ns narrow pulse signals are clk ends and reset terminal R
Relative time delay it is poor.
Comprehensive the utility model structure is understood, the burst pulse generative circuit of the present utility model for single photon detection, is led to
The high priority of the reseting port of two-way RC delay circuits and d type flip flop is crossed, final trigger output depends on clock end end
With the pulse signal of the relative time delay difference width of reset terminal, for single photon detection, the use of the delay chip of costliness has been abandoned,
Reduce design cost.
Claims (2)
1. a kind of burst pulse generative circuit for single photon detection, Low Frequency Sine Signals generator, the first high-speed comparator,
One delay circuit, the second delay circuit, the second high-speed comparator, the 3rd high-speed comparator, d type flip flop and radio frequency amplification electricity
Device, it is characterised in that first delay circuit and the second delay circuit are RC delay circuits, and the Low Frequency Sine Signals occur
Device connects the first high-speed comparator input, and the output end of first high-speed comparator connects the first delay circuit, the respectively
Two delay circuits, first delay circuit, the second delay circuit are connected respectively the second high-speed comparator, the 3rd high ratio
Compared with the input of device, the clock end of the output end connection d type flip flop of second high-speed comparator, the 3rd high-speed comparator
Output end connection d type flip flop reset terminal, the d type flip flop Q output connection radio frequency amplifier input, it is described to penetrate
The output end of audio amplifier is used to export narrow pulse signal.
2. it is used for the burst pulse generative circuit of single photon detection as claimed in claim 1, it is characterised in that the RC delays electricity
Road includes a resistance R and electric capacity C, and the resistance R is serially connected in the first high-speed comparator output end and the second high-speed comparator or the
Between the input of three high-speed comparators, described electric capacity C one end ground connection, the other end is connected to the second high-speed comparator or the 3rd high
The input of fast comparator.
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CN201721095131.8U CN207147640U (en) | 2017-08-30 | 2017-08-30 | A kind of burst pulse generative circuit for single photon detection |
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CN201721095131.8U CN207147640U (en) | 2017-08-30 | 2017-08-30 | A kind of burst pulse generative circuit for single photon detection |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108649930A (en) * | 2018-04-24 | 2018-10-12 | 虹光精密工业股份有限公司 | short pulse generating circuit |
CN111865241A (en) * | 2020-06-15 | 2020-10-30 | 芯创智(北京)微电子有限公司 | Ultra-wideband low-distortion signal processing circuit and method |
CN112421376A (en) * | 2020-11-20 | 2021-02-26 | 上海飞博激光科技有限公司 | High-power high-speed laser waveform generating device with synchronization function |
CN113296081A (en) * | 2021-05-26 | 2021-08-24 | 中国兵器工业集团第二一四研究所苏州研发中心 | On-chip narrow pulse current generation circuit suitable for array laser radar |
-
2017
- 2017-08-30 CN CN201721095131.8U patent/CN207147640U/en active Active
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108649930A (en) * | 2018-04-24 | 2018-10-12 | 虹光精密工业股份有限公司 | short pulse generating circuit |
CN108649930B (en) * | 2018-04-24 | 2022-05-03 | 虹光精密工业股份有限公司 | Short pulse generating circuit |
CN111865241A (en) * | 2020-06-15 | 2020-10-30 | 芯创智(北京)微电子有限公司 | Ultra-wideband low-distortion signal processing circuit and method |
CN111865241B (en) * | 2020-06-15 | 2024-04-12 | 芯创智(北京)微电子有限公司 | Ultra-wideband low-distortion signal processing circuit and method |
CN112421376A (en) * | 2020-11-20 | 2021-02-26 | 上海飞博激光科技有限公司 | High-power high-speed laser waveform generating device with synchronization function |
CN113296081A (en) * | 2021-05-26 | 2021-08-24 | 中国兵器工业集团第二一四研究所苏州研发中心 | On-chip narrow pulse current generation circuit suitable for array laser radar |
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