CN204836130U - General pin multiplex circuit - Google Patents
General pin multiplex circuit Download PDFInfo
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- CN204836130U CN204836130U CN201520536880.4U CN201520536880U CN204836130U CN 204836130 U CN204836130 U CN 204836130U CN 201520536880 U CN201520536880 U CN 201520536880U CN 204836130 U CN204836130 U CN 204836130U
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Abstract
The utility model relates to a general pin multiplex circuit, including connecting the multiplexing circuit module on every general input pin, a general input pin corresponds an input, its characterized in that: every multiplexing circuit module includes pull -up circuit and pull -down circuit, by control input end no. 1 and the pull -up circuit is controlled respectively to control input end no. 2 and the pull -down circuit is opened and is closed, is connected pull -up circuit and pull -down circuit on the one hand simultaneously with the input that this multiplexing circuit module corresponds, and on the other hand is continuous rather than the general input pin that corresponds. The utility model has the advantages that: save the cost, configuration input mode able to programme, the flexibility ratio is high, compatible different vehicle automobile body control module and instrument.
Description
Technical field
The utility model relates to a kind of general pin multiplexing circuit, can provide multiple input selection on single input port, belongs to automobile industry electrifies technique field.
Background technology
At present, in the various kinds of equipment of automobile at home, there is various different sensors, export electronic control module or instrument that different signals is given to vehicle body, but the external interface of electronic control module or instrument is limited, the vehicle body transducer configuration of different car is also not quite similar, and the signal of output is also different.At present, the way of the manufacturer of most domestic is all that different pin configuration is become single function pin, very expends pin resource.
Summary of the invention
The purpose of this utility model is to provide a kind of general pin multiplexing circuit that can realize multiple input modes input.
In order to achieve the above object, the technical solution of the utility model there is provided a kind of general pin multiplexing circuit, comprise the multiplex circuit module be connected on each universal input pin, a corresponding input of universal input pin, it is characterized in that: each multiplex circuit module comprises pull-up circuit and pull-down circuit, by control input end one and control input end two controls pull-up circuit respectively and pull-down circuit is opened and closed, the input corresponding with this multiplex circuit module connects pull-up circuit and pull-down circuit on the one hand simultaneously, universal input pin corresponding with it is on the other hand connected.
Preferably, described pull-up circuit comprises triode one and triode two, described control input end one is connected with the base stage of triode one via resistance R1, the base stage of triode one is also via resistance R2 ground connection, the emitter of triode one is via resistance R3 ground connection, the collector electrode of triode one connects pull-up voltage source by resistance R4 on the one hand, be connected with the base stage of triode two on the other hand, the emitter of triode two connects pull-up voltage source, and the collector electrode of triode two is connected with corresponding input via resistance R5.
Preferably, described pull-down circuit comprises field effect transistor, and aspect, described control input end 21 is connected with the grid of field effect transistor via resistance R6, on the other hand via resistance R7 ground connection, the source ground of field effect transistor, the drain electrode of field effect transistor is connected with corresponding input via described resistance R5.
Preferably, also comprise diode, the anode of diode accesses between described control input end two and described resistance R6, and the negative electrode of diode accesses between the emitter of described triode one and described resistance R3.
Principle of the present utility model is the type according to input signal, exports low and high level by single-chip microcomputer, the input mode of configure generic pin, to mate input signal, improves the utilance of input pin as much as possible.
The utility model has the advantages that: save cost, programmable configuration input mode, flexibility ratio is high, compatible different automobile body control module and instrument.
Accompanying drawing explanation
Fig. 1 is the electrical schematic diagram of a multiplex circuit module in the utility model.
Embodiment
For making the utility model become apparent, hereby with preferred embodiment, and accompanying drawing is coordinated to be described in detail below.
The utility model provides a kind of general pin multiplexing circuit, comprises the multiplex circuit module be connected on each universal input pin, a corresponding input of universal input pin.
As shown in Figure 1, each multiplex circuit module comprises pull-up circuit and pull-down circuit, by control input end one CONF_LS_UIN_1 and control input end two CONF_HS_UIN_1 controls pull-up circuit respectively and pull-down circuit is opened and closed, input IN1 mono-aspect corresponding with this multiplex circuit module connects pull-up circuit and pull-down circuit simultaneously, and universal input pin CPU_IN_1 corresponding with it is on the other hand connected.
Pull-up circuit comprises triode one Q406A and triode two Q406B, control input end one CONF_LS_UIN_1 is connected with the base stage of triode one Q406A via resistance R1, the base stage of triode one Q406A is also via resistance R2 ground connection, the emitter of triode one Q406A is via resistance R3 ground connection, the collector electrode of triode one Q406A connects pull-up voltage source V BAT_FS_UIN by resistance R4 on the one hand, be connected with the base stage of triode two Q406B on the other hand, the emitter of triode two Q406B connects pull-up voltage source V BAT_FS_UIN, the collector electrode of triode two Q406B is connected with corresponding input IN1 via resistance R5.
Pull-down circuit comprises field effect transistor Q404, CONF_HS_UIN_1 mono-aspect, control input end two is connected with the grid of field effect transistor Q404 via resistance R6, on the other hand via resistance R7 ground connection, the source ground of field effect transistor Q404, the drain electrode of field effect transistor Q404 is connected with corresponding input IN1 via resistance R5.
Between anode access control input two CONF_HS_UIN_1 of diode D402 and resistance R6, between the emitter of negative electrode access triode one Q406A of diode D402 and resistance R3.
The course of work of the present utility model is:
When control input end one, CONF_LS_UIN_1 is input as low level, control input end two CONF_HS_UIN_1 is input as high level, triode one Q406A and triode two Q406B closes, N channel enhancement field effect transistor Q404 opens, input IN1 pulled down to ground, and now universal input pin CPU_IN_1 uses as high input port.When control input end one, CONF_LS_UIN_1 is input as high level, control input end two CONF_HS_UIN_1 is input as low level, triode one Q406A and triode Q406B bis-opens, N channel enhancement field effect transistor Q404 closes, input is essentially pulled up to pull-up voltage source V BAT_FS_UIN, and now universal input pin CPU_IN_1 uses as low input port; When control input end one, CONF_LS_UIN_1 is input as low level, control input end two CONF_HS_UIN_1 is input as low level, triode one Q406A and triode two Q406B closes, N channel enhancement field effect transistor Q404 closes, input IN1 is neither pulled upward to pull-up voltage source V BAT_FS_UIN, also do not pull down to ground, now universal input pin CPU_IN_1 uses as voltage-type analog quantity port; When control input end one, CONF_LS_UIN_1 is input as high level, control input end two CONF_HS_UIN_1 is input as high level, due to the existence of switching diode D402, NPN triode Q406A emitter junction is reverse-biased, so triode one Q406A and triode two Q406B closes, and N channel enhancement field effect transistor Q404 opens, input IN1 pulled down to ground, and now universal input pin CPU_IN_1 still uses as high input port; The existence of switching diode D402 avoids circuit and occurs that pull-up circuit and pull-down circuit open the situation causing VDD-to-VSS to occur short circuit simultaneously, circuit is served to the effect of a protection.
As table 1, be software merit rating form of the present utility model, list CONF_LS_UIN_1 and CONF_HS_UIN_1 in detail under varying level, the input mode of configuration.
| Input mode | CONF_HS_UIN_1 is high | CONF_HS_UIN_1 is low |
| CONF_LS_UIN_1 is high | High input | Low input |
| CONF_LS_UIN_1 is low | High input | Voltage-type analog input |
Table 1
More than show and describe general principle of the present utility model and principal character and advantage of the present utility model.The technical staff of the industry should understand; the utility model is not restricted to the described embodiments; what describe in above-described embodiment and specification just illustrates principle of the present utility model; under the prerequisite not departing from the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.The claimed scope of the utility model is defined by appending claims and equivalent thereof.
Claims (4)
1. a general pin multiplexing circuit, comprise the multiplex circuit module be connected on each universal input pin, a corresponding input of universal input pin, it is characterized in that: each multiplex circuit module comprises pull-up circuit and pull-down circuit, by control input end one (CONF_LS_UIN_1) and control input end two (CONF_HS_UIN_1) controls pull-up circuit respectively and pull-down circuit is opened and closed, the input (IN1) corresponding with this multiplex circuit module connects pull-up circuit and pull-down circuit on the one hand simultaneously, universal input pin (CPU_IN_1) corresponding with it is on the other hand connected.
2. a kind of general pin multiplexing circuit as claimed in claim 1, it is characterized in that: described pull-up circuit comprises triode one (Q406A) and triode two (Q406B), described control input end one (CONF_LS_UIN_1) is connected with the base stage of triode one (Q406A) via resistance R1, the base stage of triode one (Q406A) is also via resistance R2 ground connection, the emitter of triode one (Q406A) is via resistance R3 ground connection, the collector electrode of triode one (Q406A) connects pull-up voltage source (VBAT_FS_UIN) by resistance R4 on the one hand, be connected with the base stage of triode two (Q406B) on the other hand, the emitter of triode two (Q406B) connects pull-up voltage source (VBAT_FS_UIN), the collector electrode of triode two (Q406B) is connected with corresponding input (IN1) via resistance R5.
3. a kind of general pin multiplexing circuit as claimed in claim 2, it is characterized in that: described pull-down circuit comprises field effect transistor (Q404), described control input end two (CONF_HS_UIN_1) is connected with the grid of field effect transistor (Q404) via resistance R6 on the one hand, on the other hand via resistance R7 ground connection, the source ground of field effect transistor (Q404), the drain electrode of field effect transistor (Q404) is connected with corresponding input (IN1) via described resistance R5.
4. a kind of general pin multiplexing circuit as claimed in claim 3, it is characterized in that: also comprise diode (D402), the anode of diode (D402) accesses between described control input end two (CONF_HS_UIN_1) and described resistance R6, between the emitter that the negative electrode of diode (D402) accesses described triode one (Q406A) and described resistance R3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520536880.4U CN204836130U (en) | 2015-07-22 | 2015-07-22 | General pin multiplex circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520536880.4U CN204836130U (en) | 2015-07-22 | 2015-07-22 | General pin multiplex circuit |
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| Publication Number | Publication Date |
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| CN204836130U true CN204836130U (en) | 2015-12-02 |
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| CN201520536880.4U Active CN204836130U (en) | 2015-07-22 | 2015-07-22 | General pin multiplex circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104993815A (en) * | 2015-07-22 | 2015-10-21 | 欧科佳（上海）汽车电子设备有限公司 | General pin multiplex circuit |
| CN108566191A (en) * | 2018-04-03 | 2018-09-21 | 擎先电子科技（苏州）有限公司 | A kind of general pin multiplexing circuit |
-
2015
- 2015-07-22 CN CN201520536880.4U patent/CN204836130U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104993815A (en) * | 2015-07-22 | 2015-10-21 | 欧科佳（上海）汽车电子设备有限公司 | General pin multiplex circuit |
| CN104993815B (en) * | 2015-07-22 | 2017-11-24 | 欧科佳（上海）汽车电子设备有限公司 | A kind of general pin multiplexing circuit |
| CN108566191A (en) * | 2018-04-03 | 2018-09-21 | 擎先电子科技（苏州）有限公司 | A kind of general pin multiplexing circuit |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |