CN203444379U - Output voltage control circuit - Google Patents
Output voltage control circuit Download PDFInfo
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- CN203444379U CN203444379U CN201320555134.0U CN201320555134U CN203444379U CN 203444379 U CN203444379 U CN 203444379U CN 201320555134 U CN201320555134 U CN 201320555134U CN 203444379 U CN203444379 U CN 203444379U
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Abstract
The utility model discloses an output voltage control circuit. Whether two voltage stabilizing chips in the circuit work is controlled by inputting logic signals, so that different kinds of output voltage can be provided for a system under different conditions. According to the output voltage control circuit, the system can operate normally, and power supply electric quantity can be saved for the system. In addition, the circuit is simple in structure and easy to achieve, and conversion of the output voltage can be accurately controlled.
Description
Technical field
The utility model relates to circuit engineering field, relates in particular to a kind of output voltage controlling circuit.
Background technology
At present, along with the renewal day by day of product, efficient power management has become one of key factor of circuit design.
Because system is under different operating state, to the demand of voltage, be different.For example, when needs are processed mass data, the voltage that use amplitude is higher, when calculated amount is little, or in holding state lower time, can be used the voltage that amplitude is lower.
If power supply provides high voltage always, may cause the waste of electric weight.If low voltage is provided always, can affect system operation, cannot carry out extensive calculation process.
Therefore, on the design field of power-efficient, one of them is exactly to provide different output voltages for the different operating situation of system now, to realize in the normal operation of assurance system, for system is saved electric quantity of power supply.
Utility model content
The utility model embodiment provides a kind of output voltage controlling circuit, for realizing in the normal operation of assurance system, for system is saved electric quantity of power supply.
A kind of output voltage controlling circuit, it is characterized in that, comprising: the first voltage input end mouth (11), second voltage input port (12), the first logic input terminal mouth (13), the second logic input terminal mouth (14) and Voltage-output port (15), the first voltage stabilizing chip (16), the second voltage stabilizing chip (17), the first logic control circuit (18) and the second logic control circuit (19);
The first port of described the first voltage stabilizing chip (16) is connected with described the first voltage input end mouth (11), and the second port of described the first voltage stabilizing chip (16) is connected with the five-port of the first logic control circuit (18); The 3rd port of described the first voltage stabilizing chip (16) is connected with described Voltage-output port (15);
The first port of described the second voltage stabilizing chip (17) is connected with described second voltage input port (12), and the second port of described the second voltage stabilizing chip (17) is connected with the five-port of described the second logic control circuit (19); The 3rd port of described the second voltage stabilizing chip (17) is connected with described Voltage-output port (15);
The first port of described the first logic control circuit (18) is connected with described the first voltage input end mouth (11), the second port of described the first logic control circuit (18) is connected with described second voltage input port (12), the 3rd port of described the first logic control circuit (18) is connected with described the first logic input terminal mouth (13), the 4th port ground connection of described the first logic control circuit (18);
The first port of described the second logic control circuit (19) is connected with the first voltage input end mouth (11), the second port of described the second logic control circuit (19) is connected with described second voltage input port (12), the 3rd port of described the second logic control circuit (19) is connected with described the second logic input terminal mouth (14), the 4th port ground connection of described the second logic control circuit (19);
Wherein, described the first logic control circuit (18) is by the first logic input terminal mouth (13) receive logic control signal, according to the logic control signal receiving, controls the whether conducting of described the first voltage stabilizing chip (16); Described the second logic control circuit (19) is by the second logic input terminal mouth (14) receive logic control signal, according to the logic control signal receiving, controls the whether conducting of described the second voltage stabilizing chip (17); When described the first voltage stabilizing chip (16) or described the second voltage stabilizing chip (17) conducting, output voltage is to described voltage output end (15).
Preferably, described the first logic control circuit (18) comprising: the first resistance (181), the second resistance (182), the 3rd resistance (183) and the first triode (184);
Described the first resistance (181) one end is connected with described the first voltage input end mouth (11), and described the first resistance (181) other end is connected with the five-port of described the first logic control circuit (18); Described the second resistance (182) one end is connected with described the first logic input terminal mouth (13), and described the second resistance (182) other end is connected with the base stage of described the first triode (184); One end of described the 3rd resistance (183) is connected with described second voltage input end (12), and described the 3rd resistance (183) other end is connected with described the first logic input terminal mouth (13); The collector of described the first triode (184) is connected with the five-port of described the first logic control circuit (18), the grounded emitter of described the first triode (184).
Preferably, described the second logic control circuit (19) comprising: the 4th resistance (191), the 5th resistance (192), the 6th resistance (193) and the second triode (194);
Described the 4th resistance (191) one end is connected with described the first voltage input end mouth (11), and described the 4th resistance (191) other end is connected with the five-port of described the second logic control circuit (19); Described the 5th resistance (192) one end is connected with described the second logic input terminal mouth (14), and described the 5th resistance (192) other end is connected with the base stage of described the second triode (194); One end of described the 6th resistance (193) is connected with described second voltage input end (12), and described the 6th resistance (193) other end is connected with described the second logic input terminal mouth (14); The collector of described the second triode (194) is connected with the five-port of described the second logic control circuit (19), the grounded emitter of described the second triode (194).
Whether the output voltage controlling circuit of the present embodiment, work by two voltage stabilizing chips in input logic signal control circuit, take under different situations as system provides different output voltages.Realization is in the normal operation of assurance system, for system is saved electric quantity of power supply.And circuit structure is simple, realize easily, can control comparatively exactly the conversion of output voltage.
Other features and advantages of the utility model will be set forth in the following description, and, partly from instructions, become apparent, or understand by implementing the utility model.The purpose of this utility model and other advantages can be realized and be obtained by specifically noted structure in the instructions write, claims and accompanying drawing.
Below by drawings and Examples, the technical solution of the utility model is described in further detail.
Accompanying drawing explanation
Accompanying drawing is used to provide further understanding of the present utility model, and forms a part for instructions, is used from explanation the utility model with embodiment mono-of the present utility model, does not form restriction of the present utility model.In the accompanying drawings:
Fig. 1 is the structural representation of output voltage controlling circuit in the utility model embodiment;
Fig. 2 is the electrical block diagram of the first logic control circuit in the utility model embodiment;
Fig. 3 is the electrical block diagram of the second logic control circuit in the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing, preferred embodiment of the present utility model is described, should be appreciated that preferred embodiment described herein is only for description and interpretation the utility model, and be not used in restriction the utility model.
Because system is under different operating state, to the demand of voltage, be different.The utility model provides a kind of can realize the conversion to electric power output voltage simply, quickly and accurately.
As shown in Figure 1, the output voltage controlling circuit of the utility model embodiment, comprising:
The first voltage input end mouth 11, second voltage input port 12, the first logic input terminal mouth 13, the second logic input terminal mouth 14 and Voltage-output port 15, the first voltage stabilizing chip 16, the second voltage stabilizing chip 17, the first logic control circuit 18 and the second logic control circuit 19.
The first port P61 of the first voltage stabilizing chip 16 is connected with the first voltage input end mouth 11, and the second port P62 of the first voltage stabilizing chip 16 is connected with the five-port P85 of the first logic control circuit 18; The 3rd port P63 of the first voltage stabilizing chip 16 is connected with Voltage-output port 15;
The first port P71 of the second voltage stabilizing chip 17 is connected with second voltage input port 12, and the second port P72 of the second voltage stabilizing chip 17 is connected with the five-port P95 of the second logic control circuit 19; The 3rd port P73 of the second voltage stabilizing chip 17 is connected with Voltage-output port 15;
The first port P81 of the first logic control circuit 18 is connected with the first voltage input end mouth 11, the second port P82 of the first logic control circuit 18 is connected with second voltage input port 12, the 3rd port P83 of the first logic control circuit 18 is connected with the first logic input terminal mouth 13, the 4th port P84 ground connection of the first logic control circuit 18;
The first port P91 of the second logic control circuit 19 is connected with the first voltage input end mouth 11, the second port P92 of the second logic control circuit 19 is connected with second voltage input port 12, the 3rd port P93 of the second logic control circuit 19 is connected with the second logic input terminal mouth 14, the 4th port P94 ground connection of the second logic control circuit 19;
Wherein, the first logic control circuit 18 is by the first logic input terminal mouth 13 receive logic control signals, according to the logic control signal receiving, controls the whether conducting of the first voltage stabilizing chip 16; The second logic control circuit 19 is by the second logic input terminal mouth 14 receive logic control signals, according to the logic control signal receiving, controls the whether conducting of the second voltage stabilizing chip 17; When the first voltage stabilizing chip 16 or the second voltage stabilizing chip 17 conducting, output voltage is to voltage output end 15.
Preferably, as shown in Figure 2, the first logic control circuit 18 comprises: the first resistance 181, the second resistance 182, the 3rd resistance 183 and the first triode 184.
Preferably, as shown in Figure 3, the second logic control circuit 19 comprises: the 4th resistance 191, the 5th resistance 192, the 6th resistance 193 and the second triode 194.
The 4th resistance 191 one end are connected with the first voltage input end mouth 11, and the 4th resistance 191 other ends are connected with the five-port of the second logic control circuit 19; The 5th resistance 192 one end are connected with the second logic input terminal mouth 14, and the 5th resistance 192 other ends are connected with the base stage of the second triode 194; One end of the 6th resistance 193 is connected with second voltage input end 12, and the 6th resistance 193 other ends are connected with the second logic input terminal mouth 14; The collector of the second triode 194 is connected with the five-port of the second logic control circuit 19, the grounded emitter of the second triode 194.
Below the specific works principle of the output voltage controlling circuit of the utility model embodiment is described.
Under different operating state, system is different to the demand of voltage.System can be operated in two kinds of voltage modes, and 3.3V and 5V, when needs are processed mass data, are used 5V voltage, when calculated amount is little, or in holding state lower time, uses 3.3V voltage.
It is 0 or 1 that logic control signal is set, and controls respectively one of them conducting in 2 voltage stabilizing chips, and the voltage of corresponding amplitude is provided.
In the present embodiment, the first voltage input end mouth 11 input voltages are 5V, and second voltage input port 12 input voltages are 3.3V.
As shown in table 1 below, when the first logic input terminal mouth 13 receive logic control signals are that the logic control signal that 0, the second logic input terminal mouth 14 receives is 1.Being equivalent to provides a low level in the base stage of the first triode 184, the first triode 184 is opened, collector, the emitter current of the first triode 184 are 0, are equivalent to the off-state of switch between collector and emitter, and the first triode 184 works in cut-off region; Base stage at the second triode 194 provides a high level, the second triode 194 closures, and the collector and emitter of the second triode 194 has electric current, is equivalent to the conducting state of switch between collector and emitter, and the second triode 194 works in saturation region.
Because the first triode 184 works in cut-off region, at the second port P62 of the first voltage stabilizing chip 16, by the first resistance 181, obtain a high level, make the first voltage stabilizing chip 16 conductings; And the second triode 194 works in saturation region, due to the shunting of triode, the second port P72 making at the second voltage stabilizing chip 17 obtains a low level, and the second voltage stabilizing chip 17 is closed., therefore, the voltage of exporting at Voltage-output port 15 is 5V.
In like manner, when the first logic input terminal mouth 13 receive logic control signals are that the logic control signal that 1, the second logic input terminal mouth 14 receives is 0 o'clock, being equivalent to provides a high level in the base stage of the first triode 184, the first triode 184 closures; Base stage at the second triode 194 provides a low level, and the second triode 194 is opened.The first voltage stabilizing chip 16 is closed, the second voltage stabilizing chip 17 conductings, the voltage of exporting at Voltage-output port 15 is 3.3V.
Table 1
| The first logic input terminal mouth | The second logic input terminal mouth | Voltage output end |
| 0 | 1 | 5V |
| 1 | 0 | 3.3V |
Whether the output voltage controlling circuit of the utility model embodiment, work by two voltage stabilizing chips in input logic signal control circuit, take under different situations as system provides different output voltages.Realization is in the normal operation of assurance system, for system is saved electric quantity of power supply.And circuit structure is simple, realize easily, can control comparatively exactly the conversion of output voltage.
Obviously, those skilled in the art can carry out various changes and modification and not depart from spirit and scope of the present utility model the utility model.Like this, if within of the present utility model these are revised and modification belongs to the scope of the utility model claim and equivalent technologies thereof, the utility model is also intended to comprise these changes and modification interior.
Claims (3)
1. an output voltage controlling circuit, it is characterized in that, comprising: the first voltage input end mouth (11), second voltage input port (12), the first logic input terminal mouth (13), the second logic input terminal mouth (14) and Voltage-output port (15), the first voltage stabilizing chip (16), the second voltage stabilizing chip (17), the first logic control circuit (18) and the second logic control circuit (19);
The first port of described the first voltage stabilizing chip (16) is connected with described the first voltage input end mouth (11), and the second port of described the first voltage stabilizing chip (16) is connected with the five-port of the first logic control circuit (18); The 3rd port of described the first voltage stabilizing chip (16) is connected with described Voltage-output port (15);
The first port of described the second voltage stabilizing chip (17) is connected with described second voltage input port (12), and the second port of described the second voltage stabilizing chip (17) is connected with the five-port of described the second logic control circuit (19); The 3rd port of described the second voltage stabilizing chip (17) is connected with described Voltage-output port (15);
The first port of described the first logic control circuit (18) is connected with described the first voltage input end mouth (11), the second port of described the first logic control circuit (18) is connected with described second voltage input port (12), the 3rd port of described the first logic control circuit (18) is connected with described the first logic input terminal mouth (13), the 4th port ground connection of described the first logic control circuit (18);
The first port of described the second logic control circuit (19) is connected with the first voltage input end mouth (11), the second port of described the second logic control circuit (19) is connected with described second voltage input port (12), the 3rd port of described the second logic control circuit (19) is connected with described the second logic input terminal mouth (14), the 4th port ground connection of described the second logic control circuit (19);
Wherein, described the first logic control circuit (18) is by the first logic input terminal mouth (13) receive logic control signal, according to the logic control signal receiving, controls the whether conducting of described the first voltage stabilizing chip (16); Described the second logic control circuit (19) is by the second logic input terminal mouth (14) receive logic control signal, according to the logic control signal receiving, controls the whether conducting of described the second voltage stabilizing chip (17); When described the first voltage stabilizing chip (16) or described the second voltage stabilizing chip (17) conducting, output voltage is to described voltage output end (15).
2. circuit according to claim 1, is characterized in that, described the first logic control circuit (18) comprising: the first resistance (181), the second resistance (182), the 3rd resistance (183) and the first triode (184);
Described the first resistance (181) one end is connected with described the first voltage input end mouth (11), and described the first resistance (181) other end is connected with the five-port of described the first logic control circuit (18); Described the second resistance (182) one end is connected with described the first logic input terminal mouth (13), and described the second resistance (182) other end is connected with the base stage of described the first triode (184); One end of described the 3rd resistance (183) is connected with described second voltage input end (12), and described the 3rd resistance (183) other end is connected with described the first logic input terminal mouth (13); The collector of described the first triode (184) is connected with the five-port of described the first logic control circuit (18), the grounded emitter of described the first triode (184).
3. circuit according to claim 1, is characterized in that, described the second logic control circuit (19) comprising: the 4th resistance (191), the 5th resistance (192), the 6th resistance (193) and the second triode (194);
Described the 4th resistance (191) one end is connected with described the first voltage input end mouth (11), and described the 4th resistance (191) other end is connected with the five-port of described the second logic control circuit (19); Described the 5th resistance (192) one end is connected with described the second logic input terminal mouth (14), and described the 5th resistance (192) other end is connected with the base stage of described the second triode (194); One end of described the 6th resistance (193) is connected with described second voltage input end (12), and described the 6th resistance (193) other end is connected with described the second logic input terminal mouth (14); The collector of described the second triode (194) is connected with the five-port of described the second logic control circuit (19), the grounded emitter of described the second triode (194).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320555134.0U CN203444379U (en) | 2013-09-06 | 2013-09-06 | Output voltage control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320555134.0U CN203444379U (en) | 2013-09-06 | 2013-09-06 | Output voltage control circuit |
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| CN203444379U true CN203444379U (en) | 2014-02-19 |
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| CN201320555134.0U Expired - Fee Related CN203444379U (en) | 2013-09-06 | 2013-09-06 | Output voltage control circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103488221A (en) * | 2013-09-06 | 2014-01-01 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103488221A (en) * | 2013-09-06 | 2014-01-01 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
| CN103488221B (en) * | 2013-09-06 | 2015-05-13 | 天脉聚源(北京)传媒科技有限公司 | Output voltage control circuit |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: An output voltage control circuit Effective date of registration: 20210104 Granted publication date: 20140219 Pledgee: Inner Mongolia Huipu Energy Co.,Ltd. Pledgor: TVMINING (BEIJING) MEDIA TECHNOLOGY Co.,Ltd. Registration number: Y2020990001527 |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140219 Termination date: 20210906 |