CN204631463U - A kind of gps clock synchro system of radiation source Monitoring and Positioning - Google Patents
A kind of gps clock synchro system of radiation source Monitoring and Positioning Download PDFInfo
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Abstract
The utility model discloses a kind of gps clock synchro system of radiation source Monitoring and Positioning, comprise: programmable gate array FPGA circuit board and connected digital signal processor DSP, wherein, FPGA circuit board is connected with GPS and pressure controlled constant tempeature crystal oscillator VCOCXO, wherein, described FPGA circuit board is provided with: decoder module, time data integrate module, display/output module, time interval measurement module, frequency divider, D/A converter, and described GPS receives the signal that GPS transmits, and pass to time interval measurement module in the mode of 1PPS, serial time information is passed to decoder module by described GPS, time information is passed to time data integrate module by described decoder module, described time data module will export to display/output module constantly.
Description
Technical field
The utility model relates to a kind of gps clock synchro system of radiation source Monitoring and Positioning.
Background technology
At present, along with the develop rapidly of wireless communication cause, China has built a large amount of communications facilitys, limited frequency resource is very nervous, interference between various communication system happens occasionally, and therefore needs to monitor electromagnetic environment, understands the electromagnetic environment situation of key area in time, find and eliminate interference, ensureing that communication system is unimpeded.
Want Timeliness coverage interference source must locate accurately it, positioning using TDOA (TDOA) technology conventional at present, multiple outdoor version monitoring receiver is networked, synchronous scanning is carried out to same radiation source, obtain with time target time domain data, utilize time difference position technolot to estimate the position of radiation source after time domain data being converged to computing center.And the height of positioning precision and time target accuracy and each synchronization extent of network between monitoring receiver have close relationship, what therefore will obtain that accurate positioning result must to ensure between each networking monitoring receiver highly is synchronous.
To realize synchronously namely carrying out unified time service to each monitoring receiver between each networking monitoring receiver to make it to reach precise synchronization with universal time.With atomic clock, caesium clock etc., common time dissemination system can ensure that the time of instrument and universal time reach precise synchronization, but they expensive and carrying is inconvenient, be not suitable for using in monitoring net.At present, many Computerized monitor system, data acquisition system (DAS), catenet equipment, mobile communication networks applied mostly have employed GPS standard time clock, to guarantee that the time of whole system has the consistance of height, in order to avoid the unpredictability mistake caused due to the inconsistent of time occurs system.Especially in some data acquisition system (DAS) fields, in order to collect the different pieces of information of synchronization in different geographic areas, and then data analysis is drawn correct conclusion, this just requires that each acquisition system keeps the consistance of height in time, otherwise what obtain will be incorrect conclusion.
Utility model content
The utility model is by external time (GPS) benchmark, the pulse per second (PPS) that the frequency of local crystal oscillator and frequency division produce is measured and corrected, obtains the pps pulse per second signal consistent with universal time and temporal information thus utilize these information to locate accurately radiation source.
It is as follows that the utility model solves the problems of the technologies described above taked technical scheme:
A kind of gps clock synchro system of radiation source Monitoring and Positioning, comprise: programmable gate array FPGA circuit board and connected digital signal processor DSP, wherein, FPGA circuit board is connected with GPS and pressure controlled constant tempeature crystal oscillator VCOCXO, wherein, described FPGA circuit board is provided with: decoder module, time data integrate module, display/output module, time interval measurement module, frequency divider, D/A converter, and described GPS receives the signal that GPS transmits, and pass to time interval measurement module in the mode of 1PPS, serial time information is passed to decoder module by described GPS, time information is passed to time data integrate module by described decoder module, described time data module will export to display/output module constantly.
Further, preferably, establish in described digital signal processor DSP time difference processing module and second signal skew master module, and described time data integrate module connects described time difference processing module, described time difference processing module connects signal skew master module described second, and described second, signal skew master model calling was to described D/A converter.
Further, preferably, described D/A converter connects described pressure controlled constant tempeature crystal oscillator VCOCXO, and described pressure controlled constant tempeature crystal oscillator VCOCXO is connected to described frequency divider, output one end of described frequency divider connects display/output module, and one end is connected to time interval measurement module.
This patent is applied to the location to interference source in monitoring receiver network, and the location for interference source provides accurate standard time information.Meanwhile, the system based on this patent can be applied to as TT&C system when spaceflight TT&C system and strategic missile, conventional weapon are tested provides time reference signal and standard-frequency signal.
Other features and advantages of the utility model will be set forth in the following description, and, partly become apparent from instructions, or understand by implementing the utility model.The purpose of this utility model and other advantages realize by structure specifically noted in write instructions, claims and accompanying drawing and obtain.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the utility model is described in detail, to make above-mentioned advantage of the present utility model definitely.
Fig. 1 is the time service calibrating frequency system chart of the gps clock synchro system of the utility model radiation source Monitoring and Positioning;
The time synchronized module of the gps clock synchro system of Fig. 2 the utility model radiation source Monitoring and Positioning;
The frequency-modulating process process flow diagram of the gps clock synchro system of Fig. 3 the utility model radiation source Monitoring and Positioning;
The pulse per second (PPS) calibration block diagram of the gps clock synchro system of Fig. 4 the utility model radiation source Monitoring and Positioning.
Embodiment
Below in conjunction with specific embodiment, the utility model is described in detail.
The GPS synchro system of the utility model introduction is the time service calibrating frequency system of calibrating local crystal oscillator output frequency based on external time reference.Mainly by external time (GPS) benchmark, the pulse per second (PPS) that frequency and the frequency division of local crystal oscillator produce is measured and corrected, obtain the pps pulse per second signal consistent with universal time and 100MHz rate-adaptive pacemaker accurately, the output carrying out alternative local crystal oscillator provides correct time standard and frequency standard, wherein, the writing a Chinese character in simplified form so 1pps=1Hz=1 time/second of PPS:pulse per second.
The technical scheme that the utility model uses mainly comprises following three parts.
Time interval measurement: phase demodulation process is carried out in the pulse per second (PPS) that the pulse per second (PPS) exported GPS by FPGA and local crystal oscillation fractional frequency are produced, and obtains the mistiming.
Pps pulse per second signal GPS_1pps GPS received is as start signal, produce after local crystal oscillation fractional frequency second signal local_1s as termination signal, this two pulse signals input FPGA is compared, realizes the time interval metering of receiver pulse per second (PPS) and local crystal oscillator pulse per second (PPS) with the counter that frequency is 100MHz.
When GPS pulse per second (PPS) rising edge arrival hour counter starts counting, when local crystal oscillator pulse per second (PPS) rising edge arrives, counting stops, and the time interval of two rising edges is exactly the mistiming of local oscillator to GPS pulse per second (PPS).Final measurement result maximum error is 10ns.
The time difference processes:
Certain randomized jitter is carved with due to during gps system that the pulse per second (PPS) rising edge of GPS is relatively accurate, therefore the time interval recorded and the time difference can not be directly used to carry out time synchronized, in order to eliminate the impact of this stochastic error, must the time interval data recorded be processed.Here the least squares line fitting algorithm of improvement is adopted to carry out filtering process to data.
Before doing least square fitting to these data, we first do some preliminary process to phase demodulation data, reject outlier, can make to obtain estimated value so more accurate.
Suppose that phase demodulation array distributes as follows, array length b, array quantity a, phase demodulation initial value S, difference y (equidirectional race per second y),
Array first element array_phase0 [0]:
Phase demodulation value per second: S; S+y; S+2y; ...; S+ (b-1) y. has b altogether,
Be added, and remove minimax two values, accumulative and " array_phase0 [0] "=(b-2) S+bby/2-3by/2+y.
Array second element array_phase0 [1]:
Phase demodulation value per second: S+by; S+by+y; S+by+2y; ...; S+by+ (b-1) y. has b altogether,
Be added, and remove minimax two values, accumulative and " array_phase0 [1] "=(b-2) (S+by)+bby/2-3by/2+y.
Array the 3rd element array_phase0 [2]:
Phase demodulation value per second: S+2by; S+2by+y; S+2by+2y; ...; S+2by+ (b-1) y. has b altogether,
Be added, and remove minimax two values, accumulative and " array_phase0 [2] "=(b-2) (S+2by)+bby/2-3by/2+y.
Last element of array array_phase0 [a-1]:
Phase demodulation value per second: S+ (a-1) by; S+ (a-1) by+y; S+ (a-1) by+2y; ...; S+ (a-1) by+ (b-1) y. has b altogether,
Be added, and remove minimax two values, accumulative and " array_phase0 [a-1] "=(b-2) (S+ (a-1) by) ++ bby/2-3by/2+y.
Array all accumulative and, no longer additionally remove the maximin of array, obtain following formula and=(aabb/2-aab-ab/2+a) y+ (ab-2a) S
Data after these being processed are preserved for future use.
The algorithm idea of least squares line fitting:
To the one group of data meeting y'=Kx+B, by minimum K and B obtaining the best of quadratic sum of the deviation of actual point and Points on Straight Line measured.Wherein B is initial difference, and K is the rate of change of phase differential, by the estimated value to K and B, can obtain the estimated value of phase differential between GPS pulse per second (PPS) and local clock signal second.
For the estimated value of phase differential in relational expression
derive as follows:
Wherein in above formula, x is time series, and y' is actual phase difference sequence; Be known array, substitute into the estimated value that formula can obtain K and B
with
will
with
the data processing corresponded to above can obtain in deriving
with
corresponding respectively
with
obtained by least square fitting formula, therefore can obtain variable quantity and the frequency difference of one second difference of the phase demodulation array after matching
phase demodulation initial value
This estimated value has reduced the randomized jitter in phase differential, obtains relatively real phase differential.
Second signal skew master.Second, signal skew master was made up of frequency calibration and pulse per second (PPS) synchronous calibration two parts.
Frequency calibration part.
In the frequency calibration stage, the frequency division pulse per second (PPS) of high stability crystal oscillator starts the 1PPS following the tracks of external time reference.Now owing to there is certain phase differential, and the Control of Voltage terminal voltage of high stability crystal oscillator is not yet set up, also there is certain deviation in the frequency of high stability crystal oscillator, this stage goes the voltage-controlled end adjusting local VCXO to carry out the calibration of frequency mainly through the controlled quentity controlled variable changing DAC, and successive elimination phase differential.
The judgement carrying out frequency lead and lag is needed before frequency difference is adjusted, the mode of frequency regulation that different situations is corresponding different, in order to reduce the judgement complicacy of frequency lead-lag, what in time interval measurement module, we were artificial is delayed a regular time T by local pps pulse per second signal, all the time think that local pulse per second (PPS) lags behind standard second pulse, therefore three kinds of situations are divided into when determination frequency lead-lag
Frequency difference >0 is frequency hysteresis;
Frequency difference <0 is that frequency is advanced;
Frequency difference=0 is that frequency is equal;
We according to this relation, just can formulate the control strategy of DAC value after obtaining the real lead lag relationship of frequency.
DAC coarse adjustment:
Define a constant EPSILON, value is 1 here, and before the frequency difference value y that time difference processing module obtains falls into this interval, we carry out coarse adjustment, and the reference model of coarse adjustment is
DacValue＝DacValue+K*y
When initial time y is very large, the value adjustment of DAC is more, and approaching along with frequency, y restrains gradually, and DacValue also tends towards stability.It is noted herein that Proportional coefficient K, K value value is less, and the slope of adjustment is slower, and corresponding locking time is longer; K value value is larger, steeper slopes, and locking time is shorter, if K value is excessive in theory, then can not restrain, concussion.
DAC finely tunes:
Because variation of ambient temperature causes the frequency drift of local crystal oscillator, can not think that frequency difference is adjusted to 0 has once been exactly real locking.We also need to finely tune on this basis.When the absolute value of y is less than or equal to EPSILON, enter fine setting flow process, reference model is
DacValue＝DacValue±D
Stepping accuracy D is less, and shake should be less in theory, but temperature variation causes drift frequently, and less stepping accuracy not necessarily can follow the tracks of the change of upper frequency, and after adjustment several times, y may exceed the scope of EPSILON, becomes coarse adjustment again.If suppose that the frequency of DAC value and crystal oscillator is linear proportional example relation, so DAC stepping 1, the frequency of adjustment should be ± △ f* (1/4095), △ f are crystal oscillator adjustable frequency scope.If stepping accuracy D value is excessive, accurate adjustment can be made again to shake and to strengthen, not reach the effect of accurate adjustment.
Locking judges:
When y first time fall into EPSILON interval time, difference on the frequency remains existence, needing through repeatedly adjusting, just can approach the point that frequency is identical.If now adopt fine setting strategy immediately, convergence time can become very long.
Therefore define a y and fall into the interval number of times (constant DAC_LOCK_NUM) of EPSILON, after judging that y is continuous and falling into EPSILON interval for DAC_LOCK_NUM time, we think that frequency has really locked.And in the process, still adopt coarse adjustment strategy.
Pulse per second (PPS) synchronous calibration.Pulse per second (PPS) synchronous calibration is made up of counter, comparer and frequency counter.Its Counter is at beginning timing counting, corrected value and counter export numerical value and compare, if counter output valve is less than value to be corrected, comparison module exports as low level, frequency counter does not work, produce pps pulse per second signal stop and keeping present condition, pps pulse per second signal is just equivalent to be delayed backward.When counter output valve is more than or equal to value to be corrected, frequency counter works on, and supposes that corrected value is n, and the pulse per second (PPS) at this time exported is equivalent to be delayed n clock period backward.If counter with adopting 100MHz clock, is then delayed n × 10ns backward.Frequency counter is for generation of signal second after correction.
For this reason, as Figure 1-4, a kind of gps clock synchro system of radiation source Monitoring and Positioning, comprise: programmable gate array FPGA circuit board and connected digital signal processor DSP, wherein, FPGA circuit board is connected with GPS and pressure controlled constant tempeature crystal oscillator VCOCXO, wherein, described FPGA circuit board is provided with: decoder module, time data integrate module, display/output module, time interval measurement module, frequency divider, D/A converter, and described GPS receives the signal that GPS transmits, and pass to time interval measurement module in the mode of 1PPS, serial time information is passed to decoder module by described GPS, time information is passed to time data integrate module by described decoder module, described time data module will export to display/output module constantly.
Further, preferably, establish in described digital signal processor DSP time difference processing module and second signal skew master module, and described time data integrate module connects described time difference processing module, described time difference processing module connects signal skew master module described second, and described second, signal skew master model calling was to described D/A converter.
Further, preferably, described D/A converter connects described pressure controlled constant tempeature crystal oscillator VCOCXO, and described pressure controlled constant tempeature crystal oscillator VCOCXO is connected to described frequency divider, output one end of described frequency divider connects display/output module, and one end is connected to time interval measurement module.
This patent is applied to the location to interference source in monitoring receiver network, and the location for interference source provides accurate standard time information.Meanwhile, the system based on this patent can be applied to as TT&C system when spaceflight TT&C system and strategic missile, conventional weapon are tested provides time reference signal and standard-frequency signal.
In a specific embodiment, specifically comprise:
Time interval measurement.The pulse per second (PPS) that local crystal oscillation fractional frequency produces and the pulse per second (PPS) two paths of signals that GPS is received by gps antenna are sent in FPGA, carry out the measurement in phase demodulation and the time interval in FPGA.
The pre-service of time difference data:
Every 50s is one-period, obtain 50 phase demodulation values, pass to DSP respectively, carry out time difference process in dsp, these 50 phase demodulation values are divided into 5 groups, often organizing length is 10, a and b in the corresponding time difference Processing Algorithm of here 5 and 10 difference, simulates the estimated value of COEFFICIENT K and B in y'=Kx+B with least square fitting algorithm
with
corresponding respectively
variable quantity and the frequency difference of one second difference of the phase demodulation array after matching can be obtained thus
phase demodulation initial value
this estimated value has reduced the randomized jitter in phase differential, obtains the relative frequency difference of more real phase differential and correspondence.
3. frequency calibration:
Carry out frequency calibration in dsp, define a constant EPSILON, before the frequency difference value y that time difference processing module obtains falls into this interval, we carry out coarse adjustment, the reference model of coarse adjustment is DacValue=DacValue+K*y, when the absolute value of y is less than or equal to EPSILON, enter fine setting flow process, reference model is DacValue=DacValue ± D.Define a y and fall into the interval number of times (constant DAC_LOCK_NUM) of EPSILON, after judging that y is continuous and falling into EPSILON interval for DAC_LOCK_NUM time, we think that frequency has really locked.And in the process, still adopt coarse adjustment strategy.Carry out cumulative adjustment with this frequency modulation method to DAC, DAC transfers adjustment amount to voltage-controlled end that analog quantity delivers to VCXO by digital quantity and carries out frequency calibration to crystal oscillator, makes the frequency values of crystal oscillator progressively reach standard frequency.
4. pulse per second (PPS) calibration:
Pulse per second (PPS) calibration is carried out while frequency calibration, start to count frequency when calibrating signal is effective, the output valve of counter and corrected value are compared, if counter output valve is less than value to be corrected, comparison module exports as low level, frequency counter does not work, and produce pps pulse per second signal and stop and keeping present condition, pps pulse per second signal is just equivalent to be delayed backward.When counter output valve is more than or equal to value to be corrected, frequency counter works on, and supposes that corrected value is n, and the pulse per second (PPS) at this time exported is equivalent to be delayed n clock period backward.
Last it is noted that the foregoing is only preferred embodiment of the present utility model, be not limited to the utility model, although be described in detail the utility model with reference to previous embodiment, for a person skilled in the art, it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature.All within spirit of the present utility model and principle, any amendment done, equivalent replacement, improvement etc., all should be included within protection domain of the present utility model.
Claims (3)
1. the gps clock synchro system of a radiation source Monitoring and Positioning, it is characterized in that, comprise: programmable gate array FPGA circuit board and connected digital signal processor DSP, wherein, FPGA circuit board is connected with GPS and pressure controlled constant tempeature crystal oscillator VCOCXO, wherein, described FPGA circuit board is provided with: decoder module, time data integrate module, display/output module, time interval measurement module, frequency divider, D/A converter, and described GPS receives the signal that GPS transmits, and pass to time interval measurement module in the mode of 1PPS, serial time information is passed to decoder module by described GPS, time information is passed to time data integrate module by described decoder module, described time data module will export to display/output module constantly.
2. the gps clock synchro system of radiation source Monitoring and Positioning according to claim 1, it is characterized in that, establish in described digital signal processor DSP time difference processing module and second signal skew master module, and described time data integrate module connects described time difference processing module, described time difference processing module connects signal skew master module described second, and described second, signal skew master model calling was to described D/A converter.
3. the gps clock synchro system of radiation source Monitoring and Positioning according to claim 1 and 2, it is characterized in that, described D/A converter connects described pressure controlled constant tempeature crystal oscillator VCOCXO, described pressure controlled constant tempeature crystal oscillator VCOCXO is connected to described frequency divider, output one end of described frequency divider connects display/output module, and one end is connected to time interval measurement module.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105549379A (en) * | 2015-12-23 | 2016-05-04 | 中国电子科技集团公司第四十一研究所 | Synchronous measurement apparatus based on high precision time reference triggering and method thereof |
| CN109541553A (en) * | 2018-11-28 | 2019-03-29 | 四川九洲电器集团有限责任公司 | A kind of synchronised clock feed circuit |
| CN109839838A (en) * | 2017-11-29 | 2019-06-04 | 中国科学院沈阳自动化研究所 | It is synchronized and integrating device of meeting an urgent need from principal mode submersible high-accuracy self-adaptation |
| CN110176982A (en) * | 2019-04-19 | 2019-08-27 | 中国计量科学研究院 | Single channel temporal frequency high-precision transfer device |
| CN111399418A (en) * | 2020-03-30 | 2020-07-10 | 中国电子科技集团公司第五十四研究所 | Low-power-consumption power-off time-keeping module |
| CN111490777A (en) * | 2019-01-29 | 2020-08-04 | 大唐移动通信设备有限公司 | Crystal oscillator frequency detection method and device |
| CN113885305A (en) * | 2021-09-10 | 2022-01-04 | 中国电波传播研究所（中国电子科技集团公司第二十二研究所） | Completely autonomous controllable rapid time frequency synchronization device and method |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105549379A (en) * | 2015-12-23 | 2016-05-04 | 中国电子科技集团公司第四十一研究所 | Synchronous measurement apparatus based on high precision time reference triggering and method thereof |
| CN109839838A (en) * | 2017-11-29 | 2019-06-04 | 中国科学院沈阳自动化研究所 | It is synchronized and integrating device of meeting an urgent need from principal mode submersible high-accuracy self-adaptation |
| CN109541553A (en) * | 2018-11-28 | 2019-03-29 | 四川九洲电器集团有限责任公司 | A kind of synchronised clock feed circuit |
| CN111490777A (en) * | 2019-01-29 | 2020-08-04 | 大唐移动通信设备有限公司 | Crystal oscillator frequency detection method and device |
| CN110176982A (en) * | 2019-04-19 | 2019-08-27 | 中国计量科学研究院 | Single channel temporal frequency high-precision transfer device |
| CN110176982B (en) * | 2019-04-19 | 2021-12-03 | 中国计量科学研究院 | Single-channel time frequency high-precision transmission device |
| CN111399418A (en) * | 2020-03-30 | 2020-07-10 | 中国电子科技集团公司第五十四研究所 | Low-power-consumption power-off time-keeping module |
| CN113885305A (en) * | 2021-09-10 | 2022-01-04 | 中国电波传播研究所（中国电子科技集团公司第二十二研究所） | Completely autonomous controllable rapid time frequency synchronization device and method |
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