CN203659915U - Led封装基板 - Google Patents

Led封装基板 Download PDF

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CN203659915U
CN203659915U CN201320728588.3U CN201320728588U CN203659915U CN 203659915 U CN203659915 U CN 203659915U CN 201320728588 U CN201320728588 U CN 201320728588U CN 203659915 U CN203659915 U CN 203659915U
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cup unit
base plate
packaging
led
concave cup
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王冬雷
王洪贯
庄灿阳
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WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd
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WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19Manufacturing methods of high density interconnect preforms
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01ELECTRIC ELEMENTS
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92244Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device

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Abstract

LED封装基板,封装基板包括放置LED芯片的凹杯单元,所述凹杯单元由透明底板和透明侧壁组成,底板和侧壁内含有荧光粉颗粒,凹杯单元的竖截面形状呈凵形。本实用新型采用如玻璃、环氧树脂、硬硅胶等透明材料混合荧光粉制成凹杯单元,将透明材质构成的主材料进行加热至呈现熔融状态或液态;向主材料中加入荧光粉,混合均匀;采用模具将混合有荧光粉的熔融状态或液态的主材料模压成型,形成放置LED芯片的凹杯单元,或将混合有荧光粉的主材料成型为平板状,采用蚀刻工艺在平板状主材料上形成凹杯单元,使凹杯单元具有良好的透光性,封装于凹杯单元内的LED芯片能透过凹杯单元的每个面出光,提高LED器件的出光率。

Description

LED封装基板
技术领域
本实用新型属于半导体发光器件技术领域,尤其涉及一种LED芯片的封装基板。
背景技术
半导体发光器件,如发光二极管(LED)或激光二极管等在很多领域中已被广泛使用。半导体发光器件的出现带来了能覆盖可见光谱以及更高的发光效率和固态稳定的光源。
目前LED芯片主要采用支架封装或基板封装。如图1所示,为采用支架封装的LED器件的结构示意图。支架封装LED器件包括封装支架100、设置于封装支架100上的支架凹杯101,支架凹杯101内设置有金属焊线102,LED芯片104设置于支架凹杯101内,并与封装支架100形成电路连接,在支架凹杯101内填充有涂覆了荧光粉的封装胶103。采用支架封装的LED芯片的出光面向上,由于封装支架100和支架凹杯101由不透明材质制成,因此,LED器件只有上表面可以出光,出光率低。
如图2所示,为采用基板封装的LED器件的结构示意图。基板封装LED器件包括陶瓷封装基板100’,在封装基板100’上设置有线路层,LED芯片104采用倒装焊设置于封装基板100’上,LED芯片外设置有涂覆了荧光粉的封装胶103。采用基板封装LED芯片,在封装过程中需要经历多次高温烧结以形成电路连接,容易对LED芯片出光产生影响。而且无论是采用封装支架或封装基板对LED芯片进行封装,支架或基板上都具有线路层结构,因此在现有的LED器件生产工艺流程中,一般先进行固晶工艺让LED芯片与基板形成电路连接,再进行荧光粉层的涂布。
专利公开号为CN103258938A的中国实用新型专利申请中公开了一种含荧光粉的LED灯条封装基板,该封装基板的主材料为比例较为固定的荧光粉、散热材料和粘结材料的混合物,以COB形式的封装为主,重点解决了LED灯条及其在照明应用中的散热问题,并可实现正反面及侧面4π发光。但是该封装基板中含有70~75%的导热材料,导热材料为氧化铝或氮化铝,为不透明材料,在透光性能上效果较差,容易造成光损耗,增加了散热设计的负担。随着LED的取光效率的不断提高,电光转换效率不断提升,热能量的转换越来越少,LED产品对散热的依赖会越来越小,该设计实际对比陶瓷基板或COB基板的散热优势或出光优势并不明显。
实用新型内容
针对以上不足,本实用新型的目的在于提供一种可让光线通过封装基板的各个面直接出光或大量出光的LED封装基板。
为了实现上述目的,本实用新型采取如下的技术解决方案:
LED封装基板,包括放置LED芯片的凹杯单元,所述凹杯单元由透明底板和透明侧壁组成,所述底板和侧壁内含有荧光粉颗粒,所述凹杯单元的竖截面形状呈凵形。
优选的,所述底板和侧壁连为一体。
优选的,所述凹杯单元由玻璃或环氧树脂或硬硅胶制成。
优选的,所述硬硅胶的邵氏硬度大于60。
优选的,所述凹杯单元呈阵列形式相邻布置。
优选的,所述凹杯单元呈阵列形式等距间隔布置于透明连接底板上。
由以上技术方案可知,本实用新型采用如玻璃、环氧树脂、硬硅胶等透明材料混合荧光粉制成凹杯单元,使凹杯单元具有良好的透光性,封装于凹杯单元内的LED芯片能透过凹杯单元的每个面出光,从而提高LED器件的出光率。
附图说明
为了更清楚地说明本实用新型实施例,下面将对实施例或现有技术描述中所需要使用的附图做简单介绍,显而易见地,下面描述中的附图仅仅是本实用新型的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为现有技术中采用支架封装的LED器件的结构示意图;
图2为现有技术中采用基板封装的LED器件的结构示意图;
图3为本实用新型实施例1的结构示意图;
图4为本实用新型实施例1封装基板上凹杯单元的截面图;
图5为本实用新型实施例1的LED器件的结构示意图;
图6为本实用新型实施例1封装基板的工艺流程图;
图7为本实用新型实施例3的结构示意图;
图8为本实用新型实施例3的LED器件的结构示意图;
图9为本实用新型实施例3封装基板的工艺流程图。
具体实施方式
实施例1
如图3所示,本实用新型的LED封装基板包括若干个呈阵列式排列的凹杯单元1,所述凹杯单元1紧密相邻布置,凹杯单元1内设置LED芯片。同时参照图4,每个凹杯单元1由连为一体的底板1-1和侧壁1-2组成,凹杯单元1的竖截面形状呈凵形,凹杯单元1内不含有线路层结构。本实施例的凹杯单元1的主材料为玻璃,玻璃内含有荧光粉颗粒。
参照图5,采用本实施例封装基板对LED芯片进行封装时,LED芯片2通过透明固晶胶直接贴附于凹杯单元1的底板1-1上,在凹杯单元1内壁与LED芯片2之间填充有透明填充胶3,封装胶涂布层和电极图案层依次设置于LED芯片的与凹杯单元1相对的另一侧。本实用新型的LED封装基板的主功能区为凹杯单元1的下凹处,封装基板采用内含有荧光粉颗粒的透明材料制成,LED芯片2封装至凹杯单元1内后,凹杯单元1的每个面都是出光面,光线可通过封装基板凹杯单元1的各个面直接向外出光,出光率高。
如图6所示,为本实施例LED封装基板的工艺流程图,首先将LED封装基板的主材料——玻璃进行加热,当主材料被加热至呈现熔融状态或液态时,加入荧光粉,将荧光粉与主材料均匀混合,然后采用与凹杯单元形状一致的模具将混合有荧光粉的熔融状态或液态的主材料模压成型,形成如图3所示的具有多个凹杯单元阵列排列的LED封装基板。封装基板成型准备好后,即可进入LED芯片的封装工艺。
实施例2
本实施例与实施例1不同的地方在于:本实施例LED封装基板的主材料为环氧树脂,将环氧树脂加热至熔融状态或液态后,加入荧光粉,将荧光粉与环氧树脂混合均匀,然后用模具模压成型。
实施例3
如图7所示,本实施例与实施例1不同的地方在于:本实施例的LED封装基板设置多个阵列式排列的凹杯单元1,凹杯单元1等距间隔设置于连接底板1-3上,相邻凹杯单元1之间的间隔内填充透明填充胶。本实施例封装基板的主材料为硬硅胶,优选邵氏硬度60以上的硅胶,主材料内含有荧光粉颗粒。
参照图8,采用本实施例封装基板对LED芯片进行封装时,LED芯片2通过透明固晶胶固定于凹杯单元1的底板1-1上,在凹杯单元1内壁与LED芯片2之间填充有透明填充胶3,封装胶涂布层和电极图案层依次设置于LED芯片的与凹杯单元1相对的另一侧,相邻凹杯单元1之间通过连接底板1-3相连,连接底板1-3的材质与主材料材质相同。LED芯片2封装至凹杯单元1内后,光线可通过凹杯单元1的每个面出光。
参照图9,本实施例LED封装基板的工艺流程为:首先将LED封装基板的主材料——硬硅胶进行加热,当主材料被加热至呈现熔融状态或液态时,加入荧光粉,将荧光粉与主材料均匀混合,将主材料成型为平板状,然后使用蚀刻工艺形成凹杯单元阵列,凹杯单元之间的间距可以根据LED器件的尺寸进行调整。
本实用新型的LED封装基板采用透明材料作为主材料,在主材料中加入荧光粉颗粒,将LED芯片封装至凹杯单元内后,LED芯片发出的光线可透过凹杯单元的各个侧面向外出光,凹杯单元的透光性能好,光损耗小,LED器件的出光率高。
本实用新型的LED封装基板在生产过程中,可根据实际生产需要采用不同的主材料,或添加不同的荧光粉,荧光粉与主材料之间的配比可以进行相应调整,所添加的荧光粉与所有材料(包括主材料和荧光粉)间的质量比可在0.05~0.5之间,如主材料为玻璃,荧光粉/(主材料+荧光粉)的值可为0.1,主材料为环氧树脂时,荧光粉/(主材料+荧光粉)的值可为0.2等,具体配比根据需求及材料属性进行调整。本实用新型凹杯单元的尺寸可根据封装LED芯片的尺寸调整,LED封装基板边沿可以有部分延伸,以适合工艺生产,本实用新型的LED封装基板不含线路层结构,LED芯片电极引出的线路结构在后续工艺形成。
本说明书中各个部分采用递进的方式描述,每个部分重点说明的都是与其它部分的不同之处,各个部分之间相同或相似部分互相参见即可。对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本实用新型。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本实用新型的精神或范围的情况下,在其它实施例中实现。因此,本实用新型将不会被限制于本文所示的实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽范围。

Claims (6)

1.LED封装基板,包括放置LED芯片的凹杯单元,其特征在于:
所述凹杯单元由透明底板和透明侧壁组成,所述底板和侧壁内含有荧光粉颗粒,所述凹杯单元的竖截面形状呈凵形。
2.如权利要求1所述的LED封装基板,其特征在于:所述底板和侧壁连为一体。
3.如权利要求1所述的LED封装基板,其特征在于:所述凹杯单元由玻璃或环氧树脂或硬硅胶制成。
4.如权利要求3所述的LED封装基板,其特征在于:所述硬硅胶的邵氏硬度大于60。
5.如权利要求1所述的LED封装基板,其特征在于:所述凹杯单元呈阵列形式相邻布置。
6.如权利要求1所述的LED封装基板,其特征在于:所述凹杯单元呈阵列形式等距间隔布置于透明连接底板上。
CN201320728588.3U 2013-11-15 2013-11-15 Led封装基板 Expired - Fee Related CN203659915U (zh)

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CN103840063A (zh) * 2013-11-15 2014-06-04 芜湖德豪润达光电科技有限公司 Led封装基板及其制作方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103840063A (zh) * 2013-11-15 2014-06-04 芜湖德豪润达光电科技有限公司 Led封装基板及其制作方法

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