CN202394967U - 半导体封装构造 - Google Patents
半导体封装构造 Download PDFInfo
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Abstract
本实用新型公开一种半导体封装构造,其包含:一第一芯片、一第二芯片、一介电材料层、一激光激活层、一封装胶体及数个锡球。所述介电材料层用以包覆所述第一芯片,并具有数条第一导线;所述锡球设置在所述介电材料层的一表面;所述激光激活层设置在所述第一及第二芯片之间,并具有数个导电端子;所述封装胶体用以包覆所述第二芯片。所述第一芯片通过所述第一导线电性连接所述锡球,且所述第一芯片通过所述导电端子与所述第二芯片电性连接。所述半导体封装构造可有效节省成本及提高良率,进而提高半导体封装构造的品质稳定性。
Description
技术领域
本实用新型涉及一种半导体封装构造,特别是有关于一种采用激光激活材料来封装半导体芯片并使用无电镀导线进行电性连接的半导体封装构造。
背景技术
现今,半导体封装产业为了满足各种高密度封装的需求,逐渐发展出各种不同型式的封装设计,其中各种不同的***封装(system in package,SIP)设计概念常用于架构高密度封装产品。一般而言,***封装可分为多芯片模块(multi chip module,MCM)、封装体上堆叠封装体(package on package,POP)及封装体内堆叠封装体(package in package,PIP)等。所述多芯片模块(MCM)是指在同一基板上布设数个芯片,在设置芯片后,再利用同一封装胶体包埋所有芯片,且依芯片排列方式又可细分为堆叠芯片(stacked die)封装或并列芯片(side-by-side)封装。再者,所述封装体上堆叠封装体(POP)的构造是指先完成一具有基板的第一封装体,接着再于第一封装体的封装胶体上表面堆叠另一完整的第二封装体,第二封装体透过适当转接组件电性连接至第一封装体的基板上,因而成为一复合封装构造。相较之下,所述封装体内堆叠封装体(PIP)的构造则是利用另一封装胶体将第二封装体、转接组件及第一封装体的原封装胶体等一起包埋固定在第一封装体的基板上,因而成为一复合封装构造。
举例来说,请参照图1所示,其揭示一种现有具堆叠芯片的半导体封装结构100,其包含一第一芯片110、一第二芯片120、一基板130、一第一绝缘层140、一第二绝缘层150、数个锡球160及一封装胶体170。所述第一芯片110的一朝上的有源表面上具有数个第一焊垫111,且其内部具有数个穿硅导通孔(Through-Silicon Via,TSV)112,所述第一芯片110另一朝下的背面则进行硅蚀刻,以裸露出所述穿硅导通孔112的底端,以做为数个柱状凸块113;所述第二芯片120具有与所述柱状凸块113相对设置的数个第二焊垫121;所述基板130内具有数条导线131;所述第一芯片110的第一焊垫111朝所述第一绝缘层140,其设有数个柱状凸块(pillar bumps)114,且所述柱状凸块113、114皆为导电材料;所述锡球160分别具有一接垫161。
再者,所述第一绝缘层140及第二绝缘层150皆是底部填充胶(underfill),所述第一绝缘层140位于所述第一芯片110及所述基板130之间,所述第二绝缘层150位于所述第一芯片110及所述第二芯片120之间,且所述第一芯片110通过所述穿硅导通孔112、所述柱状凸块113及所述第二焊垫121来与所述第二芯片120电性连接;此外,所述锡球160设置在所述基板130的外露表面,且所述锡球160借助所述接垫161、所述导线131、所述柱状凸块114及所述第一焊垫111电性连接于所述第一芯片110。再者,所述第一绝缘层140用以包覆保护所述柱状凸块114及所述第一焊垫111,所述第二绝缘层150用以包覆保护所述柱状凸块113及所述第二焊垫121,且所述封装胶体170用以包覆保护所述第一芯片110、所述第二芯片120及所述第二绝缘层150。此外,所述基板130通常使用一多层印刷电路板(PCB),而所述导线131则为在所述基板130内利用增层(build-up)工艺制作的电路层。
虽然,图1的半导体封装结构100可以将至少两个芯片整合在同一封装构造中,但其制造过程中须在所述第一芯片110内制作所述穿硅导通孔112,并对所述第一芯片110朝下的表面进行硅蚀刻,以裸露出一部份的穿硅导通孔112,以做为所述柱状凸块113。然而,对于奈米等级的制作过程而言,要使每一所述穿硅导通孔112均能完整的成型,且所述导电材料均能实心地填满整个所述穿硅导通孔112并不容易,同时要进行芯片硅蚀刻也需要复杂的加工步骤,因此使得整体的制作过程良率偏低、成本升高。另外,在封装构造上,由于所述第一芯片110、所述基板130及所述封装胶体170具有不同的热膨胀系数(CTE),因此当受热膨胀时,所述封装胶体170会朝所述基板130方向翘曲(warpage),在长期热胀冷缩循环下,这种翘曲现象将造成所述第一芯片110的硅基材或其有源表面电路的断裂(crack),因而影响所述半导体封装结构100的产品可靠度及使用寿命。
故,有必要提供一种半导体封装构造,以解决现有技术所存在的问题。
实用新型内容
有鉴于此,本实用新型提供一种半导体封装构造,以解决现有技术所存在的高成本、低良率及热膨胀系数差异造成的翘曲与断裂等问题。
本实用新型的主要目的在于提供一种半导体封装构造,其采用一激光激活材料来封装包埋一芯片,并通过对所述激光激活材料照射一激光,使所述激光激活材料内的有机材料挥发,进而使所述激光激活材料的表面因烧蚀而形成数个穿透孔,其后即可在所述穿透孔上披覆无电镀导线;接着再通过另一激光激活材料层及导电端子(或第二导线)的制作来与另一芯片相连接。相较于现有技术,本实用新型确实可以有效节省成本及提高良率,进而提高半导体封装构造的品质稳定性。
为达成本实用新型的前述目的,本实用新型提供一种半导体封装构造,其中所述半导体封装构造包含:
一第一芯片,具有设置在一表面的数个第一凸块,及贯穿两表面的穿硅导通孔;
一介电材料层,用以覆盖所述第一芯片,具有数条第一导线;
数个锡球,设置在所述介电材料层的一表面;
一第二芯片,具有与所述穿硅导通孔相对设置的数个第二凸块;以及
一激光激活层,设置在所述第一芯片及所述第二芯片之间,具有数个导电端子;
其中所述第一芯片通过所述第一凸块及所述第一导线电性连接所述锡球;及所述第一芯片通过所述穿硅导通孔及所述导电端子电性连接所述第二芯片的第二凸块。
在本实用新型的一实施例中,所述介电材料层包含交替堆栈的数个激光激活材料层与数个导线层。
在本实用新型的一实施例中,所述介电材料层或所述激光激活层包含有机金属化合物。
在本实用新型的一实施例中,所述有机金属化合物选自有机铜金属化合物、有机镍金属化合物或有机锡金属化合物。
在本实用新型的一实施例中,所述第一导线及所述导电端子的材料分别选自无电镀铜、无电镀镍或无电镀锡。
在本实用新型的一实施例中,所述半导体封装构造另包含一接垫,所述接垫设置于所述第一导线与所述锡球之间。
在本实用新型的一实施例中,所述半导体封装构造另包含一封装胶体,用以包覆保护所述第二芯片。
在本实用新型的一实施例中,所述第一凸块选自金凸块、铜凸块、锡凸块、镍凸块、铜柱凸块(Cu pillar bumps)或镍柱凸块。
在本实用新型的一实施例中,所述第二凸块选自金凸块、铜凸块、锡凸块、镍凸块、铜柱凸块或镍柱凸块。
再者,本实用新型提供另一种半导体封装构造,其中所述半导体封装构造包含:
一第一芯片,具有设置在一表面的数个第一凸块,及贯穿两表面的数个穿硅导通孔;
一介电材料层,用以覆盖所述第一芯片,具有数条第一导线;
数个锡球,设置在所述介电材料层的一表面;
一第二芯片,具有数个第二凸块;以及
一激光激活层,设置在所述第一芯片及所述第二芯片之间,具有数条第二导线;
其中所述第一芯片通过所述第一凸块及所述第一导线电性连接所述锡球;及所述第二导线的一端在所述激光激活层的一表面上延伸分布并与所述穿硅导通孔电性接触,使得所述第一芯片通过所述穿硅导通孔及所述第二导线电性连接所述第二芯片的第二凸块。
在本实用新型的一实施例中,所述第二导线的材料选自无电镀铜、无电镀镍或无电镀锡。
与现有技术相比较,本实用新型的半导体封装构造,不但可降低成本、提高良率,还可以解决环境测试不良的问题。
附图说明
图1是一现有的半导体封装构造的示意图。
图2是本实用新型第一实施例半导体封装构造的示意图。
图3A、3B、3C、3D及3E是本实用新型第一实施例半导体封装构造的制造方法各步骤的示意图。
图4是本实用新型第二实施例半导体封装构造的示意图。
具体实施方式
为让本实用新型上述目的、特征及优点更明显易懂,下文特举本实用新型较佳实施例,并配合附图,作详细说明如下。再者,本实用新型所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本实用新型,而非用以限制本实用新型。
请参照图2所示,本实用新型第一实施例的半导体封装构造200主要包含一第一芯片10、一第二芯片20、一介电材料层30、一激光激活层40、数个锡球50及一封装胶体60。所述第一芯片10的一表面(即有源表面)上具有数个第一凸块10a,且两表面之间上具有数个穿硅导通孔(TSV)10b,所述穿硅导通孔(TSV)10b的底端裸露在所述第一芯片10的另一表面(即背面)上;所述第二芯片20具有与所述穿硅导通孔10b相对设置的数个第二凸块20a;所述介电材料层30具有数条第一导线31;所述激光激活层40具有数个导电端子41a;所述锡球50分别具有一接垫50a。
如图2所示,所述激光激活层40设置在所述第一芯片10及所述第二芯片20之间,所述锡球50设置在所述介电材料层的一表面,以作为所述半导体封装构造200的输入/输出部。此外,所述介电材料层30用以包覆保护所述第一芯片10及所述第一凸块10a,且所述第一芯片10通过所述第一凸块10a及所述第一导线31与所述锡球50电性连接。再者,所述封装胶体60用以包覆保护所述第二芯片20,所述导电端子41a电性的连接所述穿硅导通孔10b及所述第二凸块20a,以使所述第二芯片20通过所述第二凸块20a、所述导电端子41a及所述穿硅导通孔30b与所述第一芯片10电性连接。
本实用新型将于下文利用图2、3A、3B、3C、3D及3E逐一详细说明第一实施例之上述各元件的细部构造、制造方法及其运作原理。
请参照图3A所示,本实用新型第一实施例的半导体封装构造200的制造方法首先是:备置所述第一芯片10及一第一载板70a,其中先在所述第一芯片10的两相对表面上分别加工形成所述第一凸块10a及所述穿硅导通孔10b,并在具有所述穿硅导通孔10b的一表面(背面)上贴上一保护胶带10c,接着将所述第一芯片10安置在所述第一载板70a上,但所述第一芯片10基于所述保护胶带10c的媒介而不与所述第一载板70a直接接触。具体而言,所述第一凸块10a及所述穿硅导通孔10b可以各自选自金凸块、铜凸块、锡凸块、镍凸块、铜柱凸块(Cu pillar bumps)或镍柱凸块;必要时,所述第一芯片10也可选自一双面芯片(即背面亦具有集成电路),但并不限于此。
请参照图3A及3B所示,本实用新型第一实施例的半导体封装构造200的制造方法接着是:先利用所述介电材料层30完全包覆保护图3A的所述第一芯片10及所述第一凸块10a;再借助激光来激活所述第一凸块10a上方的所述介电材料层30,使所述介电材料层30内的激光激活材料(laser activated material)通过激光的激活而被挥发,进而使所述介电材料层30的表面因烧蚀而形成数个第一穿透孔32;其后,在各所述第一穿透孔32上披覆一第一段导线31a。具体而言,所述介电材料层30包含交替堆栈的数个激光激活材料层与数个导线层,所述激光激活材料层中包含至少一种有机材料,所述有机材料会经由激光的激活而挥发,且被激光照射的所述介电材料层30的激光激活材料层表面逐渐被烧蚀并对应形成所述第一穿透孔32。特别地,可通过调整激光的电压强度及照射时间来控制所述第一穿透孔32被烧蚀的深度及孔径大小。此外,所述激光激活材料主要包含有机金属化合物(organometallic compound),特别是或有机钯金属化合物、有机铜金属化合物、有机镍金属化合物或有机锡金属化合物。所述有机金属化合物在被激光烧蚀后,其有机部份将挥发,并留下还原的金属粒子于烧蚀后的孔壁上,以利进行无电镀工艺;所述第一段导线31a则可选自无电镀材料,特别是无电镀铜、无电镀镍或无电镀锡,但并不限于此。
请参照图3B及3C所示,本实用新型第一实施例的半导体封装构造200的制造方法接着是:先重复在图3B的所述介电材料层30及所述第一段导线31a上,依序覆盖所述介电材料层30、照射激光以烧蚀出所述第一穿透孔32,以及在各所述第一穿透孔32上披覆对应的导线31b,直到达到所预设的所述介电材料层30厚度或所述第一导线31的长度为止。其后,在各导线31b的一第二段导线31c上形成所述接垫50a。其中,所述接垫50a可选自金材料、铜材料、镍材料、锡材料、钯材料,或为上述材料的合金,但并不限于此。
请参照图3C及3D所示,本实用新型第一实施例的半导体封装构造200的制造方法接着是:先依序移除所述第一载板70a、在存在所述接垫50a的所述介电材料层30的表面上设置一第二载板70b,以及移除所述保护胶带10c;其后,在所述介电材料层30的另一表面及裸露所述穿硅导通孔10b一端的所述第一芯片10的表面上披覆上所述激光激活层40。其中,所述激光激活层40可以选自有机金属化合物,例如是有机金属化合物,特别是有机钯金属化合物、有机铜金属化合物、有机镍金属化合物或有机锡金属化合物,所述有机金属化合物在被激光烧蚀后,其有机部份将挥发,并留下还原的金属粒子于烧蚀后的孔壁上,以利进行无电镀工艺。特别地,所述激光激活层40与所述介电材料层30可采用相同的激光激活材料;此外,再对相应于所述穿硅导通孔10b上的所述激光激活层40上,进行激光照射,并同时控制激光的电压大小及照射时间,以烧蚀出所需的数个第二穿透孔42。此时,所述第二穿透孔42穿透所述激光激活层40,以裸露出所述穿硅导通孔10b;最后,在各所述第二穿透孔42上以无电镀工艺填满无电镀材料,即可以形成所述导电端子41a。具体而言,所述导电端子41a可选自无电镀材料,特别是无电镀铜、无电镀镍或无电镀锡,但并不限于此。
请参照图3D及3E所示,本实用新型第一实施例的半导体封装构造200的制造方法接着是:先将所述第二芯片20覆盖在所述第一芯片10上,使所述第二凸块20a与所述导电端子41a及所述穿硅导通孔10b对齐,以令所述第二芯片20可通过所述第二凸块20a、所述导电端子41a及所述穿硅导通孔10b与所述第一芯片10电性连接,其中所述第二凸块20a可以选自金凸块、铜凸块、锡凸块、镍凸块、铜柱凸块或镍柱凸块;其后,在所述第一芯片10与所述第二芯片20之间涂布一胶体70c。其中所述胶体70c可选自一具有绝缘能力的材料;之后,利用所述封装胶体60完全包覆所述第二芯片20。其中所述封装胶体60例如为一环氧树脂层,特别是环氧树脂化合物及绝缘固态颗粒的混合物,但并不限于此。
最后,请参照图2及3E所示,在所述接垫50a上分别设置所述锡球50,以提供所述半导体封装构造200。其中所述锡球50可选自金材料、铜材料、镍材料、锡材料,或为上述材料的合金,但并不限于此。
请参照图4所示,本实用新型第二实施例的一半导体封装构造300相似于本实用新型第一实施例的所述半导体封装构造200,并大致沿用相同于图2的组件名称及图号,但第二实施例不同于第一实施例的差异特征在于:所述第二实施例的所述半导体封装构造300的所述激光激活层40包含:数条第二导线41b。所述第二导线41b贯穿所述激光激活层40的两面,使所述第二芯片20通过所述第二凸块20a、所述第二导线41b及所述穿硅导通孔10b与所述第一芯片10电性导通。此外,经由控制激光的电压及激活时间,使所述第二穿透孔42在所述激光激活层40与所述第二芯片20相互接触的接口上因激光的烧蚀而产生平面分布的特殊重布线图案(未绘示),进而使所述无电镀材料填满所述第二穿透孔42(如图3D)之后,在所述第二穿透孔42内形成所述第二导线41b,所述第二导线41b为平面延伸分布的电路,也就是具有重新分布(re-distribution)焊垫位置的作用,并可用以与所述第二凸块20a相连接。
如上所述,相较于现有半导体封装构造虽能以穿硅导通孔、蚀刻及布线的方式对芯片进行封装,但现有技术具有成本过高、制作过程良率低、热膨胀系数差异造成的翘曲与断裂等问题,而易导致封装后的所述芯片仍无法有更长的使用寿命等缺点,反观图2及图4的本实用新型的半导体封装构造200、300改采用一激光激活材料来封装包埋一芯片,并通过对所述激光激活材料照射一激光,使所述激光激活材料内的有机材料挥发,进而使所述激光激活材料的表面因烧蚀而形成数个穿透孔,其后即可在所述穿透孔上披覆无电镀导线;接着再通过另一激光激活材料层及导电端子(或第二导线)的制作来与另一芯片相连接。相较于现有技术,本实用新型确实可以有效节省成本及提高良率,进而提高半导体封装构造的品质稳定性。
本实用新型已由上述相关实施例加以描述,然而上述实施例仅为实施本实用新型的范例。必需指出的是,已公开的实施例并未限制本实用新型的范围。相反地,包含于权利要求书的精神及范围的修改及均等设置均包括于本实用新型的范围内。
Claims (10)
1.一种半导体封装构造,其特征在于:所述半导体封装构造包含:
一第一芯片,具有设置在一表面的数个第一凸块,及贯穿两表面的数个穿硅导通孔;
一介电材料层,用以覆盖所述第一芯片,具有数条第一导线;
数个锡球,设置在所述介电材料层的一表面;
一第二芯片,具有与所述穿硅导通孔相对设置的数个第二凸块;以及
一激光激活层,设置在所述第一芯片及所述第二芯片之间,具有数个导电端子;
其中所述第一芯片通过所述第一凸块及所述第一导线电性连接所述锡球;
及所述第一芯片通过所述穿硅导通孔及所述导电端子电性连接所述第二芯片的第二凸块。
2.如权利要求1所述的半导体封装构造,其特征在于:所述介电材料层包含交替堆栈的数个激光激活材料层与数个导线层。
3.如权利要求1所述的半导体封装构造,其特征在于:所述介电材料层或所述激光激活层包含有机金属化合物。
4.如权利要求3所述的半导体封装构造,其特征在于:所述有机金属化合物选自有机铜金属化合物、有机镍金属化合物或有机锡金属化合物。
5.如权利要求1所述的半导体封装构造,其特征在于:所述第一导线及所述导电端子的材料分别选自无电镀铜、无电镀镍或无电镀锡。
6.如权利要求1所述的半导体封装构造,其特征在于:所述半导体封装构造另包含一接垫,所述接垫设置于所述第一导线与所述锡球之间。
7.如权利要求1所述的半导体封装构造,其特征在于:所述半导体封装构造另包含一封装胶体,用以包覆保护所述第二芯片。
8.如权利要求1所述的半导体封装构造,其特征在于:所述第一凸块选自金凸块、铜凸块、锡凸块、镍凸块、铜柱凸块或镍柱凸块。
9.如权利要求1所述的半导体封装构造,其特征在于:所述第二凸块选自金凸块、铜凸块、锡凸块、镍凸块、铜柱凸块或镍柱凸块。
10.一种半导体封装构造,其特征在于:所述半导体封装构造包含:
一第一芯片,具有设置在一表面的数个第一凸块,及贯穿两表面的数个穿硅导通孔;
一介电材料层,用以覆盖所述第一芯片,具有数条第一导线;
数个锡球,设置在所述介电材料层的一表面;
一第二芯片,具有数个第二凸块;以及
一激光激活层,设置在所述第一芯片及所述第二芯片之间,具有数条第二导线;
其中所述第一芯片通过所述第一凸块及所述第一导线电性连接所述锡球;
及所述第二导线的一端在所述激光激活层的一表面上延伸分布并与所述穿硅导通孔电性接触,使得所述第一芯片通过所述穿硅导通孔及所述第二导线电性连接所述第二芯片的第二凸块。
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