CN201639556U - Drive circuit of depletion type semiconductor switching device - Google Patents
Drive circuit of depletion type semiconductor switching device Download PDFInfo
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- CN201639556U CN201639556U CN2010201167150U CN201020116715U CN201639556U CN 201639556 U CN201639556 U CN 201639556U CN 2010201167150 U CN2010201167150 U CN 2010201167150U CN 201020116715 U CN201020116715 U CN 201020116715U CN 201639556 U CN201639556 U CN 201639556U
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Abstract
The utility model provides a drive circuit of a depletion type semiconductor switching device, comprising a switch control unit, a management unit and a signal processing unit, wherein the input end of the signal processing unit is connected with the output end of the management unit so as to receive an output signal of the management unit; the output end of the signal processing unit is connected with the switch control unit so as to control the switch control unit to open and close. The utility model solves the technical problems that the traditional drive circuit of the depletion type semiconductor switching device has high circuit loss in the work process. By using the provided technical scheme, the bus short-circuit current and the starting surge current caused by the normally-conducted characteristics of a depletion type semiconductor are efficiently controlled when the circuit is started; the extra switch loss caused by the participation of an enhanced semiconductor switch device in the switch work can be effectively reduced in the on/off state of the circuit; the leakage current of the depletion type switching device in the off state can be reduced when the depletion type switching device is positioned in the off state; and the utility model plays a role of protecting the starting of the circuit when the circuit system is positioned in a fault protection state.
Description
Technical field
The utility model relates to electronic switching device, is specifically related to a kind of drive circuit of deplete semiconductor switching device.
Background technology
Along with the raising of semiconductor switch device manufacturing technology, High Electron Mobility Transistor (HEMT) relies on low resistive, the high frequency of himself and the characteristics of high efficiency, and more applications more and more widely is in power switch circuit.The High Electron Mobility Transistor of present stage (HEMT) great majority also belong to depletion type switching element.With respect to the enhanced semiconductor switching device, " normal open type " characteristics that the deplete semiconductor switching device self has make its holding state or error protection state at power switch circuit can not keep closed condition.Can make the bus electricity index of switch power circuit be in runaway condition like this.The conventional method that addresses this problem is referring to Fig. 1, promptly at the electronegative potential point of the grid place in circuit of depletion type switching element, and drain electrode place in circuit bus high potential point, source electrode inserts the drain electrode or the collector electrode of enhanced semiconductor switching device; At the source electrode of enhanced semiconductor switching device or the electronegative potential point of emitter connection circuit bus, can reach the purpose of control depletion type switching element on off state by the grid of control enhanced semiconductor switching device.Though it is simple that this method has a control circuit, the effective advantage of control effect because the work of enhanced semiconductor switching device participation main switching device has limited the circuit maximum operating frequency, has increased the switch power loss of circuit; Simultaneously, increased the loss of switching circuit because the drain voltage of enhanced semiconductor switching device when closing by self shutoff voltage decision of depletion device, when circuit turn-offs, can not at utmost reduce the leakage current of depletion type switching element.
The utility model content
In order to solve the deplete semiconductor switching device big technical problem of circuit loss in the course of the work, the utility model provides a kind of drive circuit of deplete semiconductor switching device, comprise switch control unit, the drive circuit of described deplete semiconductor switching device also comprises administrative unit and signal processing unit, the input of described signal processing unit is connected with the output of administrative unit, output signal with the receiving management unit, the output of described signal processing unit is connected with switch control unit, opening and closing with the control switch control unit.
Above-mentioned switch control unit is made up of the first transistor and the transistor seconds that is connected with the first transistor;
The output of described administrative unit is provided with pwm signal output interface and soft-start signal output interface;
Described signal processing unit is made up of first signal processing unit and secondary signal processing unit;
The input of described first signal processing unit is connected with the pwm signal output interface of administrative unit, and with the pwm signal of receiving management unit, output is connected with the first transistor, exports after first drive signal on off state with the control the first transistor;
The input of described secondary signal processing unit is connected with the soft signal output part interface that opens of administrative unit, with the soft signal that opens of receiving management unit; Output is connected with transistor seconds, with the on off state of control transistor seconds;
Soft first node and soft the opening between signal output part and the direct Section Point of transistor seconds of switch control unit of opening between signal output part and the secondary signal processing unit of described switch control unit is provided with the soft electric capacity that opens, the circuit soft start is charged through the start delay time by administrative unit, with the output soft-start signal.
Be provided with and gate cell between above-mentioned first node and the secondary signal processing unit.
Be provided with the negative voltage transition unit in above-mentioned first signal processing unit, the pwm signal of first signal processing unit and output signal carried out same-phase, amplitude become the driving voltage conversion that changes between positive and negative; On off state with effective control the first transistor;
Described secondary signal processing unit comprises comparing unit, delay unit and amplifying unit; Soft-start signal is compared, delays time and amplify the back and export the on off state of second drive signal with the control transistor seconds.
Above-mentioned the first transistor and transistor seconds are the semiconductor switch transistors,
The source electrode of above-mentioned the first transistor is connected with the drain electrode of described transistor seconds, and the grid of described the first transistor links to each other with the output of first signal processing unit, and the drain electrode of described the first transistor is connected with circuit bus hot end; The drain electrode of described transistor seconds is connected with the source electrode of described the first transistor, and the grid of described transistor seconds is connected with secondary signal processing unit output, and the source electrode of transistor seconds is connected with circuit bus cold end.
Above-mentioned the first transistor is the depletion device for the circuit main switching device, keeps normal open state, input drive signal maintained switch state when no drive signal.
Above-mentioned transistor seconds is an enhancement device, keeps off state when no control signal, keeps normal open state during input driven saturated voltage signal.
Above-mentioned first signal processing unit and secondary signal processing unit are integrated in the administrative unit.
The technical solution of the utility model is as follows:
The utlity model has following advantage:
1). when circuit start, efficiently controlled the busbar short-circuit electric current that causes by deplete semiconductor " normal open " characteristic and started surge current.
2). under the contactor state, effectively reduce because the enhanced semiconductor switching device participates in the extra switch loss that switch work causes.
3). at the depletion type switching element off state, effectively reduce its leakage current when off state.
4). when Circuits System is in the error protection state, circuit is opened the effect of effective protection.
Description of drawings
Accompanying drawing 2 is the theory diagram of the drive circuit of the utility model deplete semiconductor switching device;
Waveform signal figure when accompanying drawing 6 is the drive circuit works of the utility model deplete semiconductor switching device;
Accompanying drawing 7 is the circuit theory diagrams that increase in the drive circuit of the utility model deplete semiconductor switching device with door;
Accompanying drawing 8 is the schematic block circuit diagram that the utility model signal processing unit and PWM control unit become one.
Description of reference numerals:
Embodiment
Followingly describe concrete technical scheme of the present utility model in detail with reference to accompanying drawing:
Referring to Fig. 2-shown in Figure 5, the drive circuit of the deplete semiconductor switching device that the utility model provides, comprise switch control unit 1, administrative unit 2 and signal processing unit 3, the input of signal processing unit 3 is connected with the output of administrative unit 2, with the output signal of receiving management unit, the output of signal processing unit 3 is connected with switch control unit 1, opening and closing with control switch control unit 1.
Wherein, switch control unit 1 is made up of the first transistor 101 and the transistor seconds 102 that is connected with the first transistor 101; The output of administrative unit is provided with pwm signal output interface and soft-start signal output interface; Signal processing unit 3 is made up of first signal processing unit 301 and secondary signal processing unit 302; The input of first signal processing unit 301 is connected with the pwm signal output interface of administrative unit 2, pwm signal with receiving management unit 2, output is connected with the first transistor 101, exports after first drive signal on off state with control the first transistor 101; The input of secondary signal processing unit 302 is connected with the soft signal output part interface that opens of administrative unit 2, with the soft signal that opens of receiving management unit 2; Output is connected with transistor seconds 102, with the on off state of control transistor seconds 102; Administrative unit 2 is soft to be opened between first node a between signal output part and the secondary signal processing unit 302 and the administrative unit 2 soft Section Point b that open between signal output part and the transistor seconds 102 and is provided with the soft electric capacity 4 that opens, and the capacity of electric capacity 4 can require to set according to circuit design.By the administrative unit 2 soft signal output parts that open the circuit soft start is charged, with the output soft-start signal.Perhaps between first node and secondary signal processing unit, be provided with and gate cell 5.
Wherein, be provided with negative voltage transition unit 311 in first signal processing unit 301, the pwm signal of first signal processing unit 301 and output signal carried out same-phase, amplitude become the driving voltage conversion that changes between positive and negative; On off state with effective control the first transistor 101; Secondary signal processing unit 302 comprises comparing unit 312, delay unit 322 and amplifying unit 332; The soft signal that opens is compared, delays time and amplifies the back and export the on off state of second drive signal with control transistor seconds 102.
Wherein, the first transistor 101 is semiconductor transistors with transistor seconds 102, and the source electrode of described the first transistor 101 is connected with the drain electrode of described transistor seconds 102, the grid of the first transistor 101 links to each other with the output of first signal processing unit 301, and the drain electrode of the first transistor 101 is connected with circuit bus hot end; The drain electrode of transistor seconds 102 is connected with the source electrode of described the first transistor 101, and the grid of transistor seconds 102 is connected with secondary signal processing unit 302 outputs, and the source electrode of transistor seconds 102 is connected with circuit bus cold end.The first transistor is a depletion type switching element, keeps normal open state, maintained switch state during input drive signal when no drive signal.Transistor seconds is the enhancement mode switching device, keeps off state when no control signal, keeps normal open state during input driven saturated voltage signal, has avoided powering up moment circuit busbar short-circuit phenomenon at circuit.
Operation principle of the present utility model is as follows:
Referring to Fig. 2-shown in Figure 6, after the drive circuit energising of deplete semiconductor switching device, wherein administrative unit is the PWM control unit, the PWM control unit charged to the soft electric capacity that opens of circuit through the start delay time, output soft-start signal Soft, after soft-start signal Soft voltage triggered, control PWM control unit output pwm signal.Soft-start signal Soft input secondary signal processing unit.Impedance matching, signal are relatively amplified because the secondary signal processing unit has, the signal lag function.After the soft-start signal Soft process secondary signal processing unit processes, output ST signal.The driving force of ST signal enough drives transistor seconds and is in the saturation conduction state.The ST signal phase is adjusted accordingly according to soft-start signal Soft phase place, enters switch working state moment to guarantee the first transistor, and transistor seconds enters the saturation conduction state, realizes the driving of circuit.，
The pwm signal of PWM control unit output is imported first signal processing unit, first signal processing unit output DR signal, the phase place of DR signal and pwm signal is identical, amplitude becomes the driving voltage that changes between positive and negative, and duty ratio becomes greatly gradually, and the first transistor is started working on off state.The first transistor is entering on off state moment, secondary signal processing unit output ST signal, and transistor seconds enters the saturation conduction state.
This process has been avoided in the first transistor conducting moment because the surge current that its " normal open " characteristic causes.Simultaneously, because at normal PWM in the work period, the ST signal makes transistor seconds keep the saturation conduction state, has avoided in common control method, because transistor seconds participates in the extra switching loss brought with the main switching device synchro switch.
When circuit generation overcurrent or overvoltage fault and shutdown, the soft-start signal Soft discharge of PWM control unit, the PWM control unit enters standby or guard mode.Soft-start signal Soft reduces to low level, and the ST signal is reduced to zero level simultaneously, and transistor seconds is closed.The pwm signal of PWM control unit output is closed by soft-start signal Soft control, and the DR signal of secondary signal processing unit output is reduced to zero potential, and the first transistor M is in conducting state.Transistor seconds is closed, and the circuit bus current is in off state, and depletion type switch the first transistor does not have electric current to pass through.First signal processing unit is realized signal waveform conversion as shown in Figure 3 with the secondary signal processing unit according to indexs such as different input signal amplitudes, frequencies, and the output waveform of realization should be fit to the driving demand of the first transistor and transistor seconds.When use does not have the PWM control unit of soft-start signal Soft, also can reach the purpose of control transistor seconds by design function processing of circuit pwm signal output class other signals like Soft.
The secondary signal processing unit also can be considered input " overcurrent " or circuit protection signals such as " overvoltages "; referring to shown in Figure 7; between first node and secondary signal processing unit, be provided with and gate cell, soft-start signal Soft in the circuit and circuit abnormality signal d do " with " input secondary signal processing unit after the logic.The circuit abnormality signal is that " low " is effective.Occur directly to close transistor seconds when unusual at circuit.
As shown in Figure 8, according to the actual requirements, also can first signal processing unit and secondary signal processing unit be integrated in the PWM control unit by simple integrated.
The utility model, has efficiently been controlled the busbar short-circuit electric current that is caused by deplete semiconductor " normal open " characteristic and has been started surge current when making circuit start by above execution mode; Under the contactor state, effectively reduce because the enhanced semiconductor switching device participates in the extra switch loss that switch work causes; At the depletion type switching element off state, effectively reduce its leakage current when off state; When Circuits System is in the error protection state, circuit is opened the effect of effective protection.
Above content be in conjunction with concrete optimal technical scheme to further describing that the utility model is done, can not assert that concrete enforcement of the present utility model is confined to these explanations.For the utility model person of an ordinary skill in the technical field, under the prerequisite that does not break away from the utility model design, can also make some simple deduction or replace, all should be considered as belonging to protection range of the present utility model.
Claims (9)
1. the drive circuit of a deplete semiconductor switching device, comprise switch control unit, it is characterized in that: described deplete semiconductor switching device also comprises administrative unit and signal processing unit, the input of described signal processing unit is connected with the output of administrative unit, output signal with the receiving management unit, the output of described signal processing unit is connected with switch control unit, opening and closing with the control switch control unit.
2. the drive circuit of deplete semiconductor switching device according to claim 1 is characterized in that: described switch control unit is made up of the first transistor and the transistor seconds that is connected with the first transistor;
The output of described administrative unit is provided with pwm signal output interface and soft-start signal output interface;
Described signal processing unit is made up of first signal processing unit and secondary signal processing unit;
The input of described first signal processing unit is connected with the pwm signal output interface of administrative unit, and with the pwm signal of receiving management unit, output is connected with the first transistor, exports after first drive signal on off state with the control the first transistor;
The input of described secondary signal processing unit is connected with the soft signal output part interface that opens of administrative unit, with the soft signal that opens of receiving management unit; Output is connected with transistor seconds, with the on off state of control transistor seconds;
Soft first node and soft the opening between signal output part and the direct Section Point of transistor seconds of switch control unit of opening between signal output part and the secondary signal processing unit of described switch control unit is provided with the soft electric capacity that opens, the circuit soft start is charged through the start delay time by administrative unit, with the output soft-start signal.
3. the drive circuit of deplete semiconductor switching device according to claim 2 is characterized in that: be provided with and gate cell between described first node and the secondary signal processing unit.
4. the drive circuit of deplete semiconductor switching device according to claim 2, it is characterized in that: be provided with the negative voltage transition unit in described first signal processing unit, the pwm signal of first signal processing unit and output signal carried out same-phase, amplitude become the driving voltage conversion that changes between positive and negative; On off state with effective control the first transistor;
Described secondary signal processing unit comprises comparing unit, delay unit and amplifying unit; Soft-start signal is compared, delays time and amplify the back and export the on off state of second drive signal with the control transistor seconds.
5. the drive circuit of deplete semiconductor switching device according to claim 4 is characterized in that: described the first transistor and transistor seconds are semiconductor switch devices.
6. the drive circuit of deplete semiconductor switching device according to claim 5, it is characterized in that: the source electrode of described the first transistor is connected with the drain electrode of described transistor seconds, the grid of described the first transistor links to each other with the output of first signal processing unit, and the drain electrode of described the first transistor is connected with circuit bus hot end; The drain electrode of described transistor seconds is connected with the source electrode of described the first transistor, and the grid of described transistor seconds is connected with secondary signal processing unit output, and the source electrode of transistor seconds is connected with circuit bus cold end.
7. the drive circuit of deplete semiconductor switching device according to claim 6, it is characterized in that: described the first transistor is the depletion device for the circuit main switching device, when no drive signal, keep normal open state, input drive signal maintained switch state.
8. the drive circuit of deplete semiconductor switching device according to claim 6 is characterized in that: described transistor seconds is an enhancement device, keeps off state when no control signal.
9. the drive circuit of deplete semiconductor switching device according to claim 2 is characterized in that: described first signal processing unit and secondary signal processing unit are integrated in the administrative unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010201167150U CN201639556U (en) | 2010-02-11 | 2010-02-11 | Drive circuit of depletion type semiconductor switching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010201167150U CN201639556U (en) | 2010-02-11 | 2010-02-11 | Drive circuit of depletion type semiconductor switching device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201639556U true CN201639556U (en) | 2010-11-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010201167150U Expired - Lifetime CN201639556U (en) | 2010-02-11 | 2010-02-11 | Drive circuit of depletion type semiconductor switching device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201639556U (en) |
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2010
- 2010-02-11 CN CN2010201167150U patent/CN201639556U/en not_active Expired - Lifetime
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SUZHOU JIEXINWEI SEMICONDUCTOR CO., LTD. Free format text: FORMER OWNER: XI'AN JIEWEI SEMICONDUCTOR CO., LTD. Effective date: 20131022 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 710075 XI'AN, SHAANXI PROVINCE TO: 215123 SUZHOU, JIANGSU PROVINCE |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20131022 Address after: 215123 CN-23, nanometer City, 99 Jinji Lake Avenue, Suzhou Industrial Park, Suzhou, Jiangsu, Suzhou Patentee after: Suzhou Jiexinwei Semiconductor Technology Co., Ltd. Address before: 710075 innovation building, No. 25, Gaoxin Road, Xi'an hi tech Zone, Shaanxi, N717 Patentee before: Xi'an Jiewei Semiconductor Co., Ltd. |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20101117 |