CN201181936Y - Power level transfer circuit - Google Patents

Power level transfer circuit Download PDF

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Publication number
CN201181936Y
CN201181936Y CNU2007200773240U CN200720077324U CN201181936Y CN 201181936 Y CN201181936 Y CN 201181936Y CN U2007200773240 U CNU2007200773240 U CN U2007200773240U CN 200720077324 U CN200720077324 U CN 200720077324U CN 201181936 Y CN201181936 Y CN 201181936Y
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CN
China
Prior art keywords
pull
signal
level
resistor
level shifter
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU2007200773240U
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Chinese (zh)
Inventor
张洁光
刘士豪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inventec Pudong Technology Corp
Inventec Corp
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Inventec Pudong Technology Corp
Inventec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to CNU2007200773240U priority Critical patent/CN201181936Y/en
Application granted granted Critical
Publication of CN201181936Y publication Critical patent/CN201181936Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model provides a level shifter, which comprises a signal input end, a signal output end, a first pull-up end, a first pull-up resistor, a second pull-up end, a second pull-up resistor and a diode; wherein, one end of the first pull-up resistor is connected with the first pull-up end; one end of the second pull-up resistor is connected with the second pull-up end; the diode is arranged on the path on which the signal input end and the signal output end are located; the cathode of the diode is connected with the other end of the first pull-up resistor; and the anode of the diode is connected with the other end of the second pull-up resistor. The level shifter only uses a single diode to realize level shifting, thus reducing the fabrication cost of the used elements.

Description

Level shifter
Technical field
The utility model relates to a kind of level shifter, particularly a kind of cost-effective level shifter.
Background technology
Along with the develop rapidly of microelectric technique, the volume low pressure chip that more low power consumption is lower, performance is better continues to bring out.The I/O logic level is to 3.3V, 2.5V, 1.8V, even lower direction develops.But recent decades, because the device of 5V power supply occupies important market always, they often co-exist in the circuit board in system design, therefore in their process of design, just will run into the interface problem of different voltage levels inevitably.When the mode of operation of control system, the control signal voltage of its output is 5V as system substrate manager (BMC), and the many chips that receive its control signal then require the voltage into 3.3V.Therefore level transfer (level shift) circuit is used in the circuit design through regular meeting, with the conversion of each chip or component signals level in the realization circuit.
Fig. 1 for available circuit design in common a kind of level shifter figure.Input signal current potential in this level shifter is 5V, and it is the voltage of 3.3V that the chip of received signal then requires.Signal is the pin one 01 of level shifter 100, pin one 03, pin one 05 and pin one 07 input from then on respectively, by on draw signal P5V_DUAL to be pulled to 5V after, each signal uses after through two triodes and draws signal P3V3_STBY to be pulled to 3.3V, thereby has realized the conversion of varying level signal.With the SET_CLR_CMOS_N signal is example, when its during from pin one 01 input 5V high potential, triode 109 conductings, making the base stage of triode 111 is electronegative potential, and then triode 111 is ended.The SET_CLR_CMOS_BUF_N signal through on draw signal P3V3_STBY to be pulled to 3.3V.
But the level shifter among Fig. 1 all needs to be provided with two triodes and a plurality of resistance on each signal transmission path, particularly in the stage of product volume production, needs very high production cost.
The patent No. is that the patent of TW-I261216 proposes a kind of predrive circuit, a kind of drive circuit and a kind of display equipment it can drive and stably transmits control signal when reference level that output precision produced in output precision one side with box lunch is transformed into high voltage.
Predrive circuit comprises signal transfer circuit 41, and as shown in Figure 2, its input signal (being CTL2) that will have first reference level converts the signal of corresponding second reference level (being Vss) to, and this signal is sent to output precision.Signal transfer circuit comprises that level shifts power supply circuit 41a, the first level shifter 41b and the second level shifter 41c.Level shifts power supply circuit 41a one level TL translation level and second reference level (being Vss) according to regulation power supply supply voltage (being Vcc) is provided, and it comprises level transfer switch DA and level transfer capacitor CA.
The patent No. is that the method for TW-I261216 is that level transfer switch DA opens, by this charging level transfer capacitor CA when the level TL translation level is higher than regulation power supply supply voltage.When the level TL translation level was lower than regulation power supply supply voltage, level transfer switch DA closed, and keeps the charging voltage of level transfer capacitor CA by this.Therefore, the method for TW-I261216 is for seeing through the voltage level that level transfer switch DA changes signal VA1.Though the method can change the level of signal, but it is applicable to that low transition is a high level, and include a plurality of parts such as level transfer switch DA, level transfer capacitor CA, the first level shifter 41b and the second level shifter 41c, need higher cost.
Summary of the invention
The purpose of this utility model provides a kind of level shifter, to solve the high problem of level shifter design cost in the prior art.
The utility model proposes a kind of level shifter, comprise on signal input part, the signal output part, first pull end, first pull-up resistor, second pull-up resistor and diode on the pull end, second.Pull end is connected to signal input part after connecting first pull-up resistor on first.Pull end is connected to signal output part after connecting second pull-up resistor on second.The negative electrode of diode is connected to first pull-up resistor, and its anode is connected to second pull-up resistor.This level shifter is in order to the conversion of varying level between the output signal of the input signal of realizing signal input part and signal output part.
According to the described level shifter of the utility model preferred embodiment, pull end is that 5V goes up pull end on first, and pull end is that 3.3V goes up pull end on second.
According to the described level shifter of the utility model preferred embodiment, signal input part link control module.Control module is the system substrate controller.
Level shifter of the present utility model has only used diode to come conducting and cut-off state between signal input end and the signal output part, and by on draw signal and pull-up resistor to reach the purpose that level shifts, two triodes and a plurality of resistance that are adopted compared to existing technology, the utility model has been realized the conversion of same signal under different potentials on the basis of saving cost, guaranteed that the signal for different chip inputs is a significant level.
Description of drawings
Fig. 1 for available circuit design in common a kind of level shifter figure;
Fig. 2 is the predrive circuit circuit diagram of the patent of TW-I261216 for the patent No.;
Fig. 3 is a kind of level shifter figure of the utility model embodiment;
Fig. 4 is the another kind of level shifter figure of the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing, specify the utility model.
The utility model proposes a kind of level shifter, see also Fig. 3, level shifter 301 is arranged between control module 303 and the chipset 305.Level shifter 301 comprises on the signal input part 307, signal output part 309, first pull end 313, the second pull-up resistor R2 and diode 315 on pull end 311, the first pull-up resistor R1, second.Be connected to signal input part 307 after pull end 311 connects the first pull-up resistor R1 on first.Be connected to signal output part 309 after pull end 313 connects the second pull-up resistor R2 on second.This diode 315 is arranged on the path at signal input part 307 and signal output part 309 places, and its negative electrode is connected to the other end of the first pull-up resistor R1, and its anode is connected to the other end of the second pull-up resistor R2.
Control module 303 is by level shifter 301 switching signal level, and with chipset 305 transmission signals.Wherein on first pull end 311 input 5V on draw signal P5V_DUAL, and through drawing input signal on the first pull-up resistor R1.On second pull end 313 input 3.3V on draw signal P3V3_STBY, and through drawing output signal on the second pull-up resistor R2.When input signal was high level, diode 315 ended, and this moment, output signal was by moving the current potential that meets the requirement of chipset current potential on the P3V3_STBY signal and the second pull-up resistor R2.When input signal is low level, diode 315 conductings, the current potential of output signal equals the pressure drop sum of current potential and the diode 315 of node Vd at this moment.Realized the function that level shifts thus.
See also Fig. 4, it is the another kind of level shifter figure of the utility model embodiment.Input signal SET_CLR_CMOS_N, SET_CLR_PASSWD_N, SET_LOCK_CFG_N and SET_RCVRY_CFG_N in this level shifter 401 is the output signal of system substrate controller 403, and by exporting chipset 405 to after level shifter 401 switching levels.Draw signal P5V_DUAL by pin 407 inputs on the 5V, and through drawing the input signal of this level shifter 401 on pull-up resistor R3, R4, R5 and the R6.3.3V on draw signal P3V3_STBY and P3V3 respectively by last pull end 409 and go up pull end 411 inputs, and output signal through drawing level shifter 401 on pull-up resistor R7, R8, R9 and the R10.Be respectively arranged with diode 429, diode 431, diode 433 and diode 435 between pin 413, pin 415, pin 417 and pin 419 and pin 421, pin 423, pin 425 and the pin 427.
With input signal SET_CLR_CMOS_N is example, and it is from pin 413 inputs, and the input signal SET_CLR_CMOS_N of input draws on P5V_DUAL signal and pull-up resistor R3.Output output signal SET_CLR_CMOS_BUF_N draws on P3V3_STBY signal and pull-up resistor R7.If input signal SET_CLR_CMOS_N is a high level, then diode 429 ends, and output signal SET_CLR_CMOS_BUF_N is pulled to the current potential that meets chipset 405 through P3V3_STBY signal and pull-up resistor R7.If input signal SET_CLR_CMOS_N is a low level, then diode 429 conductings, the current potential of output signal SET_CLR_CMOS_BUF_N equals the pressure drop sum of current potential and the diode 429 of node Ve.Realized the function that level shifts thus.The P3V3_STBY signal is to be produced by the P5V_DUAL signal in the present embodiment, does not therefore have the input earlier of P3V3_STBY signal and makes the situation of diode current flow.
Level shifter of the present utility model has only used diode to come conducting and cut-off state between signal input end and the signal output part, and by on draw signal and pull-up resistor to reach the purpose that level shifts, two triodes and a plurality of resistance that are adopted compared to existing technology, the utility model has been realized the conversion of same signal under different potentials on the basis of saving cost, guaranteed that the signal for different chip inputs is an effective voltage, be more suitable in the use of product volume production during the stage.
More than disclosed only be several specific embodiment of the present utility model, but the utility model is not limited thereto, any those skilled in the art can think variation, all should drop in the protection range of the present utility model.

Claims (4)

1, a kind of level shifter, it is characterized in that, comprise a signal input part, one signal output part, pull end on one first, pull end on one second, this is connected to this signal input part after pull end connects one first pull-up resistor on first, this is connected to this signal output part after pull end connects one second pull-up resistor on second, it is characterized in that, this level shifter also comprises a diode, the negative electrode of this diode is connected to this first pull-up resistor, its anode is connected to this second pull-up resistor, in order to control diode conducting or end, finish the level conversion of this signal input part and signal output part.
2, level shifter as claimed in claim 1 is characterized in that, this on first pull end be that 5V goes up pull end, this on second pull end be that 3.3V goes up pull end.
3, level shifter as claimed in claim 1 is characterized in that, this signal input part connects a control module.
4, level shifter as claimed in claim 3 is characterized in that, this control module is the system substrate controller.
CNU2007200773240U 2007-12-26 2007-12-26 Power level transfer circuit Expired - Fee Related CN201181936Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2007200773240U CN201181936Y (en) 2007-12-26 2007-12-26 Power level transfer circuit

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Application Number Priority Date Filing Date Title
CNU2007200773240U CN201181936Y (en) 2007-12-26 2007-12-26 Power level transfer circuit

Publications (1)

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CN201181936Y true CN201181936Y (en) 2009-01-14

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106992775A (en) * 2017-03-27 2017-07-28 深圳易能电气技术股份有限公司 It is a kind of by negative voltage transition into zero level signal device and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106992775A (en) * 2017-03-27 2017-07-28 深圳易能电气技术股份有限公司 It is a kind of by negative voltage transition into zero level signal device and method
CN106992775B (en) * 2017-03-27 2020-11-10 深圳易能电气技术股份有限公司 Device and method for converting negative voltage into zero level signal

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090114

Termination date: 20121226