CN209201051U - A kind of programmable chip of integrated bi-directional level switch module - Google Patents
A kind of programmable chip of integrated bi-directional level switch module Download PDFInfo
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- CN209201051U CN209201051U CN201822023747.5U CN201822023747U CN209201051U CN 209201051 U CN209201051 U CN 209201051U CN 201822023747 U CN201822023747 U CN 201822023747U CN 209201051 U CN209201051 U CN 209201051U
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Abstract
The utility model discloses a kind of programmable chips of integrated bi-directional level switch module, wherein, the voltage selector that is equipped with including chip carrier, on chip carrier, the LDO low pressure difference linear voltage regulator being connect respectively with voltage selector and level switch module, the Logic control module being connect with voltage selector, and the VOUT power supply output pin, VCC chip energization pins, VSS grounding pin, PA1_CPU external communication I/O pin and the PA1_CPU internal communication I/O pin that are respectively equipped on chip carrier.The utility model has the effect of the sensor of compatible a variety of different operating voltages.
Description
Technical field
The utility model relates to intelligent chip field, in particular to a kind of programmable core of integrated bi-directional level switch module
Piece.
Background technique
With the fast development of smart machine, the type of sensor is also constantly increasing.However, existing sensor communication
Interface and operation level do not have standard, so there are more othernesses between operation level and communication interface, and the electricity that works
Flat to be concentrated mainly on 1.8V, 3.3V, 5.0V etc., there are also communication interfaces based on IIC and SPI, and IIC and SPI are bidirectional interface.
The operation level of microcontroller also there are many, this just causes certain difficulty in the design of product.For example, microcontroller works
Voltage is 3.3V, and the operating voltage of a certain sensor is 1.8V, needs in addition to increase level translator at this time and just can satisfy work
The condition of work.As soon as then needing plurality of level conversion chip in circuit design, so assuming that needing multiple sensors in product
It is unfavorable for the miniaturization of product.
Utility model content
In view of the above problems, the purpose of this utility model is to provide a kind of sensors for being compatible with a variety of different operating voltages
's
To achieve the above object, the programmable chip of a kind of integrated bi-directional level switch module provided by the utility model,
Wherein, the voltage selector being equipped with including chip carrier, on chip carrier, the LDO low pressure being connect respectively with voltage selector
Difference linear constant voltage regulator and level switch module, the Logic control module being connect with voltage selector, and on chip carrier respectively
The VOUT power supply output pin that is equipped with, VCC chip energization pins, VSS grounding pin, PA1_CPU external communication I/O pin and
PA1_CPU internal communication I/O pin.1/2 control foot, 4/5 input pin and 6 output pins are respectively arranged on voltage selector.4/5
Input pin is connect with LDO low pressure difference linear voltage regulator, and 1/2 control foot is connect with Logic control module, and 6 output pins and level turn
Change the mold block connection.PA1_CPU external communication I/O pin and PA1_CPU internal communication I/O pin connect with Logic control module respectively
It connects, level switch module is connect with PA1_CPU internal communication I/O pin.LDO low pressure difference linear voltage regulator, voltage selector and
Logic control module is connect with VCC chip energization pins and VSS grounding pin respectively.Outside level switch module and PA1_CPU
I/O pin connection is communicated, voltage selector is connect with VOUT power supply output pin.
In some embodiments, level switch module includes first resistor and second resistance, and at least one set of NMOS
Pipe；One end of the first resistor is connected with VOUT power supply output pin and 6 output pins and the grid of NMOS tube respectively；Institute
The other end for stating first resistor is connected with the source electrode of PA1_CPU external communication I/O pin, NMOS tube respectively；The NMOS tube
Drain electrode be connected with the PA1_CPU internal communication I/O pin of the first end of second resistance and Logic control module；Described second
The other end of resistance is connected with VCC chip energization pins.
In some embodiments, the threshold voltage of NMOS tube is less than the minimum value of convertible low-voltage.?
In some embodiments, voltage selector is connected by two 1/2 control feet with Logic control module, in chip
LDO low pressure difference linear voltage regulator equipped at least two corresponding different voltages
In some embodiments, in level switch module NMOS tube, first resistor, second resistance group number and PA1_
The quantity of CPU external communication I/O pin is identical.
In some embodiments, programming data pin, Mbus pin, reset pin are additionally provided on chip carrier
And universal input/output interface, it is connected respectively with the corresponding interface on the Logic control module of chip interior.
In some embodiments, VOUT power supply output pin is the power supply of external low-voltage equipment.
In some embodiments, first resistor, second resistance are pull-up resistor.
The utility model has the beneficial effects that due to the programmable chip of integrated bi-directional level switch module, by Multi-path electricity
Flat conversion module and conventional microcontroller are integrated in inside an encapsulation, can be by programming selection switching levels size to realize
The sensor of compatible a variety of different operating voltages.Realize LDO, Logic control module, level switch module it is integrated, in the chips
Can be as needed, the selection converted by software realization varying level；Meanwhile can according to different demands, to the conversion module into
Row increases, such as system needs while realizing 1.8V to 5V level conversion and 3.3V to 5V level conversion, then only needs above-mentioned
Scheme adds one group of electrical level selector and level switch module.It realizes that a chips integrate plurality of level conversion, avoids more
The increase of kind varying level peripheral hardware bring system design complexity and cloth plate suqare.
Detailed description of the invention
Fig. 1 is the structural block diagram of the utility model；
Fig. 2 is the circuit diagram of the utility model.
Specific embodiment
Utility model is described in further detail with reference to the accompanying drawing.
As shown in Figs. 1-2, a kind of programmable chip of integrated bi-directional level switch module, including chip carrier, in chip
Voltage selector that carrier is equipped with, the LDO low pressure difference linear voltage regulator and level conversion mould being connect respectively with voltage selector
Block, the Logic control module being connect with voltage selector, and be respectively equipped on chip carrier VOUT power supply output pin,
VCC chip energization pins, VSS grounding pin, PA1_CPU external communication IO pin and PA1_CPU internal communication I/O pin.Electricity
1/2 control foot, 4/5 input pin and 6 output pins are respectively arranged on pressure selector.4/5 input pin and LDO low pressure difference linearity are steady
Depressor connection, 1/2 control foot are connect with Logic control module, and 6 output pins are connect with level switch module.It is logical outside PA1_CPU
News IO pin and PA1_CPU internal communication I/O pin are connect with Logic control module respectively, level switch module and PA1_CPU
The connection of internal communication I/O pin.LDO low pressure difference linear voltage regulator, voltage selector and Logic control module respectively with VCC chip
Energization pins are connected with VSS grounding pin.Level switch module is connect with PA1_CPU external communication I/O pin, voltage selector
It is connect with VOUT power supply output pin.Level switch module includes first resistor and second resistance, and at least one set of NMOS tube；
One end of the first resistor is connected with VOUT power supply output pin and 6 output pins and the grid of NMOS tube respectively；It is described
The other end of first resistor is connected with the source electrode of PA1_CPU external communication I/O pin, NMOS tube respectively；The NMOS tube
Drain electrode is connected with the PA1_CPU internal communication I/O pin of the first end of second resistance and Logic control module；Second electricity
The other end of resistance is connected with VCC chip energization pins.The threshold voltage of NMOS tube is less than the minimum value of convertible low-voltage.Electricity
Pressure selector is connected by two 1/2 control feet with Logic control module, and at least two corresponding different voltages are equipped in chip
LDO low pressure difference linear voltage regulator level switch module in NMOS pipe, first resistor, second resistance group number and PA1_CPU outside
The quantity that portion communicates I/O pin is identical.Be additionally provided with programming data pin on chip carrier, Mbus pin, reset pin and
Universal input/output interface is connected with the corresponding interface on the Logic control module of chip interior respectively.The output of VOUT power supply
Pin is the power supply of external low-voltage equipment.First resistor, second resistance are pull-up resistor.
The voltage selector of selection goes out system for two into four, i.e., can by 1/2 two low and high levels for controlling pins of adjusting
With the voltage for selecting 4 kinds of height of corresponding output different.For ease of description, in figure only for exporting 3.3V and 1.8V.And
When external low level equipment is equipped with an external communication IO pin incessantly (such as PA2 in Fig. 2), it is only necessary to be multiplexed one group
NMOS tube, first resistor, second resistance, i.e. Q1 and Q2, R1 and R2, R3 with R4 function are identical with effect.In reality
When design encapsulation, the circuit can be increased and decreased as needed.4/5 foot of voltage selector is input pin, connects built-in chip type
LDO (level conversion that LDO is realized may be less than the free voltage of VCC).6 feet are output pin, connect VOUT to outer low pressure
Equipment power supply, while connecting 1 end of pull-up resistor R1, R2；Connect the grid of NMOS tube Q1, Q2；1/2 pin is control pin,
Internal main logic control module is connected, the low and high level control output pin 6 of the two pins is connect with input pin 4 or 5.?
1, when 2 feet are low level, output pin connects 4 feet, exports 1.8V；When 1 foot is low level, and 2 feet are high level, output pin
5 feet are connected, 3.3V is exported.2 ends of the source electrode connection pull-up resistor R2 of NMOS tube Q1, while passing through PA1 external communication I/O pin
Connect external low level equipment；2 ends of the pull-up resistor R3 of drain electrode connection high voltage part, pass through PA1_CPU internal communication IO
Pin is connect with internal Logic control module.
Working principle: 1) supply voltage of system is 5V, needs to be communicated with the external equipment of 3.3V, then patrols to master
When collecting control module programming, the level of two pins of L1, L2 exports 0,1 respectively, and control lever selection module exports 3.3V.2)
In PA1 and PA1_CPU without (PA1_CPU exports PA1 when high or PA1_CPU is input pin when PA1 is input pin when pulling down
Output is height), low-voltage part PA1 is pulled to 3.3V by pull-up resistor R2, and the grid and source electrode of NMOS tube are all 3.3V, i.e.,
VGS=0, the opening threshold value lower than Q1, Q1 are not turned on.This allows for PA1_CPU pin to draw by pull-up resistor R3 to 5V.At this time
PA1 and PA1_CPU is high level, and only voltage is different.3) when low-voltage end PA1 exports low level, the VGS=of Q1
3.3V is higher than threshold value, Q1 conducting；Then high voltage part PA1_CPU pulls down to low level by PA1 by the Q1 be connected.At this time
PA1 and PA1_CPU is low level, and voltage is identical.4) when high voltage end PA1_CPU exports low level, the drain electrode quilt of Q1
It drags down, while grid is pulled low also by the diode inside NMOS, until VGS is more than threshold value, Q1 is begun to turn on, low-pressure end
PA1 is further pulled down to low level.PA1 and PA1_CPU is low level at this time, and voltage is identical.Above procedure realizes
Logic level is transmitted in the both direction of bus system.1st point performs the lever selection of low-voltage part, and the 2nd point performs
Level conversion function, the 3rd, 4 point of " line with " function of realizing between high voltage part and low-voltage part route.When controller to
When external equipment sends data, PA1_CPU is output pin, and PA1 is input pin.When controller needs to export high level, according to
1st point, PA1_CPU exports high level, and PA1 can be synchronized by level shifting circuit as high level；When controller need to export it is low
When level, according to the 4th point, PA1_CPU exports low level, and PA1 can be synchronized by level shifting circuit as low level.External equipment
As data receiver, controller can be had correctly received and want the data sent.When controller reads data to external equipment,
PA1_CPU is input pin, and PA1 is output pin.According to the 1st point, PA1 exports high level, and PA1_CPU passes through level shifting circuit
It can synchronize as high level；According to the 3rd point, PA1 exports low level, and PA1_CPU can be synchronized by level shifting circuit as low electricity
It is flat.At this point, controller can have correctly received controller and want the data sent as data receiver.The system is in addition to realizing
Except level conversion between 3.3V and 5V, moreover it is possible to realize the level conversion between 1.8V or other voltages and 5V.Wherein want
It asks and is necessarily less than 5V (VCC) for low-voltage portion voltage.The voltage of low-pressure section has to be larger than the threshold voltage of built-in NMOS tube,
Namely allow for sufficiently opening NMOS (Q1/Q2), in the present embodiment, as long as the threshold value of NMOS tube be less than 1.8V and
The minimum value of 3.3V, the threshold value of NMOS tube can choose as 1.2V, i.e. VGS (th) < 1.2V.Level conversion is obtained simultaneously
Ability is 1.2V~5V.The level wherein converted can be set by built-in different LDO.
Be additionally provided with programming data ICPDA pin on chip carrier, Mbus ICPCLK pin, reset REST pin and
Universal input exports GPIO interface, is connected respectively with the corresponding interface on the Logic control module of chip interior.Pass through programming
Data ICPDA pin and Mbus ICPCLK pin are programmed the program of Logic control module.
Above-described is only some embodiments of the utility model.For those of ordinary skill in the art,
Without departing from the concept of the present invention, various modifications and improvements can be made, these belong to practical new
The protection scope of type.
Claims (8)
1. a kind of programmable chip of integrated bi-directional level switch module, which is characterized in that including chip carrier, in chip carrier
The voltage selector that is equipped with, the LDO low pressure difference linear voltage regulator being connect respectively with voltage selector and level switch module,
The Logic control module being connect with voltage selector, and the VOUT power supply output pin, the VCC that are respectively equipped on chip carrier
Chip energization pins, VSS grounding pin, PA1_CPU external communication IO pin and PA1_CPU internal communication IO pin；
1/2 control foot, 4/5 input pin and 6 output pins are respectively arranged on the voltage selector；Described 4/5
Input pin is connect with LDO low pressure difference linear voltage regulator；The 1/2 control foot is connect with Logic control module；Described
6 output pins are connect with level switch module；
The PA1_CPU external communication IO pin and PA1_CPU internal communication IO pin respectively with Logic control module
Connection；The level switch module is connect with PA1_CPU internal communication IO pin；
LDO low pressure difference linear voltage regulator, voltage selector and the Logic control module draws with the power supply of VCC chip respectively
Foot is connected with VSS grounding pin；
The level switch module is connect with PA1_CPU external communication IO pin；The voltage selector and VOUT
The connection of power supply output pin.
2. the programmable chip of a kind of integrated bi-directional level switch module according to claim 1, which is characterized in that institute
The level switch module stated includes first resistor and second resistance, and at least one set of NMOS pipe；The one of the first resistor
The grid respectively with VOUT power supply output pin and 6 output pins and NMOS pipe is held to be connected；The first resistor it is another
One end is connected with the source electrode of PA1_CPU external communication IO pin, NMOS pipe respectively；The drain electrode of the NMOS pipe
It is connected with the PA1_CPU internal communication IO pin of the first end of second resistance and Logic control module；Second electricity
The other end of resistance is connected with VCC chip energization pins.
3. a kind of programmable chip of integrated bi-directional level switch module according to claim 2, which is characterized in that institute
The threshold voltage for the NMOS pipe stated is less than the minimum value of convertible low-voltage.
4. the programmable chip of a kind of integrated bi-directional level switch module according to claim 1, which is characterized in that institute
The voltage selector stated is connected by two 1/2 control feet with Logic control module, and it is corresponding that at least two are equipped in chip
The LDO low pressure difference linear voltage regulator of different voltages.
5. a kind of programmable chip of integrated bi-directional level switch module according to claim 2, which is characterized in that institute
State NMOS pipe in level switch module, first resistor, the group number of second resistance and PA1_CPU external communication IO pin
Quantity is identical.
6. the programmable chip of a kind of integrated bi-directional level switch module according to claim 1, which is characterized in that institute
It states and is additionally provided with programming data pin on chip carrier, Mbus pin, reset pin and universal input/output interface, respectively
It is connected with the corresponding interface on the Logic control module of chip interior.
7. a kind of programmable chip of integrated bi-directional level switch module according to claim 2, which is characterized in that institute
The VOUT power supply output pin stated is the power supply of external low-voltage equipment.
8. a kind of programmable chip of integrated bi-directional level switch module according to claim 2, which is characterized in that institute
State first resistor, second resistance is pull-up resistor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822023747.5U CN209201051U (en) | 2018-12-04 | 2018-12-04 | A kind of programmable chip of integrated bi-directional level switch module |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822023747.5U CN209201051U (en) | 2018-12-04 | 2018-12-04 | A kind of programmable chip of integrated bi-directional level switch module |
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| CN209201051U true CN209201051U (en) | 2019-08-02 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110989472A (en) * | 2019-12-30 | 2020-04-10 | 威创集团股份有限公司 | Equipment and method for being compatible with different level standards |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110989472A (en) * | 2019-12-30 | 2020-04-10 | 威创集团股份有限公司 | Equipment and method for being compatible with different level standards |
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