CN1987839A - Automatic configurating system for PCI-E bus - Google Patents
Automatic configurating system for PCI-E bus Download PDFInfo
- Publication number
- CN1987839A CN1987839A CN 200510135325 CN200510135325A CN1987839A CN 1987839 A CN1987839 A CN 1987839A CN 200510135325 CN200510135325 CN 200510135325 CN 200510135325 A CN200510135325 A CN 200510135325A CN 1987839 A CN1987839 A CN 1987839A
- Authority
- CN
- China
- Prior art keywords
- pci
- bus
- bus slot
- slot
- expansion card
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Bus Control (AREA)
Abstract
A PCI-E main line automatically collocating system, and it mainly includes examination module and switch module. The examination module examine the first PCI-E main line slot with the bigger width of message path and the state value of logic signal of the second PCI-E main line slot with smaller width of message path., and obtain the information whether there is extended card in the first and second main line slot. If the examination module examines there is an extended card in the slot of the first PCI-E main line and there is not card in the second PCI-E slot, it can produce the output of switch control signal, and control the switch module to do switch. The message path which is used by the second PCI-E main line slot can be used by the first PCI-E slot. This invention can improve the usage efficient of the PCI-E message path and the velocity of the transmission, overcome the disadvantage of there is no flexibility of the PCI-E main line design.
Description
Technical field
The invention relates to a kind of PCI Express (Peripheral Component InterconnectExpress; PCI-E) bus automatic configuration system particularly is applied in the computer system about a kind of, the PCI-E bus automatic configuration system that PCI-E bus channel (Lane) is configured.
Background technology
Along with electronics and improvement of computer science and realize function from strength to strength, now can be by carrying new peripherals upgrade function or increasing new function, but carry and to restart computer system behind the new peripherals and finish peripherals and drive and load, need stop existing operation like this, very inconvenience on reality is used, particularly time remaining and high reliability are had the very equipment such as server of high request, can cause serious consequences such as loss of data, service disruption.
Therefore; industry proposes a kind of hot plug function expansion card interconnection technique that has; PCI (Peripheral Component Interconnection) (being designated hereinafter simply as the PCI technology) is as input and output (I/O) interface of computer system; PCI has become the bus standard that computer system is generally supported now; it is to aim at peripherals; the interconnection mechanism of expansion card and processor/memory system design; can be with various expansion cards; hard disk or CD-ROM drive connecting system; realizing two-way communication between the equipment and between equipment and Installed System Memory and the processor; its maximum characteristics are to allow the user to carry out online upgrading under the situation that need not turn off or suspend computing machine; change; add PCI peripherals; and do not need restarting operating systems to use; reduced the time of plan and non-programmed halt significantly; for the user provides availability to greatest extent, promoted performance of computer systems.
Existing P CI bus is the interface of being developed before 10 years by Intel, is operated under 33MHz and 32 environment, and the theoretical bandwidth peak value is per second 132MB.It uses the shared bus topological structure, and promptly bus bandwidth is shared between a plurality of equipment, thereby realizes the communication between the distinct device on the bus.Along with the development of equipment, the new equipment that takies massive band width begins to engulf the bandwidth of miscellaneous equipment on the shared bus.For example, the 1G network interface card can be monopolized 95% pci bus bandwidth.Like this, the network on-line velocity potential must be subjected to influence to a certain degree.Along with the upgrading day by day of other accessory performance of computer system, the PCI technology also can't satisfy the needs of computer system gradually, at this moment just needs a kind of new technology and replaces the PCI technology, provides system higher bandwidth.
In order to offer the bandwidth of novel device requirement, PC employer's organization and peripherals manufacturer have developed PCI Express bus together, and use on computer equipment in 2004.At present, most of computer equipment from top supplier has comprised a PCI Express (being designated hereinafter simply as PCI-E) bus slot at least.With respect to pci bus, the PCI-E bus adopts connected in series, point-to-point, low-voltage differential signal (Low-Voltage-Differential-Signal; LVDS) carry out data transmission, have data rate height, low noise advantages.Under PCI-E bus standard technology, basic PCI-E bus connection is defined as two couples of LVDS, and wherein a LVDS sends signal, another LVDS received signal.This connection also is defined as channel (Lane), and this channel has the transmission speed of folk prescription to the 250M bps.The number of channel represents that more at most the bandwidth that the PCI-E bus provides is high more.
In addition, be different from pci bus bandwidth is given all devices on the bus, the PCI-E bus provides the data transmission channel to each device-specific, data send and received signal by the channel corresponding with it (Lane), and with the serial transmission of package (package) form, and a plurality of channels can be combined and form x1 (" single channel "), x2, x4, x8, x12, x16 and x32 channel, thereby improve the bandwidth of slot.With respect to traditional PCI bus, the PCI-E bus has greatly improved data transfer bandwidth, has reduced the demand to circuit board and internal memory, and has realized faster data transmission.
As mentioned above, the bandwidth that provides of PCI-E bus is by its number of channel decision.The mainboard of computing machine generally is by hardware circuit design the PCI-E bus channel to be fixedlyed connected with the PCI-E bus slot on the computer motherboard at present, makes the PCI-E bus give each PCI-E bus slot fixing bandwidth.For example, if computer motherboard is provided with PCI-E * 4 buses and PCI-E * 8 bus slots, the PCI-E bus has 8 channels, these 8 channel mean allocation are given this PCI-E * 4 buses and PCI-E * 8 bus slots, carry out rapid data transmission for the expansion card that is inserted on this PCI-E * 4 buses and PCI-E * 8 bus slots by its dedicated channel and computer system memory.But, if do not peg graft expansion card on PCI-E * 4 bus slots, only on PCI-E * 8 bus slots during the grafting expansion card, as mentioned above, because the channel on the PCI-E is given PCI-E * 4 buses and PCI-E * 8 bus slots by mean allocation, the channel that is connected to PCI-E * 4 bus slots is by idle, cause the pci bus local channel not to be used effectively, influenced data rate, the part inputoutput bandwidth of PCI-E bus is wasted, and the design of PCI-E bus has also lost elasticity.
Therefore, how a kind of PCI-E bus automatic configuration system is provided, avoid PCI-E bus design in the prior art not have the PCI-E bus channel that elasticity, channel configuration fixedly causes and effectively to utilize, influence shortcomings such as data rate, become present industry problem demanding prompt solution.
Summary of the invention
For overcoming the shortcoming of above-mentioned prior art, fundamental purpose of the present invention is to provide a kind of PCI-E (Peripheral Component Interconnect Express) the bus automatic configuration system, promote the utilization factor of PCI-E bus channel, improve data rate.
Another purpose of the present invention is to provide a kind of PCI-E bus automatic configuration system, avoids not rubber-like shortcoming of existing PCI-E bus design.
For realizing above-mentioned and other purpose, the invention provides a kind of PCI-E bus automatic configuration system, be applied in the computer system, this computer system has a PCI-E bus slot of big channel width and the 2nd PCI-E bus slot with less channel width at least, this first and second PCI-E bus slot has grounding leg respectively, this PCI-E bus channel optionally provides this first and second PCI-E bus slot to use, this PCI-E bus automatic configuration system comprises: detection module, detect logical signal state value on the grounding leg on this first and second PCI-E bus slot, obtain whether to have on this first and second PCI-E bus slot the information of expansion card insertion, and detect at this detection module and to have expansion card to insert on the PCI-E bus slot, when not having expansion card to insert on the 2nd PCI-E bus slot, produce switch-over control signal and output; And handover module, the switch-over control signal of exporting according to this detection module carries out change action, uses to a PCI-E bus slot channel allocation that the 2nd PCI-E bus slot uses.
In the present invention, this detection module comprises: at least two detecting units, and these two detecting units are connected with this first and second PCI-E bus slot respectively, detect the logical signal state value of grounding leg on this first and second PCI-E bus slot respectively; And switch-over control signal generation unit, detecting at this detecting unit has expansion card to insert on the PCI-E bus slot, when not having expansion card to insert on the 2nd PCI-E bus slot, produce one and switch signal output, control this handover module and carry out corresponding change action.
In addition, among the present invention, do not have expansion card to insert on the PCI-E bus slot if this detection module detects, this detection module produces a state holding signal and outputs to this handover module, makes this handover module not do change action and keep current state.
In addition, in the present invention, the testing circuit that above-mentioned detecting unit is made up of transistor (transistor), buffer (Buffer) and peripheral electronic component and circuit.
Compared with prior art, PCI-E bus automatic configuration system of the present invention is mainly by the logical signal state value of first and second PCI-E bus slot grounding leg of detection module detection computations machine system, obtain whether to have on this first and second PCI-E bus slot expansion card to insert, if detecting, this detection module have expansion card to insert on the PCI-E bus slot, when not having expansion card to insert on the 2nd PCI-E bus slot, produce switch-over control signal and output, control this handover module and carry out change action, use to a PCI-E bus slot channel that the 2nd PCI-E bus slot uses.Therefore, the present invention can will allocate the 2nd PCI-E bus slot channel that has less channel width to this in advance on this PCI-E bus, distributing to this PCI-E bus slot with big channel width uses, can improve the speed that the expansion card that is inserted on the PCI-E bus slot and this computer system are carried out data transmission, this PCI-E bus channel is also effectively utilized, the problem that the PCI-E bus channel of avoiding PCI-E bus channel and PCI-E bus slot in the prior art to be connected and fixed causing can't effectively be utilized makes the PCI-E bus design have elasticity.
Description of drawings
Fig. 1 is the basic framework synoptic diagram of PCI-E bus automatic adjustment system of the present invention.
Embodiment
Embodiment
Fig. 1 is PCI-E of the present invention (Peripheral Component Interconnect Express; PCI-E) the basic framework synoptic diagram of bus automatic configuration system.PCI-E bus automatic configuration system of the present invention is applied in (figure is mark not) in the computer system, this computer system comprises at least: two groups of PCI-E bus slots, for simplifying accompanying drawing and explanation, comprise that with this computer system first and second PCI- E bus slot 20,21 is that example describes below.In addition, this computer system also comprises central processing unit (CPU), north bridge chips (NB) or South Bridge chip (SB).
In the present invention, first and second PCI-E bus slot the 20, the 21st, the PCI-E bus slot of single channel (* 1), two channels (* 2), four channels (* 4), eight channels (* 8), 16 channels specifications such as (* 16) has grounding leg GND on this first and second PCI-E bus slot.In the present invention, the one PCI-E bus slot 20, the 2nd PCI-E bus slot 21 have different channel width (lane width), be respectively that PCI-E * 8 bus slots and PCI-E * 4 bus slots are that example describes with first and second PCI- E bus slot 20,21 below, but do not limit the scope of the invention with this.Accordingly, PCI-E bus 1 of the present invention is the PCI-E bus with 8 channels, when all having expansion card to insert on first and second PCI- E bus slot 20,21 and moving, 8 channel mean allocation of PCI-E bus 1 are to first and second PCI- E bus slot 20,21.
See also Fig. 1, this PCI-E bus automatic configuration system comprises: detection module 10 and handover module 11.Below detection module 10 and handover module 11 are elaborated.
In the present invention, inserted the first and/or the 2nd PCI-E bus slot at 20,21 o'clock as expansion card, first and or the 2nd PCI- E bus slot 20,21 on grounding leg contact with the expansion card grounding leg (being expansion card ground signalling golden finger (finger)) that connects thereon, circuit corresponding on this expansion card grounding leg and this computing machine is connected, form signaling path.If default this grounding leg of this computer system is an electronegative potential, be that logical signal " 0 " is effective, when having expansion card, inserts the slot of first and second PCI- E bus slot 20,21, this first and second PCI-E bus slot grounding leg has the logical zero signal to produce, otherwise, if first and second PCI- E bus slot 20,21 does not have expansion card to insert, these first and second PCI- E bus slot 20,21 grounding leg suspension joints (floating), at this moment, these first and second PCI- E bus slot 20,21 grounding legs have logical signal " 1 " to produce.
As mentioned above, detection module 10 is by the logical signal state value (for example being logical signal " 0 " or " 1 ") of first and second PCI- E bus slot 20,21 grounding leg GND output, and whether know has expansion card to insert on this first and second PCI-E bus slot.For example, if detection module 10 detects the grounding leg output logic signal " 1 " of a PCI-E bus slot 20, the grounding leg output logic signal " 0 " of the 2nd PCI-E bus slot 21, then producing on expression the one PCI-E bus slot 20 does not have expansion card to insert, there is expansion card to insert on the 2nd PCI-E bus slot 21, at this moment detection module 10 produces a switching signal according to testing result, and outputs to handover module 11.
In addition, if detection module 10 detects the grounding leg output logic signal " 0 " of first and second PCI- E bus slot 20,21, then represent all to have on first and second PCI- E bus slot 20,21 expansion card to insert; If detection module 10 detects the grounding leg output logic signal " 1 " of a PCI-E bus slot 20, the grounding leg output logic signal " 0 " of the 2nd PCI-E bus slot 21, then represent not have on the PCI-E bus slot 20 expansion card to insert, have expansion card to insert on the 2nd PCI-E bus slot 21; Moreover, if detection module 10 detects the grounding leg output logic signal of first and second PCI- E bus slot 20,21 and is " 1 ", then represent all not insert on first and second PCI- E bus slot 20,21 expansion card, at this moment a kind of according in above-mentioned three kinds of testing results of detection module 10 produces a state holding signal and outputs to handover module 11.
In addition, if detection module 10 detects the grounding leg GND output logic signal " 1 " of a PCI-E bus slot 20, the grounding leg GND output logic signal " 0 " of the 2nd PCI-E bus slot 21, then represent not insert expansion card on the PCI-E bus slot 20, and expansion card is arranged on the 2nd PCI-E bus slot 21, as mentioned above, the 2nd PCI-E bus slot 21 is 4 channel specifications slots, existing 4 channels of the 2nd PCI-E bus slot are connected with it, at this moment detection module 10 produces a state holding signal and outputs to handover module 11, makes handover module 11 not do change action and keeps current state.For example, if detection module 10 detects the grounding leg GND output logic signal " 1 " of a PCI-E bus slot 20, the grounding leg GND output logic signal " 1 " of the 2nd PCI-E bus slot 21, or the logical signal state value that detecting unit 100 detects the grounding leg GND output of a PCI-E bus slot 20 is " 0 ", the logical signal state value that detecting unit 100 detects the grounding leg GND output of the 2nd PCI-E bus slot 21 is " 0 ", then represent first and second PCI-E bus slot 20, all do not insert expansion card on 21, at this moment, detection module 10 produces a state holding signal and outputs to handover module 11, makes handover module 11 not do change action and keeps current state.Therefore, the present invention not only can promote the efficient that PCI-E bus 1 channel uses, the speed of data transmission, and can make the design of PCI-E bus have elasticity.
In the present invention, above-mentioned detection module 10 also comprises two detecting units 100,101 and switch-over control signal generation unit 102 at least.Below detecting unit 100,101 and switch-over control signal generation unit 102 are elaborated.
Detecting unit 100,101 is connected with first and second PCI-E bus slot respectively, detect the logical signal state value (i.e. " 0 " or " 1 ") of the grounding leg GND output of this first and second PCI-E bus slot respectively, whether obtain first and second PCI- E bus slot 20,21 respectively has expansion card to insert, and produce testing result respectively and output to switch-over control signal generation unit 102, switch-over control signal generation unit 102 is handled the testing result of its reception.As mentioned above, if it is " 0 " that detecting unit 100 detects the grounding leg GND output logic signal state value of a PCI-E bus slot 20, the GND output logic signal state value that detecting unit 101 detects the 2nd PCI-E bus slot is " 1 ", then switch-over control signal generation module 102 is according to detecting unit 100,101 testing result, produce a switching control signal and output to handover module 11, control this handover module 11 and carry out change action, use to a PCI-E bus slot 20 channel allocation of using in the PCI-E bus 1 the 2nd PCI-E bus slot 21; If it is " 1 " that detecting unit 100 detects the grounding leg GND output logic signal state value of a PCI-E bus slot 20, the grounding leg GND output logic signal state value that detecting unit 101 detects the 2nd PCI-E bus slot is " 0 ", then switch-over control signal generation unit 102 is according to the testing result of detecting unit 100,101, produce a state holding signal and output to handover module 11, make this handover module 11 not do change action and keep current state; If it is " 1 " that detecting unit 100 detects the grounding leg GND output logic signal state value of a PCI-E bus slot, the grounding leg GND output logic signal state value that detecting unit 101 detects the 2nd PCI-E bus slot is " 1 ", or the grounding leg GND output logic signal state value that detecting unit 100 detects a PCI-E bus slot is " 0 ", the grounding leg GND output logic signal state value that detecting unit 101 detects the 2nd PCI-E bus slot is " 0 ", then switch-over control signal generation unit 102 is according to detecting unit 100,101 testing result, produce a state holding signal and output to handover module 11, make this handover module 11 not do change action and keep current state.
Above-mentioned detecting unit the 101, the 102nd, the testing circuit of forming by transistor (Transistor), buffer (Buffer) and peripheral electronic component thereof and circuit.But, look the actual design needs, also available intimate electron device of each element of above-mentioned testing circuit or electronic circuit replacing.Each element principle of work of this testing circuit is that industry is existing, therefore repeats no more.
In addition, in the present invention, when above-mentioned detection module 10 detects first and second PCI-E bus slot and all has expansion card to insert, the grounding leg logical signal state value that is first and second PCI-E bus slot all is logical signal " 0 ", whether detection module 10 of the present invention also can detect this first and second pci bus and move, detecting the 2nd not operation of PCI-E bus slot 21 that this has less channel width, when this had a PCI-E bus slot 20 operations of big channel width, handover module 11 had the PCI-E bus slot of big channel width with the channel that the 2nd PCI-E bus slot 21 uses to this.
Compared with prior art, PCI-E bus automatic configuration system of the present invention is mainly by detection module 10 first and second PCI-E bus slots (20 of detection computations machine system, 21) the logical signal state value of grounding leg, obtain this first and second PCI-E bus slot (20,21) information that whether has expansion card to insert, if detecting on the PCI-E bus slot 20, this detection module 10 have expansion card to insert, when not having expansion card to insert on the 2nd PCI-E bus slot 20, produce switch-over control signal and output, control this handover module 11 and carry out change action, use to a PCI-E bus slot 20 channel that the 2nd PCI-E bus slot 21 uses.Therefore, the present invention can will allocate the channel that has the 2nd PCI-E bus slot 21 of less channel width to this in advance on this PCI-E bus, giving this PCI-E bus slot 20 with big channel width uses, thereby promote the speed that the expansion card be plugged on the PCI-E bus slot 20 and this computer system are carried out data transmission, this PCI-E bus channel has obtained effectively utilizing, the problem that the PCI-E bus channel that can avoid PCI-E bus channel and PCI-E bus slot in the prior art to be connected and fixed causing can't effectively be utilized, so the present invention can make full use of the PCI-E bus channel.
Claims (6)
1. PCI-E bus automatic configuration system, be applied in the computer system, this computer system has a PCI-E bus slot of big channel width and the 2nd PCI-E bus slot of less channel width at least, this first and second PCI-E bus slot has grounding leg respectively, this PCI-E bus channel optionally provides this first and second PCI-E bus slot to use, it is characterized in that this PCI-E bus automatic configuration system comprises:
Detection module, detect logical signal state value on the grounding leg on this first and second PCI-E bus slot, obtain whether to have on this first and second PCI-E bus slot the information of expansion card insertion, and detect at this detection module and to have expansion card to insert on the PCI-E bus slot, when not having expansion card to insert on the 2nd PCI-E bus slot, produce switch-over control signal and output; And
Handover module, the switch-over control signal of exporting according to this detection module carries out change action, uses to a PCI-E bus slot channel allocation that the 2nd PCI-E bus slot uses.
2. PCI-E bus automatic configuration system as claimed in claim 1 is characterized in that this detection module comprises:
At least two detecting units, these two detecting units are connected with this first and second PCI-E bus slot respectively, detect the logical signal state value of grounding leg on this first and second PCI-E bus slot respectively; And
The switch-over control signal generation unit, detecting at this detecting unit has expansion card to insert on the PCI-E bus slot, when not having expansion card to insert on the 2nd PCI-E bus slot, produce one and switch signal output, control this handover module and carry out corresponding change action.
3. PCI-E bus automatic configuration system as claimed in claim 2 is characterized in that, the testing circuit that this detecting unit is made up of transistor, buffer and peripheral electronic component and circuit.
4. PCI-E bus automatic configuration system as claimed in claim 1, it is characterized in that, if detecting, this detection module do not have expansion card to insert on the PCI-E bus slot, this detection module produces a state holding signal and outputs to this handover module, makes this handover module not do change action and keep current state.
5. PCI-E bus automatic configuration system as claimed in claim 1 is characterized in that this expansion card kind comprises: floppy disk, hard disk drive, CD drive, CD writer, DVD drive, sound card or network interface card.
6. PCI-E bus automatic configuration system as claimed in claim 1 is characterized in that this computer equipment also comprises central processing unit, north bridge chips or South Bridge chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101353251A CN100424668C (en) | 2005-12-20 | 2005-12-20 | Automatic configurating system for PCI-E bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101353251A CN100424668C (en) | 2005-12-20 | 2005-12-20 | Automatic configurating system for PCI-E bus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1987839A true CN1987839A (en) | 2007-06-27 |
| CN100424668C CN100424668C (en) | 2008-10-08 |
Family
ID=38184638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005101353251A Expired - Fee Related CN100424668C (en) | 2005-12-20 | 2005-12-20 | Automatic configurating system for PCI-E bus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100424668C (en) |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101382925B (en) * | 2007-09-03 | 2011-07-20 | 英业达股份有限公司 | Method for dynamically allocating vertical card chain circuit width |
| CN103516961A (en) * | 2013-07-19 | 2014-01-15 | 北京淳中视讯科技有限公司 | Image processor, preparing method thereof and mother card |
| CN103729042A (en) * | 2014-01-20 | 2014-04-16 | 浪潮电子信息产业股份有限公司 | PCIE (peripheral communication interface express) intelligent switching method based on PCIE hot plug function |
| CN106951383A (en) * | 2017-04-19 | 2017-07-14 | 深圳市同泰怡信息技术有限公司 | The mainboard and method of a kind of raising PCIE data channel utilization rates |
| CN107704403A (en) * | 2017-09-28 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of device and method for optimizing the transmission of eutergum signal |
| CN108984453A (en) * | 2018-07-12 | 2018-12-11 | 山东超越数控电子股份有限公司 | A kind of PCIE bus velocity-measuring system and method based on Shen prestige platform |
| CN109828942A (en) * | 2017-11-23 | 2019-05-31 | 凌华科技股份有限公司 | Intelligent PCIe slot channel distribution method |
| CN110008159A (en) * | 2019-04-11 | 2019-07-12 | 苏州浪潮智能科技有限公司 | PCIE width automatic adaptation method, device and electronic equipment and storage medium |
| CN110737621A (en) * | 2019-09-03 | 2020-01-31 | 北京立华莱康平台科技有限公司 | Interface switching method, system, device, storage medium and processor |
| CN111327878A (en) * | 2018-12-17 | 2020-06-23 | 雪力光纤有限公司 | Method for constructing video bus, video bus arrangement structure, plug-in card, endoscope |
| TWI704362B (en) * | 2019-06-19 | 2020-09-11 | 英業達股份有限公司 | Differential signal detecting device |
| CN113760614A (en) * | 2021-07-30 | 2021-12-07 | 郑州云海信息技术有限公司 | Test control device and test system of PCIE expansion card |
| CN114510445A (en) * | 2022-01-20 | 2022-05-17 | 飞腾信息技术有限公司 | Access equipment identification method and device, computer equipment and storage medium |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7110783B2 (en) * | 2002-04-17 | 2006-09-19 | Microsoft Corporation | Power efficient channel scheduling in a wireless network |
| CN1196988C (en) * | 2002-12-06 | 2005-04-13 | 浙江大学 | PCI-on-chip bus connector |
| CN1527538A (en) * | 2003-03-05 | 2004-09-08 | 北京全向科技有限公司 | Dynamic user's priority management method |
| US7099969B2 (en) * | 2003-11-06 | 2006-08-29 | Dell Products L.P. | Dynamic reconfiguration of PCI Express links |
| TWI246372B (en) * | 2004-04-09 | 2005-12-21 | Asrock Inc | A computer system with PCI express interface |
-
2005
- 2005-12-20 CN CNB2005101353251A patent/CN100424668C/en not_active Expired - Fee Related
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101382925B (en) * | 2007-09-03 | 2011-07-20 | 英业达股份有限公司 | Method for dynamically allocating vertical card chain circuit width |
| CN103516961A (en) * | 2013-07-19 | 2014-01-15 | 北京淳中视讯科技有限公司 | Image processor, preparing method thereof and mother card |
| CN103516961B (en) * | 2013-07-19 | 2016-09-07 | 北京淳中科技股份有限公司 | Image processor and preparation method thereof and master card |
| CN103729042A (en) * | 2014-01-20 | 2014-04-16 | 浪潮电子信息产业股份有限公司 | PCIE (peripheral communication interface express) intelligent switching method based on PCIE hot plug function |
| CN106951383A (en) * | 2017-04-19 | 2017-07-14 | 深圳市同泰怡信息技术有限公司 | The mainboard and method of a kind of raising PCIE data channel utilization rates |
| CN107704403A (en) * | 2017-09-28 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of device and method for optimizing the transmission of eutergum signal |
| CN109828942A (en) * | 2017-11-23 | 2019-05-31 | 凌华科技股份有限公司 | Intelligent PCIe slot channel distribution method |
| CN108984453A (en) * | 2018-07-12 | 2018-12-11 | 山东超越数控电子股份有限公司 | A kind of PCIE bus velocity-measuring system and method based on Shen prestige platform |
| CN111327878A (en) * | 2018-12-17 | 2020-06-23 | 雪力光纤有限公司 | Method for constructing video bus, video bus arrangement structure, plug-in card, endoscope |
| CN111327878B (en) * | 2018-12-17 | 2024-05-03 | 雪力光纤有限公司 | Method for constructing video bus, video bus arrangement, plug-in card and endoscope |
| CN110008159A (en) * | 2019-04-11 | 2019-07-12 | 苏州浪潮智能科技有限公司 | PCIE width automatic adaptation method, device and electronic equipment and storage medium |
| TWI704362B (en) * | 2019-06-19 | 2020-09-11 | 英業達股份有限公司 | Differential signal detecting device |
| CN110737621A (en) * | 2019-09-03 | 2020-01-31 | 北京立华莱康平台科技有限公司 | Interface switching method, system, device, storage medium and processor |
| CN113760614A (en) * | 2021-07-30 | 2021-12-07 | 郑州云海信息技术有限公司 | Test control device and test system of PCIE expansion card |
| CN113760614B (en) * | 2021-07-30 | 2023-09-22 | 郑州云海信息技术有限公司 | Test control device and test system of PCIE expansion card |
| CN114510445A (en) * | 2022-01-20 | 2022-05-17 | 飞腾信息技术有限公司 | Access equipment identification method and device, computer equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100424668C (en) | 2008-10-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100424668C (en) | Automatic configurating system for PCI-E bus | |
| US7447825B2 (en) | PCI-E automatic allocation system | |
| CN100444145C (en) | Dynamic reconfiguration of PCI EXPRESS links | |
| US5923860A (en) | Apparatus, method and system for remote peripheral component interconnect bus using accelerated graphics port logic circuits | |
| US5937173A (en) | Dual purpose computer bridge interface for accelerated graphics port or registered peripheral component interconnect devices | |
| US7024510B2 (en) | Supporting a host-to-input/output (I/O) bridge | |
| KR100366859B1 (en) | Disk Drive Connector Interfaces Used on the PCI Bus | |
| KR100240921B1 (en) | Secondary i/o bus with expanded slot capacity and hot plugging capability | |
| US6792494B2 (en) | Apparatus and method for parallel and serial PCI hot plug signals | |
| US9164938B2 (en) | Method to integrate ARM ecosystem IPs into PCI-based interconnect | |
| Bhatt | Creating a third generation I/O interconnect | |
| US20020099980A1 (en) | Computer system having configurable core logic chipset for connection to a fault-tolerant accelerated graphics port bus and peripheral component interconnect bus | |
| EP0775959B1 (en) | Method and apparatus for optimizing PCI interrupt binding and associated latency in extended/bridged PCI busses | |
| CN110968352B (en) | Reset system and server system of PCIE equipment | |
| CN110554983A (en) | Exchange circuit board | |
| CN100414526C (en) | Method and device for automatically adjusting bus width | |
| US6567880B1 (en) | Computer bridge interfaces for accelerated graphics port and peripheral component interconnect devices | |
| US20080052431A1 (en) | Method and Apparatus for Enabling Virtual Channels Within A Peripheral Component Interconnect (PCI) Express Bus | |
| US6754758B2 (en) | Method and apparatus for utilizing different frequencies on a bus based on a number of cards coupled to the bus | |
| CN210466253U (en) | Server with high-density GPU expansion capability | |
| CN213276462U (en) | Two-way server mainboard and two-way server | |
| CN216352292U (en) | Server mainboard and server | |
| KR20010014989A (en) | Data transfer system | |
| CN115905072A (en) | Computer system, control method based on PCIe device and related device | |
| CN100368956C (en) | Mainframe board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081008 Termination date: 20111220 |