CN108984453A - A kind of PCIE bus velocity-measuring system and method based on Shen prestige platform - Google Patents
A kind of PCIE bus velocity-measuring system and method based on Shen prestige platform Download PDFInfo
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- CN108984453A CN108984453A CN201810764136.8A CN201810764136A CN108984453A CN 108984453 A CN108984453 A CN 108984453A CN 201810764136 A CN201810764136 A CN 201810764136A CN 108984453 A CN108984453 A CN 108984453A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
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Abstract
The present invention provides a kind of PCIE bus velocity-measuring system and method based on Shen prestige platform, including PCIE bus to be measured, Shen prestige platform and test data for receiving the transmission of Shen prestige platform and for recording and feeding back when the FPGA that previous test data transmits time span t used tests the speed board；The PCIE bus of Shen prestige platform processor is connected with PCIE expansion module, and PCIE expansion module is connected by PCIE bus to be measured and the FPGA board that tests the speed；Shen prestige platform is built-in with for testing the speed board with the use of the software unit that tests the speed for detecting the transmission rate of above-mentioned PCIE bus to be measured with FPGA.The invention is used to detect the transmission rate of PCIE bus, realizes and is tested the speed based on Shen prestige platform to PCIE bus, compensates for production domesticization computer etc. and realizes the blank that PCIE bus tests the speed especially on the prestige platform of Shen from primary territory.
Description
Technical field
The present invention relates to PCIE bus transfer rate testing field, specifically a kind of PCIE bus based on Shen prestige platform is surveyed
Speed system and method.
Background technique
PCIE bus is a kind of general bus specification, is that essential bus transfer connects in current computer system
Mouthful.It uses serial interconnection mode, is carried out data transmission in the form of point-to-point, to guarantee that each equipment can enjoy individually
Bandwidth, have been widely used for the fields such as industrial equipment, automation, vehicle-mounted, airborne.
Shen prestige processor is that Jiangnan calculates the processor family with entirely autonomous intellectual property developed, and is used
Alpha framework, and it is based on autonomous instruction set.
And currently, there has been no relevant PCIE buses in production domesticization computer etc. from primary territory, especially Shen prestige platform
Speed-measuring method.
Summary of the invention
The technical problem to be solved by the present invention is in view of the deficiencies of the prior art, provide a kind of based on Shen prestige platform
PCIE bus velocity-measuring system and method test the speed for realizing the PCIE bus based on Shen prestige platform.
In order to solve the above technical problems, the present invention provides a kind of PCIE bus velocity-measuring system based on Shen prestige platform, packet
Include PCIE bus to be measured, Shen prestige platform and test data for receiving the transmission of Shen prestige platform and current for recording and feeding back
The FPGA that secondary test data transmits time span t used tests the speed board；The test data has specific size；
The PCIE bus of Shen prestige platform processor is connected with PCIE expansion module, and PCIE expansion module passes through PCIE bus to be measured and institute
The FPGA stated test the speed board be connected；
Shen prestige platform is built-in with for testing the speed board with the use of the transmission speed for detecting above-mentioned PCIE bus to be measured with FPGA
The software unit that tests the speed of rate.
Wherein, the software unit that tests the speed includes Test data generation module, test data sending module and test knot
Fruit analysis and processing module, in which:
Test data generation module, for generating test data；
Test data sending module, test data for generating above-mentioned Test data generation module pass through described to be measured
PCIE bus is sent to FPGA and tests the speed board；
Test result analysis processing module is respectively connected with the Test data generation module, test data sending module, is used
In receive FPGA test the speed board feedback when previous test data transmits time span t used, and for based on being currently received
Time span t and the data when previous transmission size, calculate and control Shen prestige platform and show above-mentioned PCIE bus to be measured
Transmission rate v.
Wherein, the software unit that tests the speed further includes testing time setup module, the testing time setup module and institute
The test result analysis processing module stated is connected, for the detection time to above-mentioned PCIE bus transfer rate test to be measured to be arranged
Number；
The test result analysis processing module is also used to be greater than in the detection number inputted by testing time setup module
When 1, calls test data sending module to execute the test data of the detection time for several times and cycle through operation, and calculated for corresponding
Show the corresponding transmission rate v of the test data that sends every time with by Shen prestige platform, is also used to calculate and passes through Shen prestige platform
Show the arithmetic mean of instantaneous value of the resulting all transmission rate v of above-mentioned calculating, which is final to be detected described to be measured
The transmission rate of PCIE bus.
Wherein, the FPGA, which tests the speed, is integrated with PCIE bus on board, supports PCIE X4, PCIE X8 and PCIE X16
Bus tests the speed.
With the above-mentioned PCIE bus velocity-measuring system based on Shen prestige platform correspondingly, the present invention also provides one kind be based on Shen
The PCIE bus speed-measuring method of prestige platform, the method comprising the steps of:
S1, Shen prestige platform processor PCIE bus be connected with PCIE expansion module, PCIE expansion module passes through PCIE bus to be measured
It is connected with the FPGA board that tests the speed；The FPGA tests the speed board for receiving Shen prestige platform based on PCIE expansion module hair
The test data sent and for recording and feeding back when previous test data transmits time span t used；
S2, Shen prestige platform are built-in with for testing the speed board with the use of the transmission for detecting above-mentioned PCIE bus to be measured with FPGA
The software unit that tests the speed of rate；
S3, the starting of Shen prestige plateform system；
S4, the software unit that tests the speed starting are sent above-mentioned test data and carried out based on PCIE expansion module to the FPGA board that tests the speed
State the test of PCIE bus transfer rate to be measured.
Wherein, Shen prestige plateform system described in above-mentioned steps s3 starts, comprising steps of
Shen prestige platform electrifying startup, BIOS are identified and are initialized to FPGA velocity measurement plate card；
In kernel start-up course, the bus of board is tested the speed to FPGA and its equipment carries out FIXUP configuration, and distributes interrupt number；
During os starting, load FPGA tests the speed the driving of board, and realizes that the FPGA tests the speed the initialization of board.
Wherein, the software unit that tests the speed includes Test data generation module, test data sending module and test knot
Fruit analysis and processing module, in which:
Test data generation module, for generating test data；
Test data sending module, test data for generating above-mentioned Test data generation module pass through described to be measured
PCIE bus is sent to FPGA and tests the speed board；
Test result analysis processing module is respectively connected with the Test data generation module, test data sending module, is used
In receive FPGA test the speed board feedback when previous test data transmits time span t used, and for based on being currently received
Time span t and the data when previous transmission size, calculate and control Shen prestige platform and show above-mentioned PCIE bus to be measured
Transmission rate v.
Wherein, the software unit that tests the speed further includes testing time setup module, the testing time setup module and institute
The test result analysis processing module stated is connected, for the detection time to above-mentioned PCIE bus transfer rate test to be measured to be arranged
Number；
The test result analysis processing module is also used to be greater than in the detection number inputted by testing time setup module
When 1, calls test data sending module to execute the test data of the detection time for several times and cycle through operation, and calculated for corresponding
Show the corresponding transmission rate v of the test data that sends every time with by Shen prestige platform, is also used to calculate and passes through Shen prestige platform
Show the arithmetic mean of instantaneous value of the resulting all transmission rate v of above-mentioned calculating, which is final to be detected described to be measured
The transmission rate of PCIE bus.
Wherein, the FPGA, which tests the speed, is integrated with PCIE bus on board, supports PCIE X4, PCIE X8 and PCIE X16
Bus tests the speed.
Wherein, the FPGA board that tests the speed records and feeds back the method for transmitting time span t used when previous test data
Are as follows:
After FPGA velocity measurement plate is stuck in the transmission data notification for receiving the software unit that tests the speed in the prestige platform of Shen, the reception of board firmware
Flag set is to start to receive begin, records time t1；
After the completion of data receiver to be tested, reception flag position position records time t2 to complete end；
It is tested the speed later as FPGA and works as time span t=t2-t1 used in the transmission of previous test data described in board internal calculation；
Finally by FPGA velocity measurement plate card by FPGA in its internal firmware and Shen prestige platform test the speed board driving driving interface
Communication calculated deserves previous test data and transmits time span t=t2-t1 used to feed back to the software unit that tests the speed by above-mentioned.
Compared with the prior art, the advantages of the present invention are as follows:
PCIE bus velocity-measuring system and method for the present invention based on Shen prestige platform, by the PCIE of Shen prestige platform processor
Bus is extended by PCIE expansion module, and PCIE expansion module is tested the speed by PCIE bus to be measured with the FPGA
Board is connected, and Shen prestige platform is built-in with for testing the speed board with the use of for detecting above-mentioned PCIE bus to be measured with FPGA
The speed of the transmission to PCIE bus can be realized in use, need to only run the software unit that tests the speed in the software unit that tests the speed of transmission rate
The detection of rate is realized and is tested the speed based on Shen prestige platform to PCIE bus, and it is easy to use, be easy to implement, compensate for production domesticization
Computer etc. realizes the blank that PCIE bus tests the speed from primary territory especially on the prestige platform of Shen.
It can be seen that compared with prior art, the present invention implementing with substantive distinguishing features outstanding and significant progress
Beneficial effect be also obvious.
Detailed description of the invention
Fig. 1 is the principle knot of the specific embodiment 1 of the PCIE bus velocity-measuring system of the present invention based on Shen prestige platform
Structure block diagram representation.
Fig. 2 is the method stream of the specific embodiment 1 of the PCIE bus speed-measuring method of the present invention based on Shen prestige platform
Journey schematic diagram.
Fig. 3 is the principle knot of the specific embodiment 1 of the PCIE bus velocity-measuring system of the present invention based on Shen prestige platform
Structure block diagram representation.
Wherein: 1, Shen prestige platform, 2, Shen prestige platform processor, 3, PCIE expansion module, 4, FPGA test the speed board, 5, to be measured
PCIE bus, 6, test the speed software unit.
Specific embodiment
To keep technical solution of the present invention and advantage clearer, below in conjunction with attached drawing, to technical solution of the present invention
It is clearly and completely described.
Specific embodiment 1:
Referring to Fig. 1.Fig. 1 is a kind of specific embodiment of the PCIE bus velocity-measuring system of the present invention based on Shen prestige platform.
It in the present embodiment, should PCIE bus velocity-measuring system based on Shen prestige platform comprising PCIE bus 5 to be measured, Shen prestige platform 1
With the test data for receiving the transmission of Shen prestige platform 1 and for recording and feeding back when previous test data transmits the time used
The FPGA of length t tests the speed board 4；The test data has specific size；The PCIE bus of Shen prestige platform processor 2 connects
There is a PCIE expansion module 3, PCIE expansion module 3 is connected by PCIE bus 5 to be measured and the FPGA board 4 that tests the speed；Shen Wei
Platform 1 is built-in with for testing the speed board 4 with the use of the survey for detecting the transmission rate of above-mentioned PCIE bus 5 to be measured with FPGA
Fast software unit 6.
In the present embodiment, the software unit 6 that tests the speed includes Test data generation module, test data transmission mould
Block and test result analysis processing module, in which:
Test data generation module, for generating test data；
Test data sending module, test data for generating above-mentioned Test data generation module pass through described to be measured
PCIE bus 5 is sent to FPGA and tests the speed board 4；
Test result analysis processing module is respectively connected with the Test data generation module, test data sending module, is used
In receive FPGA test the speed the feedback of board 4 when previous test data transmits time span t(time span t used are as follows: from test
Data transmission blocks transmission starts to data to be transmitted spent time t) when previous test data, and for based on currently
The size of the time span t and the data when previous transmission that receive calculate and show above-mentioned PCIE to be measured by Shen prestige platform 1
The transmission rate v of bus 5.
In the present embodiment, the method that test result analysis processing module calculates PCIE transmission rate are as follows: when previous survey
Try the size data(of data such as: the PCIE transmission rate v that time span t 1GB) being currently received divided by it is obtained.Wherein when
The particular size for the test data that the size data of previous test data can be generated according to Test data generation module
It presets, the size of the current test data generated of Test data generation module feedback can also be passed through.In this embodiment party
It is described when the size (data) of previous test data is by Test data generation module feedback, i.e. Test data generation module in formula
The size of its generated test data is sent directly to test result analysis processing after the test data for generating particular size
Module.
In use, starting Shen prestige plateform system, runs the software unit 6 that tests the speed, the software unit 6 that tests the speed calls test data raw
Test data is generated at module, the software unit 6 that tests the speed calls test data sending module, and above-mentioned Test data generation module is raw
At test data FPGA be sent to by the PCIE bus 5 to be measured through PCIE expansion module 3 test the speed board 4；FPGA is surveyed
Fast board 4 receives Shen prestige platform 1(through PCIE bus 5 to be measured) it the test data sent and records with feedback when previous test data
Transmit time span t used；Test the speed in Shen prestige platform 1 software unit 6 test result analysis processing module receive FPGA test the speed
What board 4 was fed back works as previous test data transmission time span t used, and based on the time span t being currently received and works as
The size of previous transmission used test data calculates and shows by Shen prestige platform 1 transmission rate of above-mentioned PCIE bus 5 to be measured
v。
It should be noted that PCIE expansion module 3 described in present embodiment using 8632 chip of PEX expand it is more
The expansion that other PCIE Interface Expanding chips carry out each corresponding PCIE interface also can be used in road PCIE interface, those skilled in the art
Exhibition；FPGA tests the speed and is integrated with PCIE bus on board 4, supports PCIE bus velocity-measuring system detection PCIE based on Shen prestige platform
The traffic rate of the difference PCIE bus such as X4, PCIE X8, PCIE X16, those skilled in the art can select according to actual needs
Corresponding FPGA velocity measurement plate card in the prior art with corresponding function is realized.
Referring to fig. 2.Fig. 2 is based on the above-mentioned PCIE bus velocity-measuring system based on Shen prestige platform based on Shen prestige platform
A kind of specific embodiment of PCIE bus speed-measuring method.In this embodiment, the PCIE based on Shen prestige platform is total
Line speed-measuring method includes the following steps s1~s4, realizes the inspection to 5 transmission rate of PCIE bus to be measured based on step s1~s4
It surveys.
S1, Shen prestige platform processor 2 PCIE bus be connected with PCIE expansion module 3, PCIE expansion module 3 passes through to be measured
PCIE bus 5 and the FPGA board 4 that tests the speed are connected；Wherein the FPGA tests the speed board 4 for receiving 1 base of Shen prestige platform
In the test data of the transmission of PCIE expansion module 3 and for recording and feeding back when previous test data transmits time span used
t。
S2, Shen prestige platform 1 are built-in with for testing the speed board 4 with the use of for detecting above-mentioned PCIE bus to be measured with FPGA
The software unit 6 that tests the speed of 5 transmission rate.
S3, the starting of Shen prestige plateform system.
Specifically, the starting of prestige platform 1 system in Shen described in step s3 includes electrifying startup, the kernel of Shen prestige platform 1
Starting and three steps of os starting, in which:
Shen prestige platform electrifying startup, BIOS are identified and are initialized to the FPGA board 4 that tests the speed；
In kernel start-up course, the bus of board 4 is tested the speed to FPGA and its equipment carries out FIXUP configuration, and distributes interrupt number；
During os starting, load FPGA tests the speed the driving of board 4, and realizes that the FPGA tests the speed the initial of board 4
Change.
Wherein, FPGA tests the speed board 4 (differences such as PCIE X4, PCIE X8, PCIE X16 to be supported to connect using PCIE bus
Mouthful communication) board, be integrated with fpga chip in board, include IP kernel, the test the speed fpga chip of board 4 of FPGA passes through it
PCIE bus is connected through PCIE bus 5 to be measured with PCIE expansion module 3.
The PCIE bus velocity-measuring system based on Shen prestige platform, FPGA test the speed after board 4 powers on, and are based on above-mentioned steps s3,
Start Shen prestige platform 1 the software unit 6 that tests the speed, the software unit 6 that tests the speed call FPGA test the speed board 4 driving and FPGA velocity measurement plate
The IP kernel of card 4 carries out data communication.
As it can be seen that being based on Shen prestige platform 1 after the starting of Shen prestige plateform system, realizing PCIE bus of the present invention and test the speed and be
The data communication that PCIE expansion module 3 in system is tested the speed by PCIE bus 5 to be measured and FPGA between board 4.
S4, the software unit 6 that tests the speed starting send above-mentioned test data to the FPGA board 4 that tests the speed based on PCIE expansion module 3
Carry out the test of above-mentioned 5 transmission rate of PCIE bus to be measured.
Specifically, the software unit 6 that tests the speed includes Test data generation module, test data sending module and test
Interpretation of result processing module, in which:
Test data generation module, for generating test data；
Test data sending module, test data for generating above-mentioned Test data generation module pass through described to be measured
PCIE bus 5 is sent to FPGA and tests the speed board 4；
Test result analysis processing module is respectively connected with the Test data generation module, test data sending module, is used
In receive FPGA test the speed the feedback of board 4 when previous test data transmits time span t used, and for based on being currently received
Time span t and the data when previous transmission size, calculate and control Shen prestige platform 1 and show above-mentioned PCIE bus 5 to be measured
Transmission rate v.
Correspondingly with the above-mentioned PCIE bus speed-measuring method based on Shen prestige platform, after the starting of Shen prestige plateform system, Shen is run
Test the speed software unit 6 in prestige platform 1, and the software unit 6 that tests the speed calls Test data generation module to generate test data, and test the speed software
Unit 6 calls test data sending module, and test data sending module calls in Shen prestige platform 1 FPGA to test the speed the driving of board 4
Driving interface, the test data that above-mentioned Test data generation module is generated passes through described to be measured through PCIE expansion module 3
PCIE bus 5 is sent to FPGA and tests the speed the fpga chip of board 4；FPGA test the speed board 4 fpga chip receive Shen prestige platform 1
The test data and record that (through PCIE bus 5 to be measured) is sent work as time span t used in the transmission of previous test data with feedback；Shen
Test the speed in prestige platform 1 software unit 6 test result analysis processing module receive FPGA test the speed the feedback of board 4 when previous test
Data transmit time span t used, and based on the time span t being currently received and when previous transmission used test data
Size calculates and shows by Shen prestige platform 1 the transmission rate v of above-mentioned PCIE bus 5 to be measured.
It should be noted that in the present embodiment, the FPGA board that tests the speed is recorded and is fed back when previous test data is transmitted
The method of time span t used are as follows: FPGA tests the speed board 4 in the transmission data for receiving the software unit 6 that tests the speed in Shen prestige platform 1
After notice, the reception flag set of board firmware is to start to receive begin, records time t1；After the completion of data receiver to be tested,
Reception flag position position records time t2 to complete end；It is tested the speed described in 4 internal calculation of board as FPGA when previous survey later
It tries data and transmits time span t=t2-t1 used；Finally passed through in its internal firmware and Shen prestige platform 1 by the FPGA board 4 that tests the speed
FPGA test the speed board 4 driving driving interface communication, calculated deserve previous test data by above-mentioned and transmit the time used
Length t=t2-t1 feeds back to the software unit 6 that tests the speed.When it is implemented, those skilled in the art can also be according to actual conditions, from now
Have and corresponding method is selected to record and feed back when to transmit the time used long for previous test data by the FPGA board that tests the speed in technology
Spend t.
Specific embodiment 2:
Referring to Fig. 3.Fig. 3 is another specific embodiment party of the PCIE bus velocity-measuring system of the present invention based on Shen prestige platform
Formula.The embodiment 2 compared with above-mentioned specific embodiment 1, the difference is that, should based on Shen prestige platform PCIE bus survey
Speed system, the software unit 6 that tests the speed further include testing time setup module, the testing time setup module and the test knot
Fruit analysis and processing module is connected, for the detection number to above-mentioned 5 transmission rate of PCIE bus test to be measured to be arranged.In addition,
In the embodiment 2, it is somebody's turn to do the PCIE bus velocity-measuring system based on Shen prestige platform, the test result analysis for the software unit 6 that tests the speed
Processing module is also used to call test data to send mould when the detection number inputted by testing time setup module is greater than 1
Block executes the test data of the detection time for several times and cycles through operation, and is shown often for corresponding calculating and by Shen prestige platform 1
The corresponding transmission rate v of the test data of secondary transmission is also used to calculate and shows the resulting institute of above-mentioned calculating by Shen prestige platform 1
There is the arithmetic mean of instantaneous value of transmission rate v, which is the transmission rate of the final PCIE bus 5 to be measured to be detected.
Wherein, the corresponding input interface of testing time setup module (i.e. input dialogue frame) passes through the Shen prestige platform 1
It is shown, in use, tester passes through the input interface of testing time setup module, setting is to current PCIE bus to be measured
The detection number of 5 transmission rates test, the test result analysis processing module for the software unit 6 that tests the speed is to testing time setup module
The detection number of input is determined, and when determining that above-mentioned detection number is greater than number 1, calls test data sending module pair
The test data that Test data generation module generates carry out above-mentioned detection time for several times cycle through operation, and corresponding receive every time
FPGA tests the speed the used time span t of test data transmission of the feedback of board 4 when transmitting test data, is also based on the test number
According to size and it is received transmit time span t used in the test data every time, calculate separately and by current
Shen prestige platform 1 shows the transmission rate v of each transmitting test data of PCIE bus 5 to be measured；Finally (the survey for the software unit 6 that tests the speed
Test result analysis and processing module) all transmission rate vs resulting to above-mentioned calculating take arithmetic mean of instantaneous value, and pass through Shen prestige platform 1
Show the mean value, which is the transmission rate of finally the wanted detected PCIE bus 5 to be measured.Present embodiment
It is middle in such a way that multiple measurement takes mean value, improve the accuracy and reliability of testing result.
A kind of PCIE based on based on Shen prestige platform described in present embodiment is additionally provided in present embodiment
The PCIE bus speed-measuring method based on Shen prestige platform of bus velocity-measuring system, should the PCIE bus speed-measuring method based on Shen prestige platform
Described in the above-mentioned specific embodiment 1 based on the PCIE bus speed-measuring method of Shen prestige platform compared with, difference is, this implementation
Based on the PCIE bus speed-measuring method of Shen prestige platform described in mode, the software unit 6 that tests the speed further includes testing time setting
Module, the testing time setup module are connected with the test result analysis processing module, for being arranged to above-mentioned to be measured
The detection number of 5 transmission rate of PCIE bus test；The test result analysis processing module of its software unit 6 that tests the speed, is also used to
When the detection number inputted by testing time setup module is greater than 1, test data sending module is called to execute the detection time
Test data for several times cycles through operation, and for corresponding calculating and shows the test number sent every time by Shen prestige platform 1
According to corresponding transmission rate v, it is also used to calculate and shows the resulting all transmission rate v's of above-mentioned calculating by Shen prestige platform 1
Arithmetic mean of instantaneous value, the mean value are the transmission rate of the final PCIE bus 5 to be measured to be detected.
Use process based on testing time setup module is detailed in described in present embodiment based on Shen prestige platform
PCIE bus velocity-measuring system part, details are not described herein.
The board 4 it should be noted that heretofore described FPGA tests the speed, not only can testing the speed to Shen prestige platform 1
Software unit 6 feeds back the corresponding transmission rate v of each transmitting test data of PCIE bus 5 to be measured, it may also be used for detects and feeds back
The integrality of each transmitting test data of PCIE bus 5 to be measured.
It is further to note that each Shen prestige platform involved in specific embodiment of the invention part is separate unit Shen prestige meter
Calculation machine or separate unit Shen prestige server.
Embodiment of above is merely illustrative of the technical solution of the present invention, rather than its limitations；Although referring to aforementioned implementation
Invention is explained in detail for mode, those skilled in the art should understand that: it still can be to aforementioned each
Technical solution documented by embodiment is modified or equivalent replacement of some of the technical features；And these are repaired
Change or replaces, the range for each embodiment technical solution of the present invention that it does not separate the essence of the corresponding technical solution.
Claims (10)
1. a kind of PCIE bus velocity-measuring system based on Shen prestige platform, which is characterized in that including PCIE bus (5) to be measured, Shen Wei
Platform (1) and for receive Shen prestige platform (1) transmission test data and for record and feed back when previous test data pass
The FPGA of defeated time span t used tests the speed board (4)；The test data has specific size；
The PCIE bus of Shen prestige platform processor (2) is connected with PCIE expansion module (3), and PCIE expansion module (3) passes through to be measured
PCIE bus (5) and the FPGA board (4) that tests the speed are connected；
Shen prestige platform (1) is built-in with for testing the speed board (4) with the use of for detecting above-mentioned PCIE bus (5) to be measured with FPGA
Transmission rate the software unit that tests the speed (6).
2. the PCIE bus velocity-measuring system according to claim 1 based on Shen prestige platform, which is characterized in that described tests the speed
Software unit (6) includes Test data generation module, test data sending module and test result analysis processing module, in which:
Test data generation module, for generating test data；
Test data sending module, test data for generating above-mentioned Test data generation module pass through described to be measured
PCIE bus (5) is sent to FPGA and tests the speed board (4)；
Test result analysis processing module is respectively connected with the Test data generation module, test data sending module, is used
In receive FPGA test the speed board (4) feedback when previous test data transmits time span t used, and for being received based on current
The size of the time span t and the data when previous transmission that arrive calculate and show that above-mentioned PCIE to be measured is total by Shen prestige platform (1)
The transmission rate v of line (5).
3. the PCIE bus velocity-measuring system according to claim 2 based on Shen prestige platform, which is characterized in that described tests the speed
Software unit (6) further includes testing time setup module, and the testing time setup module and the test result analysis are handled
Module is connected, for the detection number to above-mentioned PCIE bus (5) transmission rate test to be measured to be arranged；
The test result analysis processing module is also used to be greater than in the detection number inputted by testing time setup module
When 1, calls test data sending module to execute the test data of the detection time for several times and cycle through operation, and calculated for corresponding
Transmission rate v corresponding with the test data sent every time by Shen prestige platform (1) display, is also used to calculate and passes through Shen Weiping
Platform (1) shows the arithmetic mean of instantaneous value of the above-mentioned resulting all transmission rate v of calculating, which is final to be detected described
The transmission rate of PCIE bus (5) to be measured.
4. the PCIE bus velocity-measuring system based on Shen prestige platform described in -3 every claims according to claim 1, feature
It is, the FPGA, which tests the speed, is integrated with PCIE bus on board (4), supports PCIE X4, PCIE X8 and PCIE X16 bus
Test the speed.
5. a kind of PCIE bus velocity-measuring system based on described in the claims 1 based on Shen prestige platform based on Shen prestige platform
PCIE bus speed-measuring method, which is characterized in that comprising steps of
S1, Shen prestige platform processor (2) PCIE bus be connected with PCIE expansion module (3), PCIE expansion module (3) is by be measured
PCIE bus (5) and the FPGA board (4) that tests the speed are connected；Wherein the FPGA tests the speed board (4) for receiving Shen prestige
Platform be based on PCIE expansion module (3) send test data and for record and feed back when previous test data transmission used in
Time span t；
S2, Shen prestige platform (1) are built-in with for testing the speed board (4) with the use of for detecting above-mentioned PCIE bus to be measured with FPGA
(5) software unit that tests the speed (6) of transmission rate；
S3, the starting of Shen prestige plateform system；
S4, the software unit that tests the speed (6) starting, by PCIE expansion module (3) to FPGA test the speed board (4) send above-mentioned test number
According to the test for carrying out above-mentioned PCIE bus (5) transmission rate to be measured.
6. the PCIE bus speed-measuring method according to claim 5 based on Shen prestige platform, which is characterized in that described in step s3
Shen prestige plateform system starting, comprising steps of
Shen prestige platform (1) electrifying startup, BIOS are identified and are initialized to the FPGA board (4) that tests the speed；
In kernel start-up course, the bus of board (4) is tested the speed to FPGA and its equipment carries out FIXUP configuration, and distributes interruption
Number；
During os starting, load FPGA tests the speed the drivings of board (4), and realizes that the FPGA tests the speed board (4)
Initialization.
7. the PCIE bus speed-measuring method according to claim 5 or 6 based on Shen prestige platform, which is characterized in that described
The software unit (6) that tests the speed includes Test data generation module, test data sending module and test result analysis processing module,
In:
Test data generation module, for generating test data；
Test data sending module, test data for generating above-mentioned Test data generation module pass through described to be measured
PCIE bus (5) is sent to FPGA and tests the speed board (4)；
Test result analysis processing module is respectively connected with the Test data generation module, test data sending module, is used
In receive FPGA test the speed board (4) feedback when previous test data transmits time span t used, and for being received based on current
The size of the time span t and the data when previous transmission that arrive calculate and show that above-mentioned PCIE to be measured is total by Shen prestige platform (1)
The transmission rate v of line (5).
8. the PCIE bus speed-measuring method according to claim 7 based on Shen prestige platform, which is characterized in that described tests the speed
Software unit (6) further includes testing time setup module, and the testing time setup module and the test result analysis are handled
Module is connected, for the detection number to above-mentioned PCIE bus (5) transmission rate test to be measured to be arranged；
The test result analysis processing module, for being greater than 1 in the detection number inputted by testing time setup module
When, it calls test data sending module to execute the test data of the detection time for several times and cycles through operation, and calculated for corresponding
Transmission rate v corresponding with the test data sent every time by Shen prestige platform (1) display, is also used to calculate and passes through Shen Weiping
Platform (1) shows the arithmetic mean of instantaneous value of the above-mentioned resulting all transmission rate v of calculating, which is final to be detected described
The transmission rate of PCIE bus (5) to be measured.
9. the PCIE bus speed-measuring method according to claim 5 or 6 based on Shen prestige platform, which is characterized in that described
FPGA, which tests the speed, is integrated with PCIE bus on board (4), supports testing the speed for PCIE X4, PCIE X8 and PCIE X16 bus.
10. the PCIE bus speed-measuring method according to claim 5 or 6 based on Shen prestige platform, which is characterized in that described
FPGA test the speed board (4) record and feed back the method for transmitting time span t used when previous test data are as follows:
FPGA tests the speed board (4) after the transmission data notification for receiving the software unit (6) that tests the speed in Shen prestige platform (1), board
The reception flag set of firmware is to start to receive begin, records time t1；
After the completion of data receiver to be tested, reception flag position position records time t2 to complete end；
It is tested the speed later as FPGA and works as time span t=t2-t1 used in the transmission of previous test data described in board (4) internal calculation；
Finally tested the speed the driving of board (4) by the FPGA board (4) that tests the speed by FPGA in its internal firmware and Shen prestige platform (1)
Driving interface communication calculated deserves previous test data and transmits time span t=t2-t1 used and feed back to test the speed by above-mentioned
Software unit (6).
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