CN1610083A - 半导体装置的制造方法及半导体装置 - Google Patents
半导体装置的制造方法及半导体装置 Download PDFInfo
- Publication number
- CN1610083A CN1610083A CNA2004100861098A CN200410086109A CN1610083A CN 1610083 A CN1610083 A CN 1610083A CN A2004100861098 A CNA2004100861098 A CN A2004100861098A CN 200410086109 A CN200410086109 A CN 200410086109A CN 1610083 A CN1610083 A CN 1610083A
- Authority
- CN
- China
- Prior art keywords
- backing plate
- resin
- semiconductor device
- pad
- resin sheet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 67
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 39
- 229920005989 resin Polymers 0.000 claims abstract description 157
- 239000011347 resin Substances 0.000 claims abstract description 157
- 238000000034 method Methods 0.000 claims abstract description 40
- 238000007789 sealing Methods 0.000 claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims description 59
- 239000002184 metal Substances 0.000 claims description 59
- 238000005538 encapsulation Methods 0.000 claims description 32
- 238000004512 die casting Methods 0.000 claims description 9
- 238000002360 preparation method Methods 0.000 claims description 8
- 208000034189 Sclerosis Diseases 0.000 claims description 5
- 238000009413 insulation Methods 0.000 abstract description 7
- 238000003825 pressing Methods 0.000 abstract description 6
- 230000017525 heat dissipation Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 6
- 238000001816 cooling Methods 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000005266 casting Methods 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000011417 postcuring Methods 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4905—Shape
- H01L2224/49051—Connectors having different shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
本发明的目的是提供一种高散热性,且绝缘特性优良的半导体装置的制造方法。将芯片进行树脂模铸的半导体装置的制造方法包含以下工序:准备具有表面和背面并具有垫板的支架的工序;准备具有第1面和第2面的绝缘性的树脂片的工序;准备具有按压销的树脂封固用金属模的工序;以树脂片的第2面与树脂封固用金属模的内部底面相接触的形式,在树脂封固用金属模内载置树脂片的工序;在垫板的表面上载置动力芯片的工序;以垫板的背面与树脂片的第1面相接触的形式,在树脂片的第1面上配置支架的工序;用按压销将垫板向树脂片按压,固定垫板的固定工序;在树脂封固用金属模内填充封固用树脂并使其硬化的工序;从树脂封固用金属模取出半导体装置的工序。
Description
技术领域
本发明涉及半导体装置的制造方法,特别是,涉及含有动力芯片的电力用半导体装置的制造方法。
背景技术
在以往结构的电力用半导体装置中,动力芯片、IC芯片分别焊接在支架上,此外,这些芯片通过树脂进行封固。由于动力芯片的散热量较大,所以,例如可以在半导体装置的后面安装冷却扇,提高散热功率。载置动力芯片的支架用树脂覆盖,与安装于后面的冷却扇绝缘(例如,专利文献1)。
专利文献1 特开2000-138343号公报
但是,在该半导体装置中,为了提高散热特性,覆盖载置有动力芯片的支架的树脂,具体说就是,载置动力芯片的支架的背面和半导体装置的背面之间的树脂有必要做得薄一些,但是,如果将这部分树脂做得很薄则绝缘特性反而降低。
对此,发明者们发现,通过将高热传导性的绝缘性的树脂片与载置有动力芯片的支架的背面相接触并固定,可以得到高散热性且绝缘性优良的半导体装置,同时,就该制造方法完成了本发明。
即,本发明的目的是提供一种高散热性、且绝缘特性优良的半导体装置的制造方法。
发明内容
本发明是将芯片进行树脂模铸的半导体装置的制造方法,该制造方法包含以下工序:准备具有表面和背面并具有垫板的支架的工序;准备具有第1面和第2面的绝缘性的树脂片的工序;准备具有按压销的树脂封固用金属模的工序;以树脂片的第2面与树脂封固用金属模的内部底面相接触的形式,在树脂封固用金属模内载置树脂片的工序;在垫板的表面上载置动力芯片的工序;以垫板的背面与树脂片的第1面相接触的形式,在树脂片的第1面上配置支架的工序;用按压销将垫板向树脂片按压,固定垫板的固定工序;在树脂封固用金属模内填充封固用树脂并使其硬化的工序;从树脂封固用金属模,取出用封固用树脂模铸动力芯片而制成的半导体装置的工序。树脂片,可以包含设置于第2面的金属箔。
用本发明的半导体装置的制造方法,能够良好地固定树脂片和支架,可以提供高散热性、且绝缘特性优异的半导体装置。
附图说明
图1是本发明的实施方式1的半导体装置的立体图。
图2是本发明的实施方式1的半导体装置的剖面图。
图3是本发明的实施方式1的半导体装置的制造工序的剖面图。
图4是本发明的实施方式1的半导体装置的制造工序的剖面图。
图5是配置于树脂封固用金属模中的支架的概略图。
图6是配置于树脂封固用金属模中的支架的概略图。
图7是本发明的实施方式2的半导体装置的剖面图。
图8时本发明的实施方式3的半导体装置的剖面图。
图9时本发明的实施方式4的半导体装置的剖面图。
图10是配置于树脂封固用金属模中的支架的概略图。
具体实施方式
实施方式1
图1是本实施方式的半导体装置的立体图,整体用100表示。另外,图2是图1的半导体装置100的沿I-I方向的剖面图。
如图1所示,半导体装置100由树脂模铸型封固结构构成,包含有模铸树脂2,该模铸树脂2的两侧设置有多个金属制造的支架1。模铸树脂2最好是由环氧树脂构成。
如图2所示,半导体装置100,含有多个支架1。一个支架1上,载置有如同逻辑芯片的IC芯片7。另外,另一个支架1包含有垫板部1a和台阶高差部1b,在垫板部1a上,载置有如同IGBT、FWDiode的动力芯片5。在动力芯片5、IC芯片7、及支架1之间,连结有例如由金、铝构成的搭接导线6、8,通过IC芯片7控制动力芯片5的动作。动力芯片5、IC芯片7,可以对应于半导体装置100的功能设置多个。
模铸树脂2,含有绝缘性的树脂片3,该绝缘性的树脂片的背面安装有例如由铜构成的金属箔4,金属箔4从背面露出。树脂片3最好由含有填充物的环氧树脂构成。填充物,可以由从SiO2、Al2O3、AlN、Si3N4及BN中选择的一种或多种材料构成。树脂片3的热传导率,比模铸树脂2的热传导率大。此外,不用金属箔4,只用树脂片3也可以。
支架1,以垫板部1a的后面与树脂片3的上面直接接触的形式,由模铸树脂2填埋并固定。这样,在半导体装置100中,在垫板1a的背面和树脂片3的上面之间,不会夹入模铸树脂2等,而是垫板1a和树脂片3直接接触,所以,能提高从垫板1a向树脂片3的热传导性。因此,能够提高安装于垫板1a的上面的动力芯片5的散热特性。
另外,凹槽9形成于模铸树脂2的上表面。该凹槽9,是制造过程中拔出按压销23的痕迹。关于凹槽9,将在制造工序的说明中详细说明。此外,在树脂封固用金属模的设计上,如果完全不形成凹槽9而拔出按压销,是很困难的。
下面,参照图3、4,说明半导体装置100的制造方法。该制造方法,包含以下的工序1~7。此外,图3、4是与图1的I-I同方向的剖面图。
工序1:如图3(a)所示,准备例如由铜构成的支架1。接着,分别在一个支架1上和另一个支架1的垫板1a上用焊锡、银焊剂固定IC芯片7和动力芯片5。
工序2:如图3(b)所示,用铝制的搭接导线6,连结动力芯片5彼此间、动力芯片5和支架1、支架1彼此间(铝导线结合工序)。此外,在搭接导线6中,也可以使用以铝作为主要成分的合金和其它的金属。
工序3:如图3(c)所示,使用金制的搭接导线8,连结IC芯片7和支架1(金制导线结合工序)。此外,在搭接导线8中,也可以使用以金作为主要成分的合金和其它的金属。
在此,IC芯片7和动力芯片5经由支架1连结,但是也可以直接连接。此外,也可以用金属板代替搭接导线6、8进行连接。
工序4:如图3(d)所示,准备树脂封固用金属模20。树脂封固用金属模20,分为上部金属模21和下部金属模22。在上部金属模21中,设置有按压销23。按压销23以能够从上部金属模21取出的形式安装。
接着,准备背面安装有金属箔4的绝缘性树脂片3,并配置于树脂封固用金属模20的内部的规定位置。这种情况下,以包含于树脂片3的金属箔4的背面与下部金属模22的内部底面相接触的形式,配置树脂片3。
工序5:如图4(e)所示,将安装有动力芯片5等的支架1配置于树脂封固用金属模20中的规定位置。这种情况下,以支架1的垫板1a的背面和树脂片3的上表面相接触的形式,配置支架1。
此外,在此,在下部金属模22上首先配置树脂片3,接下来,对在树脂片3上配置安装有动力芯片5等的支架1的情况进行说明,首先,将安装有动力芯片5等的支架1进行临时固定在树脂片3上,然后,可以将树脂片3配置在下部金属模22上。
工序6:如图4(f)所示,在下部金属模22上安装固定有上部金属模21。这种情况下,按压销23的前端,将框架1的垫板1a压在树脂片3的上表面上。
此外,在通过按压销23将垫板1a压住的状态下,向树脂封固用金属模20内注入封固用树脂12,并保持。在此期间,将垫板1a和树脂片3进行粘合。
图5,是配置于树脂封固用金属模20中的支架1的概略图,用符号19表示的部分,是用按压销23的前端按压的位置。如此,通过在多个点压住搭载动力芯片5的垫板1a的周边,能够使垫板1a和树脂片3完全接触。
在图5中,在搭载动力芯片5的垫板1a上,形成有使垫板1a的一部分突出的销按压部1c。销按压部1c,在邻接的垫板1a之间,不互相接触地突出。通过设置该销按压部1c,能够顺利地将垫板1a压在树脂片3上。
此外,销按压部1c,除了在树脂密封工序中固定垫板1a以外,在动力芯片搭载工序和导线搭接工序中也可以用于固定支架1。
在邻接的垫板1a之间,(图5的上下方向)配置有2个用于按压不同垫板1a的按压销23。通常,按压销23的直径,比邻接的垫板1a的间隙小,但如图5所示,也可以在不与邻接的垫板1a相接触的范围内将其做得更大。
在邻接的垫板1a之间,由于一般情况下电位有差异,所以必须在两者之间确保一定程度的绝缘距离。在图5中,利用该绝缘距离,在从垫板1a伸出一部分的状态下,按压板23按住垫板1a。
通过如此配置按压销23,可以不增大半导体装置100地使用大直径、高强度且长寿命的按压销23。
支架1,如图4所示,其端部固定于金属模上,同时,如图5所示,垫板1a由2个按压销23进行按压。其结果,可以相对于树脂片3稳定地压住垫板1a,能够对树脂片3和垫板1a进行良好的结合。
接着,通过连续自动模铸成形法,将例如由环氧树脂构成的封固用树脂12填充到树脂封固用金属模20内。
图6,是在图5所示的固定状态下,从下边向箭头15的方向填充封固用树脂12的工序的概略图。封固用树脂12,通过多个树脂注入口,被注入到树脂封固用金属模20内。这种情况下,按压销23,由于成为封固用树脂12流动的障碍,所以封固用树脂12优先流入没有按压销23的动力芯片5的上面。其结果,搭载垫板1a的动力芯片5的区域被施加压力,垫板1a被按压到树脂片3上,使两者贴紧。
如此,通过将按压销23配置于垫板1a上的动力芯片5的间隙,能够将搭载动力芯片的部分垫板1a良好地固定在树脂片3上。因此,即使由销23进行的垫板1a的按压不充分,也能将两者良好的固定。即,处理边缘变大,能够增加制造稳定性。这种效果,随着按压销23的直径的增大愈发明显。
按压销23,也可以相对于一个垫板1a只设置1根,如图5所示,可以用多个(在图5中是2根)按压销23按压一个垫板1a。由此,能够增大按压的稳定性。此外,在图5的配置中,由于利用产生于垫板1a之间的无用空间(dead space)配置多个按压销23,所以即使增加按压销23的数量,也不会导致半导体装置大型化。
接着,在封固用树脂12硬化前,在按压销23的前端比模铸树脂2的上面稍微处于下方之前,将按压销23从上部金属模21拔出,并保持该状态。这种情况下,拔出按压销23后的孔部,虽然由封固用树脂12进行封闭,但在模铸树脂2的上表面也会形成凹槽9。此外,完全不形成凹槽9地拔出按压销,在树脂封固用金属模20的结构上,难于实现。
工序7:如图4(g)所示,当将整体从树脂封固用金属模20取出后,进行使模铸树脂完全硬化的二次硬化、连接杆等的支架的其余部分的切断等。此外,通过进行支架(外部端子)1的成形,完成如图1所示的半导体装置100。
实施方式2
图7是表示本实施方式的半导体装置的剖面图,整体用200表示,是与图1的I-I方向相同的视图。图7中,与图1、2相同的符号,表示相同或者相应的部分。
在半导体装置200中,代替半导体装置100的凹槽9,在相同位置设置有突起部29。该突起部29,是在上述的半导体装置100的制造方法的工序6中,在封固用树脂12硬化一定程度的状态下,将按压销23从上部金属模21拔起,直到按压销23的前端与模铸树脂2的上面相比位于上方,并通过保持该状态而形成的。
由于半导体装置200具有上述突起部29,所以模铸树脂2的强度,特别是弯曲强度得到了提高。
实施方式3
图8,是表示本实施方式的半导体装置的剖面图,整体用300表示。是以与图1的I-I方向相同的方向观察半导体装置300的视图。图8中,与图1、2相同的符号,表示相同或者相应的部分。
在半导体装置300中,半导体装置100的凹槽9,是被树脂30埋入的结构。其他的结构,与半导体装置100相同。树脂30的埋入,可以用例如浇铸封固法进行。
在半导体装置300中,与不埋入凹槽9的结构相比,强度、特别是弯曲度有了很大提高。
实施方式4
图9是本实施方式的半导体装置的剖面图,整体用400表示。是以与图1的I-I方向相同的方向观察半导体装置400的视图。图9中,与图1、2相同的符号,表示相同或者相应的部分。
用于制造半导体装置400的金属模,是将按压销23固定于上部金属模21的树脂封固用金属模20,例如,按压销23和上部金属模21一体地成形的金属模。因此,在上述工序6(图4(f))中,如果在用按压销23压住垫板1a的状态下使树脂12硬化,然后将上部金属模21取出,则能够在模铸树脂2上形成孔部31。
在半导体装置400中,在上述孔部31填充有树脂32。树脂32的填充可以使用例如浇铸封固法进行。
如此,通过填充树脂32,能够覆盖在孔部31的底部露出的支架1,防止支架1的腐蚀等。
此外,通过使用在上部金属模21上固定有按压销23的树脂封固用金属模20制造半导体装置400,能够简化制造工序,降低制造成本。
实施方式5
图10与图5相同,是配置于树脂封固用金属模20中的支架1的概略图。在图10中,在各个垫板1a的两侧设置有销按压部1c。另外,按压销23的剖面形状,呈椭圆形状。
销按压部1c和按压销23,通过形成这样的形状,能够将垫板1a相对于树脂片3稳定的压紧。由此,能够良好地进行树脂片3和垫板1a的固定。
Claims (15)
1.一种半导体装置的制造方法,是将芯片进行树脂模铸的半导体装置的制造方法,其特征在于,该制造方法包含以下工序:
准备具有表面和背面、并具有垫板的支架的工序;
准备具有第1面和第2面的绝缘性的树脂片的工序;
准备具有按压销的树脂封固用金属模的工序;
以该树脂片的第2面与该树脂封固用金属模的内部底面相接触的形式,在该树脂封固用金属模内载置该树脂片的工序;
在该垫板的该表面上载置动力芯片的工序;
以该垫板的该背面与该树脂片的该第1面相接触的形式,在该树脂片的该第1面上配置该支架的工序;
用该按压销将该垫板向该树脂片按压,固定该垫板的固定工序;
向该树脂封固用金属模内填充封固用树脂并使其硬化的硬化工序;
从该树脂封固用金属模,取出通过该封固用树脂模铸了该动力芯片的半导体装置的工序。
2.如权利要求1所述的制造方法,其特征在于,所述固定工序是将一个所述垫板用多个所述按压销按压的工序。
3.如权利要求1或2所述的制造方法,其特征在于,所述固定工序是通过设置于邻接的所述垫板间的所述按压销固定所述垫板的工序。
4.如权利要求1所述的制造方法,其特征在于,所述固定工序是如下的工序:对于邻接而设的2个所述垫板,通过设置于该垫板之间的至少2个所述按压销,分别按压该垫板。
5.如权利要求1所述的制造方法,其特征在于,所述固定工序是如下的工序:通过所述按压销按压从邻接而设的2个所述垫板互相不重合地伸出的销按压部。
6.如权利要求1所述的制造方法,其特征在于,所述固定工序是通过所述按压销的一部分按压所述垫板的工序。
7.如权利要求1所述的制造方法,其特征在于,所述固定工序是使用直径比邻接而设的2个所述垫板的间隔小的所述按压销按压该垫板的工序。
8.如权利要求1所述的制造方法,其特征在于,所述固定工序是如下的工序:在邻接而设的2个所述垫板之间,在沿着该垫板的配置方向设置有多个所述按压销,通过该按压销按压该垫板;
所述硬化工序,是将所述封固用树脂向该配置方向填充的工序。
9.一种半导体装置的制造方法,是将芯片进行树脂模铸的半导体装置的制造方法,其特征在于,该制造方法包含以下工序:
准备具有表面和背面、并具有垫板的支架的工序;
准备具有第1面和第2面的绝缘性的树脂片的工序;
准备具有按压销的树脂封固用金属模的工序;
在该垫板的该表面上载置动力芯片的工序;
以该垫板的该背面与该树脂片的该第1面相接触的形式,在该树脂片的该第1面上搭载该支架的工序;
以该树脂片的第2面与该树脂封固用金属模的内部底面相接触的形式,在树脂封固用金属模内载置搭载了该垫板的该树脂片的工序;
用该按压销将该垫板向该树脂片按压,固定该垫板的固定工序;
在该树脂封固用金属模内填充封固用树脂并使其硬化的硬化工序;
从该树脂封固用金属模,取出通过该封固用树脂模铸了该动力芯片的半导体装置的工序。
10.如权利要求9所述的制造方法,其特征在于,所述固定工序是将一个所述垫板用多个所述按压销按压的工序。
11.如权利要求9所述的制造方法,其特征在于,所述固定工序是通过设置于邻接的所述垫板之间的所述按压销,固定所述垫板的工序。
12.如权利要求9所述的制造方法,其特征在于,所述固定工序是如下的工序:对于邻接而设的2个所述垫板,通过设置于该垫板之间的至少2个所述按压销,分别按压该垫板。
13.一种半导体装置,该半导体装置是将芯片进行树脂模铸而制成的半导体装置,其特征在于,包含有:
具有表面和背面、并含有垫板的支架;
载置于该垫板的该表面的动力芯片;
具有对置的第1面和第2面、且以该垫板的该背面与该第1面相接触的形式配置的绝缘性的树脂片;
在该树脂片的该第1面上,以封固该动力芯片的形式设置的模铸树脂,
在与该树脂片露出的该模铸树脂的背面相对的、该模铸树脂的表面上的拔出按压销的位置上,具有凹部。
14.一种半导体装置,该半导体装置是将芯片进行树脂模铸而制成的半导体装置,其特征在于,包含有:
具有表面和背面、并含有垫板的支架;
载置于该垫板的该表面的动力芯片;
具有对置的第1面和第2面、且以该垫板的该背面与该第1面相接触的形式配置的绝缘性的树脂片;
在该树脂片的该第1面上,以封固该动力芯片的形式设置的模铸树脂,
在与该树脂片露出的该模铸树脂的背面相对、该模铸树脂的表面上的拔出按压销的位置上,具有突起部。
15一种半导体装置,该半导体装置是将芯片进行树脂模铸而制成的半导体装置,其特征在于,包含有:
具有表面和背面、并含有垫板的支架;
载置于该垫板的该表面的动力芯片;
具有对置的第1面和第2面、且以该垫板的该背面与该第1面相接触的形式配置的绝缘性的树脂片;
在该树脂片的该第1面上,以封固该动力芯片的形式设置的模铸树脂,
该垫板含有从该垫板伸出的销按压部。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP358815/2003 | 2003-10-20 | ||
JP2003358815A JP3854957B2 (ja) | 2003-10-20 | 2003-10-20 | 半導体装置の製造方法および半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1610083A true CN1610083A (zh) | 2005-04-27 |
CN100336190C CN100336190C (zh) | 2007-09-05 |
Family
ID=34509862
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100861098A Active CN100336190C (zh) | 2003-10-20 | 2004-10-19 | 半导体装置的制造方法及半导体装置 |
Country Status (4)
Country | Link |
---|---|
US (2) | US7166926B2 (zh) |
JP (1) | JP3854957B2 (zh) |
KR (2) | KR100700427B1 (zh) |
CN (1) | CN100336190C (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101980357B (zh) * | 2005-12-12 | 2013-05-01 | 三菱电机株式会社 | 半导体器件的制造方法以及半导体器件的树脂密封用模具 |
CN104160493B (zh) * | 2012-03-07 | 2017-03-22 | 丰田自动车株式会社 | 半导体装置及其制造方法 |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7615861B2 (en) * | 2006-03-13 | 2009-11-10 | Sandisk Corporation | Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards |
DE102007020618B8 (de) * | 2007-04-30 | 2009-03-12 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen eines festen Leistungsmoduls und damit hergestelltes Transistormodul |
KR101418397B1 (ko) * | 2007-11-05 | 2014-07-11 | 페어차일드코리아반도체 주식회사 | 반도체 패키지 및 그의 제조방법 |
JP4947135B2 (ja) * | 2009-12-04 | 2012-06-06 | 株式会社デンソー | 半導体パッケージおよびその製造方法 |
US8178961B2 (en) * | 2010-04-27 | 2012-05-15 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and package process |
JP5333362B2 (ja) * | 2010-06-29 | 2013-11-06 | 株式会社デンソー | 半導体装置およびその製造方法 |
WO2012137714A1 (ja) | 2011-04-04 | 2012-10-11 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
JP6114184B2 (ja) | 2011-04-04 | 2017-04-12 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
KR101237566B1 (ko) * | 2011-07-20 | 2013-02-26 | 삼성전기주식회사 | 전력 모듈 패키지 및 그 제조방법 |
US8524538B2 (en) * | 2011-12-15 | 2013-09-03 | Stats Chippac Ltd. | Integrated circuit packaging system with film assistance mold and method of manufacture thereof |
JP2014229782A (ja) * | 2013-05-23 | 2014-12-08 | 株式会社豊田自動織機 | 半導体装置および半導体装置の製造方法 |
JP6195019B2 (ja) * | 2014-05-12 | 2017-09-13 | 三菱電機株式会社 | 電力用半導体装置及びその製造方法 |
DE102015118245A1 (de) * | 2015-10-26 | 2017-04-27 | Infineon Technologies Austria Ag | Thermisches Schnittstellenmaterial mit definierten thermischen, mechanischen und elektrischen Eigenschaften |
DE112016005528T5 (de) * | 2015-12-04 | 2018-08-30 | Rohm Co., Ltd. | Leistungsmodulvorrichtung, Kühlstruktur und elektrisches Fahrzeug oder elektrisches Hybridfahrzeug |
WO2017138092A1 (ja) * | 2016-02-09 | 2017-08-17 | 三菱電機株式会社 | 電力用半導体装置及びその製造方法 |
JP2017147272A (ja) * | 2016-02-15 | 2017-08-24 | ローム株式会社 | 半導体装置およびその製造方法、ならびに、半導体装置の製造に使用されるリードフレーム中間体 |
CN108701661A (zh) * | 2016-03-07 | 2018-10-23 | 三菱电机株式会社 | 半导体装置及半导体装置的制造方法 |
JP6275292B1 (ja) * | 2016-03-11 | 2018-02-07 | 新電元工業株式会社 | 半導体装置及びその製造方法 |
US10504827B2 (en) * | 2016-06-03 | 2019-12-10 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
US10622274B2 (en) | 2017-10-06 | 2020-04-14 | Industrial Technology Research Institute | Chip package |
JP6560819B1 (ja) * | 2017-11-10 | 2019-08-14 | 新電元工業株式会社 | 電子モジュール及び電子モジュールの製造方法 |
JP6423127B1 (ja) * | 2017-11-10 | 2018-11-14 | 新電元工業株式会社 | 電子モジュール |
JP7204919B2 (ja) * | 2019-07-02 | 2023-01-16 | 三菱電機株式会社 | パワーモジュールおよびその製造方法 |
JP2021145036A (ja) | 2020-03-12 | 2021-09-24 | 富士電機株式会社 | 半導体装置の製造方法及び半導体装置 |
JP7528634B2 (ja) | 2020-08-25 | 2024-08-06 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2022064768A (ja) | 2020-10-14 | 2022-04-26 | 富士電機株式会社 | 半導体装置の製造方法及び半導体装置 |
EP4050645B1 (en) * | 2021-02-24 | 2023-02-22 | Hitachi Energy Switzerland AG | Power semiconductor device and manufacturing method |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3199963B2 (ja) * | 1994-10-06 | 2001-08-20 | 株式会社東芝 | 半導体装置の製造方法 |
JP3269024B2 (ja) * | 1998-04-15 | 2002-03-25 | 矢崎総業株式会社 | 回路体の成形方法及びこの成形方法に用いる型構造 |
JP3350444B2 (ja) * | 1998-04-23 | 2002-11-25 | シャープ株式会社 | 半導体装置の製造方法 |
JP2000003923A (ja) * | 1998-06-16 | 2000-01-07 | Hitachi Ltd | 半導体装置の樹脂封止方法及びその樹脂封止装置 |
JP4073559B2 (ja) | 1998-10-30 | 2008-04-09 | 三菱電機株式会社 | 半導体装置 |
JP4006974B2 (ja) | 2001-10-31 | 2007-11-14 | Jfeスチール株式会社 | 材質均一性に優れた高成形性高張力熱延鋼板ならびにその製造方法および加工方法 |
CN1291466C (zh) * | 2001-12-27 | 2006-12-20 | 威宇科技测试封装有限公司 | 一种具有散热片的半导体封装方法 |
KR100806061B1 (ko) | 2002-04-11 | 2008-02-21 | 페어차일드코리아반도체 주식회사 | 칩 손상이 방지되고 열 저항 특성이 개선이 개선된 전력용반도체 모듈 |
JP2005109100A (ja) * | 2003-09-30 | 2005-04-21 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
DE112005000168T5 (de) * | 2004-01-13 | 2006-11-30 | Mitsui Mining & Smelting Co., Ltd. | Verfahren zur Herstellung eines Kunstharzformgehäuses, Alkoholkonzentrationssensor und Vorrichtung zum Messen einer Alkoholkonzentration |
-
2003
- 2003-10-20 JP JP2003358815A patent/JP3854957B2/ja not_active Expired - Lifetime
-
2004
- 2004-10-07 US US10/959,437 patent/US7166926B2/en active Active
- 2004-10-19 KR KR1020040083390A patent/KR100700427B1/ko active IP Right Grant
- 2004-10-19 CN CNB2004100861098A patent/CN100336190C/zh active Active
-
2006
- 2006-10-27 US US11/588,407 patent/US7781262B2/en active Active
- 2006-12-12 KR KR1020060126559A patent/KR100889422B1/ko active IP Right Grant
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101980357B (zh) * | 2005-12-12 | 2013-05-01 | 三菱电机株式会社 | 半导体器件的制造方法以及半导体器件的树脂密封用模具 |
CN104160493B (zh) * | 2012-03-07 | 2017-03-22 | 丰田自动车株式会社 | 半导体装置及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2005123495A (ja) | 2005-05-12 |
CN100336190C (zh) | 2007-09-05 |
US20050082690A1 (en) | 2005-04-21 |
KR100700427B1 (ko) | 2007-03-27 |
KR20050037958A (ko) | 2005-04-25 |
US7781262B2 (en) | 2010-08-24 |
KR20070015486A (ko) | 2007-02-05 |
US20070042531A1 (en) | 2007-02-22 |
KR100889422B1 (ko) | 2009-03-23 |
US7166926B2 (en) | 2007-01-23 |
JP3854957B2 (ja) | 2006-12-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100336190C (zh) | 半导体装置的制造方法及半导体装置 | |
CN1146044C (zh) | 具有弯成j-型引线端子的半导体器件 | |
CN1604324A (zh) | 半导体器件及其制造方法 | |
CN1235288C (zh) | 导线接合性增强的半导体器件组件 | |
CN1157774C (zh) | 半导体器件的制造方法和半导体器件 | |
CN1344024A (zh) | 引线框架及具有引线框架的半导体封装和半导体封装的制造方法 | |
CN1168140C (zh) | 半导体封装件及其制造方法 | |
CN1516252A (zh) | 制造半导体集成电路器件的方法 | |
CN1292475C (zh) | 半导体封装及其制造方法 | |
CN1748307A (zh) | 有引线模制组件设计中的选择性倒装芯片及制造方法 | |
CN1685498A (zh) | 用于整体成型组件的热增强封装 | |
CN1679162A (zh) | 基于基片的未模制封装 | |
CN1638158A (zh) | 表面安装型半导体器件及其引线架结构 | |
CN1901187A (zh) | 半导体器件 | |
KR20070062413A (ko) | 반도체 장치 및 반도체 장치의 수지 밀봉용 금형 | |
CN1812091A (zh) | 半导体装置 | |
CN1187037A (zh) | 半导体封装及其制造方法 | |
CN1191629C (zh) | 引线框、半导体装置及其制造方法、电路基板和电子装置 | |
CN1371127A (zh) | 引线框及使用该引线框的树脂密封型半导体装置制造方法 | |
CN1309071C (zh) | 引线框架以及制造该引线框架的方法 | |
CN1893035A (zh) | 电路装置及其制造方法 | |
CN1184678C (zh) | 半导体器件及其制造方法、电路衬底及电子仪器 | |
CN1213487C (zh) | 半导体组件及其制造方法 | |
CN1124650C (zh) | 半导体器件、该器件的制造方法和所使用的引线架 | |
CN1855450A (zh) | 高散热性的半导体封装件及其制法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |