CN1577781A - 半导体装置及其制造方法 - Google Patents
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Abstract
一种提高可靠性的半导体封装件及其制造方法。其具有:准备多个被密封设备(半导体集成电路、CCD等)形成的半导体晶片(10)和支撑该半导体晶片(10)并且密封被密封设备的玻璃基板(11),并在玻璃基板(11)对面的半导体晶片(10)的主面或半导体晶片(10)对面的玻璃基板(11)的主面的任何一个上涂敷常温硬化树脂(12)的工序;在常温下,介由常温硬化树脂(12)粘合半导体晶片(10)和玻璃基板(11)的工序;将半导体晶片(10)沿其划线进行划片,分割成各个半导体封装件的工序。
Description
技术领域
本发明涉及半导体装置及其制造方法,尤其涉及芯片尺寸封装件(CSP;Chip Size Package)及其制造方法。
背景技术
近年,作为立体安装技术,而且作为新的封装技术,芯片尺寸封装件(CSP;Chip Size Package)受到注目。所谓CSP是指具有与半导体芯片尺寸略相同的外形尺寸的小型封装件。
现在,作为CSP的一种,BGA型的CSP众所周知。该BGA型的CSP,多个球状的导电端子成格子状排列在CSP的一个主面上,电连接导电端子和搭载在CSP另一面上的半导体集成电路的焊盘电极等。
并且,在该CSP装入电子设备中时,通过把各导电端子压接在印刷基板上的配线图案上,电连接CSP内的半导体集成电路和搭载在印刷基板上的外部电路。
该BGA型的CSP,与具有侧部突出的引脚的SOP(Small OutlinePackage)或QFP(Quad Flat Package)等其他CSP比较,具有可设置多个导电端子,并且实现小型化的优点。这样的CSP,例如可作为搭载在手提电话上的数码相机的图像传感器芯片使用。在此,作为图像传感器,CCD(ChargeCoupled Device)等的感光元件作为被密封装置时,密封材料可由透光玻璃等材料构成。
接着,参照附图说明现有CSP的制造方法。图2是表示现有CSP的制造方法的剖面图。
如图2(a)所示,准备半导体晶片20(例如由硅构成)以及密封同时并支撑半导体晶片20的玻璃基板21。在半导体晶片20上,形成有多个半导体集成电路(未图示)、CCD(Charge Coupled Device)等的感光元件(未图示)等。玻璃基板21具有这样的性质,在半导体晶片20上形成的CCD等感光元件上,透过并导入来自半导体晶片20外部的光。
然后,如图2(b)所示,在玻璃基板21对面的半导体晶片20的主面、或半导体晶片20对面的玻璃基板21主面的任何一个上,涂敷高温硬化树脂22。高温硬化树脂22具有在高温(120℃左右)下硬化,粘合互相覆盖着的材料的功能。
然后,如图2(c)所示,介由高温硬化树脂22使玻璃基板21和半导体晶片20紧密贴上后,在高温(120℃左右)下使高温硬化树脂22硬化。由此,完成玻璃基板21和半导体晶片20的粘合。
然后,(未图示),温度从高温(120℃左右)回到常温(25℃左右)后,在CSP的基板侧的主面上形成与CSP内的焊盘电极电连接的多个导电端子。然后,将粘合玻璃基板21的半导体晶片20,沿其划线进行划片,分割成各个半导体芯片,即CSP。
另外,相关技术文献如下专利文献1。
专利文献1
特表2002-512436号公报
发明内容
但是,如图2(d)所示,在粘合完成后恢复的温度常温(25℃左右)下,介由高温硬化树脂22相互粘合的半导体晶片20和玻璃基板21中,玻璃基板21收缩,玻璃基板21侧发生翘曲。
参照图3的半导体晶片20以及玻璃基板21的剖面图说明该半导体晶片20和玻璃基板21上发生的翘曲。
如图3所示,玻璃基板21的线膨胀系数一般是+10PPM/°K左右。即使是以与硅粘合为目的抑制线膨胀系数较低的超高质量玻璃,还是+4PPM/°K,也比半导体晶片20的线膨胀系数2PPM/°K大。因此,硬化高温硬化树脂时,通过高温(120℃左右),线膨胀系数大的玻璃基板21,比线膨胀系数小的半导体晶片20膨胀得大。
并且,温度下降成常温(25℃左右),线膨胀系数大的玻璃基板21的收缩力A大于线膨胀系数小的半导体晶片20的收缩力B。即,在半导体晶片20和玻璃基板21的边界面上,产生与收缩力A和收缩力B的差相当的应力。由此,在常温(25℃左右)下的玻璃基21因为比粘合的半导体晶片20收缩得大,在互相粘合的半导体晶片20和玻璃基板21上,发生向玻璃基板21侧收缩的翘曲。
所述的半导体晶片20和玻璃基板21的边界面上的应力,在半导体晶片20通过划片分割成各个封装件时急剧释放。其情况如图4所示。图4(a)是半导体晶片20以及玻璃基板21的平面图,图4(b)是半导体晶片20以及玻璃基板21的剖面图。如图4(a)和图4(b)所示,该应力的急剧释放导致在半导体晶片20的划线SL附近,随处出现龟裂。该龟裂导致出现CSP的工作不正常、吸湿、配线不正常等现象。
并且,在划线后,各个封装件上,也因残存上述半导体晶片20和玻璃基板21的收缩力的差异导致的应力,在温度循环试验等时,出现半导体基板上形成的集成电路、其焊盘电极、有机薄膜或者微透镜等疲劳破损。
针对上述问题有各种对策,例如有玻璃基板21使用线膨胀系数与半导体晶片20的材料(如硅)相近的玻璃材料的方法。根据这种方法,因为半导体晶片20与玻璃基板21的收缩力的差异减少,半导体晶片20与玻璃基板21的边界面上的应力也减少。
另外,作为解决上述问题的其他方法的例,有划线时使用的刀片经常控制在高质量状态的方法。根据该方法,可减少划线时龟裂的发生。
但是,上述玻璃基板21使用线膨胀系数与半导体晶片20的材料的线膨胀系数相近的材料的方法,虽然可减少粘合温度造成的应力,但存在这样的问题,即玻璃基板21比用于密封目的的一般玻璃材料价格高,制造成本大。
另外,控制划线时使用的刀片经常在高质量状态的方法,虽然可减少划线时的应力释放导致发生的龟裂,但由于交换刀片的次数多、需要高质量的刀片和工序内的检查,使制造成本增大。
因此,本发明提供具有在半导体晶片20和玻璃基板21的边界面不发生由粘合温度导致的应力的粘合方法的CSP的制造方法。
本发明的半导体装置是鉴于上述课题研发而成的,其特征在于,具有:多个形成半导体集成电路的半导体晶片、支撑其半导体晶片的玻璃基板、在常温下可以粘合半导体晶片和支撑基板的常温硬化树脂。半导体晶片和支撑基板介由常温硬化树脂粘合。
并且,本发明的半导体装置,其特征在于,在所述结构中,常温硬化树脂是紫外线硬化树脂或者二溶液性环氧树脂。
另外,本发明的半导体装置的制造方法,其特征在于,包含以下的工序。即,准备多个半导体集成电路形成的半导体晶片和支撑其半导体晶片的玻璃基板,在玻璃基板对面的半导体晶片的主面、或半导体晶片对面的玻璃基板的主面的任何一个上涂敷常温硬化树脂;在常温下,介由常温硬化树脂粘合半导体晶片和玻璃基板;将半导体晶片沿其划线划片分割成各个半导体芯片。
并且,本发明的半导体装置的制造方法,其特征在于,在所述制造方法中,常温硬化树脂是紫外线硬化树脂或者二溶液性环氧树脂。
依据本发明的半导体装置的制造方法,在常温下可粘合半导体晶片和玻璃基板。由此,可实现难以发生线膨胀系数的差异导致的应力引起的龟裂、疲劳破损的半导体封装件。
并且在实现上述半导体封装件时,不要现有必要的特殊玻璃基板和控制划线用刀片的高质量。由此,不会增加制造成本,可实现这样的半导体封装件。
附图说明
图1是表示用于实施本发明的最优实施方式的半导体装置及其制造方法的剖面图;
图2是表示现有的半导体装置的制造方法的剖面图;
图3是表示现有的半导体装置的一部分的剖面图;
图4是表示现有的半导体装置的一部分的平面图以及剖面图。
具体实施方式
以下,参照附图详细说明用于实施本发明的最优实施方式的半导体封装件及其制造方法。
图1是表示本发明的实施方式的半导体封装件及其制造方法的剖面图。半导体封装件的装置经过以下工序。
如图1(a)所示,准备形成有未图示的多个被密封设备(例如半导体集成电路和CCD等)的半导体晶片10(例如由硅构成)。在此,被密封装置形成在通过半导体晶片10的划线SL区分成格子状的范围。
另外,准备支撑半导体晶片10并密封被密封装置的玻璃基板11。在此,该玻璃基板21的线膨胀系数希望接近半导体晶片10的线膨胀系数,但不限与此,也可具有不同的线膨胀系数。例如,玻璃基板21的线膨胀系数也可以是4PPM/°K左右、半导体晶片的线膨胀系数也可以是2PPM/°K左右。
然后,如图1(b)所示,在玻璃基板11对面的半导体晶片10的主面、或者半导体晶片10对面的玻璃基板11的主面上的任意一个面上涂敷常温硬化树脂12。在图1(b)中,在半导体晶片10对面的玻璃基板11的主面上涂敷常温硬化树脂12。
该常温硬化树脂是在常温(25℃左右)硬化的树脂。常温硬化树脂希望是通过紫外线的照射硬化的紫外线硬化树脂(例如株式会社テスク的一般粘合用紫外线固化性树脂:A-1363,A-1368,A-1408等)。或者常温硬化树脂可以是二溶液性环氧树脂(例如株式会社テスク的低粘度型二溶液性环氧树脂:C-1074A/B,C-1075A/B等)和其他的环氧类树脂(例如オ一テツクス株式会社的光固化型环氧类粘合剂『PARQIT』。
然后,如图1(c)所示,把涂敷有玻璃基板11的常温硬化树脂12的主面,紧密靠近形成有半导体晶片10的被密封设备的主面。然后,经过硬化必要的规定的时间完成半导体晶片10和玻璃基板11的粘合。另外,常温硬化树脂12是紫外线硬化树脂时,对于互相紧密靠近的半导体晶片10和玻璃基板11,含有照射紫外线的工序。
这样的粘合工序,因为在常温下进行,半导体晶片10以及玻璃基板11不会膨胀和收缩。由此,粘合完成后的半导体晶片10以及玻璃基板11的边界面上不生成应力,可抑制由划片时的急剧的应力释放导致的龟裂等现象发生。
然后,(未图示),将相互粘合的玻璃基板11和半导体晶片10,沿半导体晶片10的划线进行划片,分割成各个半导体封装件10A。在此,划片后的半导体封装件10A内,不残留高温硬化树脂导致的粘合时可观察到的应力。这是因为,在常温下粘合,在划片前的半导体晶片10以及玻璃基板11的边界面上不产生应力。由此,可避免在温度循环试验时,产生半导体基板上形成的集成电路、其焊盘电极、有机薄膜或者微透镜等疲劳破损的问题。
并且,根据上述制造方法,没有必要为防止介由高温硬化树脂粘合时的温度导致的应力而必要的特殊玻璃材料、控制划片用刀片的高质量,可防止装置成本的增大。
另外,在上述实施方式中,常温硬化树脂12是紫外线硬化树脂和二溶液性环氧树脂,但不限于此,也可是具有常温下硬化的性质、并可以粘合半导体晶片10和玻璃基板11的硬化性树脂。
并且,在上述的实施方式中,半导体晶片10上形成的被密封装置,由玻璃基板11密封,但在不含被密封设备CCD等感光元件时,不限于此,也可代替玻璃基板,由不透光材料构成的基板密封被密封装置。
Claims (6)
1.一种半导体装置,其特征在于,具有:多个形成半导体集成电路的半导体晶片、支撑该半导体晶片的支撑基板、在常温下可以粘合所述半导体晶片和所述支撑基板的常温硬化树脂,所述半导体晶片和所述支撑基板介由所述常温硬化树脂粘合。
2.如权利要求1所述的半导体装置,其特征在于,所述常温硬化树脂是紫外线硬化树脂。
3.如权利要求1所述的半导体装置,其特征在于,所述常温硬化树脂是二溶液性环氧树脂。
4.一种半导体装置的制造方法,其特征在于,具有如下工序,准备多个半导体集成电路形成的半导体晶片和支撑该半导体晶片的支撑基板,在所述支撑基板对面的所述半导体晶片的主面或所述半导体晶片对面的所述支撑基板的主面的任何一个上涂敷常温硬化树脂;在常温下,介由所述常温硬化树脂粘合所述半导体晶片和所述支撑基板;将所述半导体晶片沿其划线划片分割成各个半导体芯片。
5.如权利要求4所述的半导体装置的制造方法,其特征在于,所述常温硬化树脂是紫外线硬化树脂。
6.如权利要求4所述的半导体装置的制造方法,所述常温硬化树脂是二溶液性环氧树脂。
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JP2003280981A JP2005051018A (ja) | 2003-07-28 | 2003-07-28 | 半導体装置及びその製造方法 |
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CN101297403B (zh) * | 2005-09-22 | 2010-05-19 | 富士胶片株式会社 | 切割固态图像拾取器件的方法 |
CN109950172A (zh) * | 2017-12-20 | 2019-06-28 | 海太半导体(无锡)有限公司 | 一种半导体的固化方法 |
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KR100693193B1 (ko) * | 2005-11-03 | 2007-03-13 | 주식회사 나래나노텍 | 자외선을 이용한 패턴 전극의 본딩 구조 및 그 본딩 방법 |
US8247773B2 (en) | 2007-06-26 | 2012-08-21 | Yamaha Corporation | Method and apparatus for reading identification mark on surface of wafer |
JP5056201B2 (ja) * | 2007-06-26 | 2012-10-24 | ヤマハ株式会社 | 識別マークの読取方法 |
EP2034718A1 (en) * | 2007-09-05 | 2009-03-11 | THOMSON Licensing | System and method for positioning and fixing an image sensor to a beamsplitter |
JP6443668B2 (ja) * | 2014-12-17 | 2018-12-26 | 日本電気硝子株式会社 | 支持ガラス基板及びこれを用いた積層体 |
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JP2924110B2 (ja) * | 1990-07-04 | 1999-07-26 | ミノルタ株式会社 | 光シャッタ装置 |
JPH05179211A (ja) * | 1991-12-30 | 1993-07-20 | Nitto Denko Corp | ダイシング・ダイボンドフイルム |
EP0594277B1 (en) * | 1992-10-21 | 1998-12-02 | Toray Industries, Inc. | Optical recording medium |
JP3410202B2 (ja) * | 1993-04-28 | 2003-05-26 | 日本テキサス・インスツルメンツ株式会社 | ウェハ貼着用粘着シートおよびこれを用いた半導体装置の製造方法 |
US5851845A (en) * | 1995-12-18 | 1998-12-22 | Micron Technology, Inc. | Process for packaging a semiconductor die using dicing and testing |
JPH10182916A (ja) * | 1996-10-21 | 1998-07-07 | Nippon Paint Co Ltd | N複素環を含むアクリル樹脂含有金属表面処理組成物、処理方法及び処理金属材料 |
US6489183B1 (en) * | 1998-07-17 | 2002-12-03 | Micron Technology, Inc. | Method of manufacturing a taped semiconductor device |
JP2001135598A (ja) * | 1999-08-26 | 2001-05-18 | Seiko Epson Corp | ウエハのダイシング方法、半導体装置及びその製造方法、回路基板並びに電子機器 |
JP3544362B2 (ja) * | 2001-03-21 | 2004-07-21 | リンテック株式会社 | 半導体チップの製造方法 |
JP2002353369A (ja) * | 2001-05-28 | 2002-12-06 | Sharp Corp | 半導体パッケージおよびその製造方法 |
SG120887A1 (en) * | 2001-12-03 | 2006-04-26 | Disco Corp | Method of processing a semiconductor wafer and substrate for semiconductor wafers used in the same |
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- 2004-07-26 CN CNA2004100549405A patent/CN1577781A/zh active Pending
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Cited By (2)
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CN101297403B (zh) * | 2005-09-22 | 2010-05-19 | 富士胶片株式会社 | 切割固态图像拾取器件的方法 |
CN109950172A (zh) * | 2017-12-20 | 2019-06-28 | 海太半导体(无锡)有限公司 | 一种半导体的固化方法 |
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EP1503412A2 (en) | 2005-02-02 |
EP1503412A3 (en) | 2005-03-30 |
JP2005051018A (ja) | 2005-02-24 |
KR100608185B1 (ko) | 2006-08-08 |
US20050029641A1 (en) | 2005-02-10 |
KR20050013936A (ko) | 2005-02-05 |
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