CN1577725A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN1577725A
CN1577725A CNA2004100600863A CN200410060086A CN1577725A CN 1577725 A CN1577725 A CN 1577725A CN A2004100600863 A CNA2004100600863 A CN A2004100600863A CN 200410060086 A CN200410060086 A CN 200410060086A CN 1577725 A CN1577725 A CN 1577725A
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face
semiconductor device
circuit board
substrate
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谷口润
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Seiko Epson Corp
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Seiko Epson Corp
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Abstract

本发明提供一种可靠性高且制造效率优秀的半导体装置以及该半导体装置的制造方法。半导体装置的制造方法中，包括在具有布线图形的布线基板上(10)，搭载形成有集成电路(22)的半导体芯片(20)的步骤；以及在布线基板(10)上搭载多个具有贯通导电部(50)的电连接用基板(40)，使上述贯通导电部(50)的第1端面(52)面对上述布线图形(12)而电连接的步骤；以及形成密封上述半导体芯片(20)以及上述电连接用基板(40)且使上述贯通导电部(50)的第2端面(54)从其中露出来的密封部(60)的步骤。

Description

半导体装置及其制造方法
技术领域
本发明涉及一种半导体装置及其制造方法
背景技术
为实现省空间化，众所周知的方法是层叠半导体装置。因此，为提高能够层叠的半导体装置的可靠性，并提高其制造效率，最好使该半导体装置的形成方法较容易。
发明内容
本发明的目的是提供一种可靠性高且制造效率高的半导体装置及其制造方法。
(1)本发明的相关半导体装置的制造方法中，包括：在具有布线图形的布线基板上，搭载形成有集成电路的半导体芯片的步骤；
在上述布线基板上搭载多个具有贯通导电部的电连接用基板，使上述贯通导电部的第1端面面对上述布线图形而电连接的步骤；以及
通过传递模塑法形成密封上述半导体芯片以及上述电连接用基板的密封部，同时使上述贯通导电部的第2端面从上述密封部中露出来的步骤。
依据本发明，能够容易地制造贯通导电部的一部分从密封部中露出来的半导体装置。也即，能够容易地制造能够通过贯通导电部与其他半导体装置电连接并能层叠的半导体装置。
(2)该半导体装置的制造方法中，
还可以在上述贯通导电部的上述第2端面的周缘部分上形成凹部。这样，由于能够防止在密封工序中第2断面被用于模塑的树脂所覆盖，从而能够容易地制造电连接可靠性高的半导体装置。
(3)该半导体装置的制造方法中，
还可以在上述电连接用基板的面对上述布线基板的表面的相反侧的表面的周缘部分上，形成包围全体上述贯通导电部的上述第2端面的凸部。这样，由于能够防止在密封工序中第2断面被用于模塑的树脂所覆盖，从而能够容易地制造电连接可靠性很高的半导体装置。
(4)该半导体装置的制造方法中，
还可以在上述电连接用基板的面对上述布线基板的表面的相反侧的表面上，形成分别包围上述各个贯通导电部的上述第2端面的凸部。这样，由于能够防止在密封工序中第2断面被用于模塑的树脂所覆盖，从而能够容易地制造电连接可靠性很高的半导体装置。
(5)本发明的相关半导体装置中，包括：具有布线图形的布线基板，
被搭载在上述布线基板上的，形成有集成电路的半导体芯片，
被搭载在上述布线基板上的，含有绝缘部和多个贯通导电部的电连接用基板，以及
密封上述半导体芯片和上述电连接用基板的密封部；
上述贯通导电部的第1端面面对上述布线图形并电连接，
上述贯通导电部的第2端面从上述密封部中露出来，
上述绝缘部和上述密封部是由不同的材料所形成的。本发明能够提供一种导电部的一部分从密封部中露出来的半导体装置。也即，能够提供一种能够多层层叠的半导体装置。
附图说明
图1为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图2为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图3为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图4A以及图4B为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图5A以及图5B为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图6A以及图6B为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图7为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图8为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图9为说明适用本发明的实施方式的相关半导体装置的制造方法的示意图。
图10为说明装有使用本发明的实施方式的相关半导体装置的电路基板的示意图。
图11为说明含有适用本发明的实施方式的相关半导体装置的电子机器的示意图。
图12为说明含有适用本发明的实施方式的相关半导体装置的电子机器的示意图。
具体实施方式
下面对照附图说明适用本发明的具体实施方式。但是，本发明并不仅限于下述实施方式。
图1～图8为用来说明适用本发明的实施方式的相关半导体装置的制造方法的图。如图1所示，本实施方式的相关半导体装置的制造方法中，包括将半导体芯片20搭载在布线基板10上的步骤。
布线基板10可以是由有机类(聚(酰)亚胺基板等)或无机类(陶瓷基板、玻璃基板等)中的任何一种材料所形成的，还可以是由有机类和无机类的复合构造(玻璃环氧基板等)所形成的。布线基板10的平面形状没有特别的限制，矩形较多。布线基板10是单层或多层基板都可以。布线基板10上，形成有由多个布线所构成的布线图形12。但是在图1以及图2中，省略了布线图形12。布线基板10上，还可以形成用来使一侧的表面和另一侧的表面电连接的多个贯通孔14(参考图3)。贯通孔14既可以是被导电材料所埋起来的，又可以是内壁被镀上金属的通孔。这样，可实现布线基板10的两面的电连接。
半导体芯片20的形状没有特别的限定，但一般是长方体(包括正方体)的。在半导体芯片20中形成有由晶体管和存储元件等所构成的集成电路22(参考图3)。半导体芯片20可以含有与其内部电连接的多个凸起电极24。凸起电极24可以在半导体芯片20的表面上，沿着两边或四边而配置。或者凸起电极24还可以配置在半导体芯片20的表面的中央部位。凸起电极24可以由铝族或铜族金属所构成。另外，在半导体芯片20上，还可以形成至少避开了凸起电极24的一部分的钝化膜(图中未显示)。钝化膜例如可以由SiO2、SiN以及聚(酰)亚胺树脂等构成。另外，本实施方式的相关半导体装置的制造方法中，可以使形成有凸起电极24的面的相反的一面和布线基板10向面对、来搭载半导体芯片20(参考图3)。半导体芯片20可以被粘接剂固定在布线基板10上。这时可以使用绝缘性的粘接剂作为粘接剂。另外，可以使多个半导体芯片层叠搭载在布线基板10上，通过这样还可以制造包含层叠型的半导体芯片的半导体装置。
本实施方式，如图1所示，可以在一个布线基板10上搭载多个半导体芯片20，后面的工序对多个半导体芯片20一并进行。这样，由于能够一并形成多个半导体装置，从而能够提高半导体装置的生产效率。然而，和上述方式不一样，也可以在一个布线基板上搭载一个半导体芯片，分别对半导体芯片进行后继工序。
本实施方式的相关半导体装置的制造方法中，还可以包括使半导体芯片20与布线图形12电连接的步骤。如图2所示，可以使用导线30使布线图形12与半导体芯片20电连接。具体而言，可以通过引线接合工序形成电连接布线图形12与半导体芯片20的导线30，使它们电连接。引线接合工序可以由众所周知的任何一种方法来进行，例如可以通过球形凸点(ball-bump)法形成导线30。另外，导线30的材料没有特别的限定，例如可以使用金线。另外，导线30的线弧高度可以比后述的电连接用基板40低。
本实施方式的相关半导体装置的制造方法，如图3所示，包括在布线基板10上搭载包含多个贯通导电部50的电连接用基板40，并使贯通导电部50的第1端面52面向布线图形12并电连接的步骤。如图3所示，可以通过使贯通导电部50的第1端面52和布线图形12相接触，而使得贯通导电部50和布线图形12电连接。这时，可以用粘接剂(图中未显示)将电连接用基板40固定在布线基板10上。或者，利用ACF或ACP，通过在贯通导电部50和布线图形12之间形成导电粒子而使得两者电连接。电连接用基板40，可以沿着半导体芯片20的平行的两边配置。或者，电连接用基板40，还可以沿着半导体芯片20的四边配置。电连接用基板40可以包含绝缘部42和贯通导电部50。电连接用基板40例如可以由在绝缘部42上形成贯通穴的工序以及在该贯通穴上形成贯通导电部50的工序来形成。可以在电连接用基板40内形成一列贯通导电部50。或者也可以在电连接用基板40内形成多行和多列贯通导电部50。这时，贯通导电部50可以以锯齿状排列。另外，绝缘部42的材料没有特别的限定，例如可以使用玻璃环氧树脂。另外，贯通导电部的材料没有特别的限定，例如可以使用Cu。
贯通导电部50的形状没有特别的限定，例如可以如图4A以及图4B所示，可以使和长度方向垂直的截面的面积越接近底部就越大。这样由于能够使底面的面积较大，从而能够制造出电可靠性较高的半导体装置。另外，如图4B所示，可以在贯通导电部50的第2端面54的周缘部分形成凹部56。凹部56可以将第2端面54的中央部58围起来。换而言之，第2端面54上可以有被凹部56所包围的中央部58。这样，即使在后述的树脂密封工序中，膜塑树脂侵入了第2端面54的情况下，通过凹部56，能够防止膜塑树脂到达第2端面54的中央部58。因此，能够使第2端面54(中央部58)稳定的露出来，从而能够制造出电可靠性很高的半导体装置。另外，图4B是图4A的IVB-IVB线截面的一部分的放大图。但本发明并不限定于此，贯通导电部50可以为柱状(包括圆柱和棱柱)，其端面可以是平坦的。
电连接用基板40的形状没有特别的限定，例如可以是在和布线基板10相面对的表面的相反侧的表面上有凸部的形状。如图5A以及图5B所示，可以在电连接用基板40的和布线基板10相面对的表面的相反侧的表面的周围部上，形成将所有的贯通导电部50的第2端面54都包围起来的凸部44。这样，在树脂密封工序中，通过凸部44能够防止膜塑树脂进入第2端面54。因此，能够使第2端面54稳定的露出来，从而能够制造出电可靠性很高的半导体装置。另外，图5B是图5A的VB-VB线截面的一部分的放大图。或者如图6A以及图6B所示，可以在电连接用基板40的和布线基板10相面对的表面的相反侧的表面的上，形成分别将各个贯通导电部50的第2端面54包围起来的凸部46。这样，由于能够达到同样的效果，从而能够制造出电可靠性很高的半导体装置。另外，图6B是图6A的VIB-VIB线截面的一部分的放大图。但电连接用基板40的形状并不限定与此，电连接用基板40还可以是没有凸部的长方体(包括正方体)。
本实施方式的相关半导体装置的制造方法，包括形成将半导体芯片20以及电连接用基板40密封起来的密封部60的步骤。密封部60由传递膜塑法制成。也即，如图7所示，可以在将搭载有半导体芯片20以及电连接用基板40的布线基板10安装在铸模62上之后，使膜塑树脂流入铸模62内而形成密封部60。在一个布线基板10上搭载有多个半导体芯片20的情况下，可以将这些多个半导体芯片20一并密封(参考图8)。另外，密封部60的材料没有特别的限定，既可以使用和电连接用基板40的绝缘部42的材料一样的材料，也可以使用和其不一样的材料。
本实施方式的相关半导体装置的制造方法中，可以形成使贯通导电部50的第2端面54从密封部60中露出来的密封部60(参考图8)。通过使贯通导电部50露出来，能够和其他半导体装置电连接，从而能够制造能够层叠的半导体装置。在将用于膜塑的铸模62紧压在电连接用基板40上的状态下，向铸模内注入膜塑树脂，就能够防止膜塑树脂侵入到贯通导电部50的第2端面54，从而能够容易的使贯通导电部50的第2端面54露出来。另外，如前所述，在贯通导电部50的第2端面54上形成有凹部56的情况下，或者，在电连接用基板40上形成有凸部44或凹部46的情况下，由于能够有效的防止膜塑树脂侵入到贯通导电部50的第2端面54，能够更加容易的使贯通导电部50的第2端面54露出来。
最后，如图8所示，可以使用刀片80等将布线基板以及密封树脂60切断，使其包含一个半导体芯片20的，制造半导体装置1。半导体装置1中包含具有布线图形12的布线基板10。半导体装置1中还包含搭载在布线基板10上的形成有集成电路22的半导体芯片20。半导体装置1中还包含搭载在布线基板10上的具有绝缘部42以及多个贯通导电部50的电连接用基板40。半导体装置1中还包含将半导体芯片20以及电连接用基板40密封起来的密封部60。贯通导电部50的第1端面52面对布线图形12而电连接。贯通导电部50的第2端面54从密封部60中露出来。因此，通过贯通导电部50能够得到上下半导体装置的导通通道。也即，能够提供能够多层层叠的半导体装置。另外，关于半导体装置1的其他构造，可以适用于上述半导体装置的制造方法中所说明的内容。
另外，可以层叠半导体装置1并制造出形成有外部端70的层叠型半导体装置100。这时，如图9所示，可以使贯通导电部50互相接触而使上下的半导体装置1电连接。这时可以用粘接剂(图中未显示)将半导体装置1互相固定。或者利用ACF或ACP，通过在贯通导电部50之间形成导电粒子而使得上下半导体装置1电连接。图10中显示了装有半导体装置100的电路基板1000；作为含有半导体装置1的电子机器，图11中显示了笔记本型个人计算机2000，图12中显示了移动电话。
另外，本发明并不限定于上述实施方式，还能够进行各种变形。例如，本发明包括和实施方式中所说明的构成实质上一样的构成(例如功能、方法以及结果一样的构成，或者目的以及效果一样的构成)。另外，本发明还包括将实施方式中所说明的构成中的非本质部分替换掉所得到的构成。另外，本发明还包括能够起到和实施方式中所说明的构成一样的效果的构成，或者能够达到相同的目的的构成。另外，本发明还包括在实施方式中所述的构成上添加众所周知的技术所得到的构成。

Claims (5)

1.一种半导体装置的制造方法，其特征在于，包括：
在具有布线图形的布线基板上，搭载形成有集成电路的半导体芯片的步骤；
在上述布线基板上搭载具有多个贯通导电部的电连接用基板，使上述贯通导电部的第1端面面对上述布线图形并电连接的步骤；以及
通过传递模塑法形成密封上述半导体芯片以及上述电连接用基板的密封部，并使上述贯通导电部的第2端面从上述密封部中露出来的步骤。
2.如权利要求1所述的半导体装置的制造方法，其特征在于：
在上述贯通导电部的上述第2端面的周缘部分形成凹部。
3.如权利要求1或2所述的半导体装置的制造方法，其特征在于：
在上述电连接用基板的面对上述布线基板的面的相反侧的面的周缘部分上，形成包围全体上述贯通导电部的上述第2端面的凸部。
4.如权利要求1或2所述的半导体装置的制造方法，其特征在于：
在上述电连接用基板的面对上述布线基板的面的相反侧的面上，形成分别包围上述贯通导电部的上述第2端面的凸部。
5.一种半导体装置，其特征在于，包括：
具有布线图形的布线基板；
被搭载在上述布线基板上、并形成有集成电路的半导体芯片；
被搭载在上述布线基板上、并具有绝缘部和多个贯通导电部的电连接用基板；以及
密封上述半导体芯片和上述电连接用基板的密封部，
上述贯通导电部的第1端面面对上述布线图形并电连接，
上述贯通导电部的第2端面从上述密封部中露出，
上述绝缘部与上述密封部是由不同的材料所形成的。
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