CN1333437C - Mask with two-way alignment pattern - Google Patents

Mask with two-way alignment pattern Download PDF

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Publication number
CN1333437C
CN1333437C CNB2004100174052A CN200410017405A CN1333437C CN 1333437 C CN1333437 C CN 1333437C CN B2004100174052 A CNB2004100174052 A CN B2004100174052A CN 200410017405 A CN200410017405 A CN 200410017405A CN 1333437 C CN1333437 C CN 1333437C
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CN
China
Prior art keywords
pattern
mask
aligned pattern
way
alignment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2004100174052A
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Chinese (zh)
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CN1677616A (en
Inventor
张庆祥
郑铭仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CNB2004100174052A priority Critical patent/CN1333437C/en
Publication of CN1677616A publication Critical patent/CN1677616A/en
Application granted granted Critical
Publication of CN1333437C publication Critical patent/CN1333437C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

The present invention provides a mask with a two-way alignment pattern, which comprises a layout pattern zone and an exterior pattern zone which is arranged on the periphery of the layout pattern, wherein a plurality of bidirectional alignment patterns which are formed by the staggered arrangement of a plurality of horizontal pattern groups and a plurality of perpendicular pattern group are arranged on the exterior pattern zone. When the bidirectional alignment patterns are aligned in a multiple mode, align angles for alignment can be enhanced, effects of generated energy loss because of the alignment can be reduced and also the space of a chip street alignment mark can be saved.

Description

Mask with two-way aligned pattern
Technical field
The present invention relates to a kind of mask, particularly a kind of mask with two-way aligned pattern with aligned pattern.
Background technology
Generally speaking, semiconductor technology is for cooperating the precisionization of ultra micro day by day of line design on the chip now, generally all in advance required line pattern (Pattern) is amplified in exposure and use on the mask (Photo Mask), and then utilize little shadow technology (Photolithography), after pattern dwindled with particular power, be projected in again on the ad-hoc location for the treatment of the exposure chip surface.
But along with being showing improvement or progress day by day of little shadow technology, complicated with required line pattern generally all adopts stepper to carry out the transfer of mask pattern, obtains preferable resolution and preferable particulate tolerance with this.But the regional exposure mode need be adopted with a chip by the topmost problem of this kind mode system, finish the making of simple layer patterning, therefore need carry out tens of times exposure, just can finish the technology of the single photoresist coating on the wafer, therefore for allow each layer mask between stack (overlay) of pattern can be accurate, carry out before the step of exposure, all must carry out the exposure area and aim at affirmation exposure bench.
Usually exposure bench uses unidirectional alignment mark (alignment mark) to aim at, yet, if disposable aligning is only used in an exposure area, then can only obtain accurate chip data (wafer information), and the leakage exposure area is as irradiation diapason every alignment parameters (shot alignment parameter) such as (exposure shot), so in order to remedy described shortcoming, and technical development now goes out aligned pattern as shown in Figure 1, carry out multiple aligning (multiple alignment), but when this kind aligned pattern is carried out aim detecting, transducer need carry out directions X scanning aligned pattern 10 earlier to obtain the amount of alignment measured value of Y direction, carry out Y scanning direction aligned pattern 12 again to obtain the amount of alignment measured value of directions X, could obtain one group of vector (Vector) message by twice detecting, so the tediously long aligning time is caused the burden on the production capacity, and its bigger aligned pattern space also is a load greatly with respect to the space of chip scribe line.
Therefore, the present invention is directed to the problems referred to above, propose a kind of two-way aligned pattern solve carry out usually dual on time, transducer need carry out the shortcoming that twice detecting could obtain one group of svm message, and has dwindled the space of occupied chip scribe line (scribe line) alignment mark of aligned pattern more greatly.
Summary of the invention
Main purpose of the present invention is to provide a kind of mask with two-way aligned pattern, and its aligned pattern is staggered by several horizontal pattern groups and several vertical pattern groups and forms.
Another object of the present invention, be to provide a kind of mask with two-way aligned pattern, when being calibrated, exposure machine can obtain one group of vector potential in the single aligned pattern of detecting, solve in the common technology when using two-way aligned pattern, need carry out the shortcoming that twice detecting could obtain one group of svm message.
A further object of the present invention is to provide a kind of mask with two-way aligned pattern, and it is reached and significantly dwindles the purpose that aligned pattern occupies the space of chip scribe line.
Another purpose of the present invention, be to provide a kind of mask with two-way aligned pattern, but reach the purpose of calibration its within a short period of time, need carry out the amount of alignment measured value of the aligned pattern of directions X scanning vertical direction earlier to shorten common calibration measurement, carry out the tediously long alignment time of Y scanning direction horizontal direction aligned pattern again with the amount of alignment measured value of acquisition directions X with acquisition Y direction.
Another purpose of the present invention be to provide a kind of mask with two-way aligned pattern, but it can improve the usage space of alignment mark on the chip scribe line.
For reaching above-mentioned purpose, the invention provides a kind of mask with two-way aligned pattern, it includes a layout patterns district, and an external print district that is positioned at periphery, layout patterns district, wherein have the two-way aligned pattern that several are staggered and are formed by several horizontal pattern groups and several vertical pattern groups in the external print district.
The invention has the beneficial effects as follows: by two-way aligned pattern, not only overcome and carry out usually dually need carrying out the shortcoming that twice detecting could obtain one group of svm message, and dwindled the space of occupied chip scribe line (scribe line) alignment mark of aligned pattern greatly punctual transducer.
Description of drawings
Fig. 1 is for having the aligned pattern kenel of the mask of two-way alignment mark usually.
Fig. 2 is the schematic diagram of a preferred embodiment of the present invention.
Label declaration:
10 aligned pattern
12 aligned pattern
14 rectangle masks
16 layout patterns districts
18 external print districts
20 two-way aligned pattern
22 vertical pattern groups
24 horizontal pattern groups
26 two-way aligned pattern
28 two-way aligned pattern
30 two-way aligned pattern
Embodiment
Further specify architectural feature of the present invention and beneficial effect thereof below in conjunction with drawings and Examples.
At this; for more clearly explaining technical characterictic of the present invention; have vertical pattern group and the staggered two-way aligned pattern of horizontal pattern group with two; and single vertical pattern group is made of three vertical bars side by side; the horizontal pattern group is made of six horizontal lines arranged side by side illustrates the present invention; usually the due cognition of personage in this field is that many steps can change; number as vertical pattern group and horizontal pattern group; staggered pattern; vertical bar numbers in the single vertical pattern group etc., these general replacements are all within protection scope of the present invention.
Fig. 2 is a preferred embodiment of the present invention, and it has the mask schematic diagram of two-way aligned pattern.
Include the external print district 18 that a layout patterns district 16 and is positioned at periphery, layout patterns district in the rectangle mask 14 as shown in Figure 2, and the two-way aligned pattern 20 and 26 of the horizontal direction of pattern area 18 zone and mutual oblique correspondence externally, system is staggered by two vertical pattern groups 22 and a horizontal pattern group 24 and forms, wherein single vertical pattern group 22 is made of three vertical bars side by side, and horizontal pattern group 24 is made of six horizontal lines arranged side by side, and externally the vertical direction of pattern area 18 zone and the two-way aligned pattern 28 of mutual oblique correspondence and 30 bargraphs are the aspect that is behind aligned pattern 20 half-twists, but two-way aligned pattern 20,26,28 and 30 configuration and quantity all can increase and decrease as required, are not limited to shown in this figure.
When carrying out the exposure of little shadow, at first carrying out light source condition (recipe) sets, as the intensity of light source, focusing, image contrast etc., (wafer) inserts in the exposure sources with chip, then, carry out Primary Location, just transducer can be searched the platband position in the chip earlier, carries out big regional chip aligning and crystal grain again and aims at two actions such as (wafer die alignment).
At this moment, when carrying out on time, transducer (sensor) can pass through the two-way aligned pattern 20 of sensing, 26, an arbitrary two-way aligned pattern in 28 and 30, just can obtain the amount of alignment measured value of directions X and Y direction simultaneously, and convert as computer by central authorities' processing, obtain accurate chip and diapason parameter simultaneously, and when having broken away from the common aligned pattern of using as shown in Figure 1, transducer need carry out directions X scanning earlier to obtain the amount of alignment measured value of Y direction, carry out the Y scanning direction again to obtain the amount of alignment measured value of directions X, calibrate conversion again, could obtain the shortcoming of one group of vector, with the defective that causes production capacity to reduce, and two-way aligned pattern of the present invention has been saved traditional double greatly to the occupied chip scribe line of aligned pattern alignment mark space.

Claims (4)

1. mask with two-way aligned pattern is characterized in that including:
One layout patterns district, and
Be positioned at an external print district of periphery, described layout patterns district, and have the two-way aligned pattern of several symmetries in the described external print district, and described two-way aligned pattern is staggered by several horizontal pattern groups and several vertical pattern groups and forms.
2. the mask with two-way aligned pattern according to claim 1 is characterized in that: described two-way aligned pattern is arranged by the staggered pattern of two vertical pattern group double team one horizontal pattern groups and is formed.
3. the mask with two-way aligned pattern according to claim 1 is characterized in that: when described mask be shaped as rectangle the time, described two-way aligned pattern system lays respectively on four limits in external print district.
4. the mask with two-way aligned pattern according to claim 1 is characterized in that: when carrying out on time, transducer can obtain one group of vector information by detecting described two-way aligned pattern.
CNB2004100174052A 2004-04-01 2004-04-01 Mask with two-way alignment pattern Expired - Fee Related CN1333437C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2004100174052A CN1333437C (en) 2004-04-01 2004-04-01 Mask with two-way alignment pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2004100174052A CN1333437C (en) 2004-04-01 2004-04-01 Mask with two-way alignment pattern

Publications (2)

Publication Number Publication Date
CN1677616A CN1677616A (en) 2005-10-05
CN1333437C true CN1333437C (en) 2007-08-22

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102096328B (en) 2010-12-03 2012-11-21 深圳市华星光电技术有限公司 Exposure procedure of liquid crystal panels and mask
CN103547102B (en) * 2013-09-25 2016-08-17 业成光电(深圳)有限公司 Cover plate and preparation method thereof
CN105867066B (en) * 2016-06-27 2021-01-22 京东方科技集团股份有限公司 Mask plate, manufacturing method of display substrate, display substrate and display device
CN108681623A (en) * 2018-04-11 2018-10-19 上海华虹宏力半导体制造有限公司 The method for placing scribe line figure
CN113433791B (en) * 2020-03-23 2023-03-31 长鑫存储技术有限公司 Mask plate

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6172409B1 (en) * 1997-06-27 2001-01-09 Cypress Semiconductor Corp. Buffer grated structure for metrology mark and method for making the same
US6342426B1 (en) * 2001-02-08 2002-01-29 Mosel Vitelic Inc. Method for protecting stepper alignment marks
JP2002328461A (en) * 2001-05-02 2002-11-15 Seiko Epson Corp Mask and exposure method by using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6172409B1 (en) * 1997-06-27 2001-01-09 Cypress Semiconductor Corp. Buffer grated structure for metrology mark and method for making the same
US6342426B1 (en) * 2001-02-08 2002-01-29 Mosel Vitelic Inc. Method for protecting stepper alignment marks
JP2002328461A (en) * 2001-05-02 2002-11-15 Seiko Epson Corp Mask and exposure method by using the same

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CN1677616A (en) 2005-10-05

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