CN118091374A - Chip testing method and device - Google Patents

Chip testing method and device Download PDF

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Publication number
CN118091374A
CN118091374A CN202410477576.0A CN202410477576A CN118091374A CN 118091374 A CN118091374 A CN 118091374A CN 202410477576 A CN202410477576 A CN 202410477576A CN 118091374 A CN118091374 A CN 118091374A
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China
Prior art keywords
chip
interface
pushing
testing
block
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CN202410477576.0A
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CN118091374B (en
Inventor
李金钵
郭艳飞
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Boson Microelectronics Tianjin Co ltd
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Boson Microelectronics Tianjin Co ltd
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Priority to CN202410477576.0A priority Critical patent/CN118091374B/en
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Abstract

The invention relates to the technical field of chip testing and provides a chip testing method and a chip testing device.

Description

Chip testing method and device
Technical Field
The invention relates to the technical field of chip testing, in particular to a chip testing method and a chip testing device.
Background
The chip of the mobile terminal generally comprises a central processing unit (English: central Processing Unit; CPU for short) and a graphic processing unit (English: graphics Processing Unit; GPU for short) and the like, and is used for realizing various functions of the mobile terminal.
The application number is as follows: CN201710722024.1 is a chip testing device and a chip testing method, and belongs to the technical field of electronics. The chip testing device comprises a chip fixing groove and a main board placing groove; a chip test interface is arranged in the chip fixing groove; the mainboard placing groove is provided with a test interface and a mainboard interface, one end of the test interface can be connected with an input/output interface of a mainboard placed in the mainboard placing groove, and the other end of the test interface is used for transmitting data with the input/output interface of the mainboard. According to the chip testing device, the chip fixing groove, the main board placing groove and the testing interface connected with the input and output interfaces on the main board are arranged in the chip testing device, when the chip is tested through the chip testing device, the chip is placed in the chip fixing groove, and after the main board corresponding to the chip is placed in the main board placing groove, whether the chip is good or not can be tested through the testing interface.
However, when testing for batch chips, the test cannot be performed simultaneously, and each test set needs to wait for a certain test time before the next set of chip tests, resulting in lower efficiency.
Disclosure of Invention
In order to solve the problem that when testing is conducted on batch chips, the chips cannot be tested at the same time, and each group of chips can be tested after waiting for a certain test time, so that the efficiency is low, the invention provides a chip testing method and a chip testing device, and aims to solve the problem.
In order to achieve the above purpose, the present invention provides the following technical solutions:
a chip testing apparatus, comprising: the box body, be provided with a plurality of standing grooves in the box body, be provided with chip test interface in the standing groove, chip test interface bottom activity is provided with the chip and releases the subassembly, and chip test interface one side is provided with the recovery storehouse of installing on the box body, and chip test interface opposite side is provided with the pilot lamp, the box body is inside to be provided with the control mainboard, the control mainboard is connected with chip test interface, chip release the subassembly and pilot lamp electricity.
Preferably, the case includes: the box cover is arranged on the upper side of the box seat, the placing groove is formed in the box cover, the chip pushing-out assembly is arranged in the box seat, and the control main board is arranged on one side of the chip pushing-out assembly.
Preferably, the chip test interface includes: the chip test main body is fixedly arranged on the interface groove body, the chip test main body is electrically connected with the control main board, the chip test main body is used for testing the chip, and the interface groove body is matched and connected with the chip pushing-out assembly.
Preferably, the chip pushing assembly includes: push pedal, chip deviate from direction subassembly, direction kicking block, roof, pen-type electric putter, guide bar and mounting plate, the push pedal slides and sets up in the interface cell body, and the push pedal lower extreme is connected with the roof, and the chip deviate from between direction subassembly activity setting interface cell body and the direction kicking block, and the direction kicking block sets up on the box lid, and the chip deviate from direction subassembly lower extreme and roof connection, and pen-type electric putter output is connected with the roof, pen-type electric putter lower extreme and mounting plate fixed connection, roof and mounting plate pass through guide bar swing joint.
Preferably, the chip ejection guide assembly includes: connecting rod, slide, spacing slide and wedge, connecting rod upper end and slide fixed connection, connecting rod lower extreme and roof fixed connection, slide and spacing slide downside sliding fit connection, spacing slide upside and wedge fixed connection, the wedge slides and sets up between interface cell body and direction kicking block, and wedge upper portion is used for pushing away the chip of taking off to retrieving the storehouse.
Preferably, a reset button is further arranged on one side of the indicator lamp, and the reset button is electrically connected with the control main board and controls the chip pushing-out assembly to reset.
Preferably, the control main board includes: the chip interface module is electrically connected with the chip test interface, the chip test module is used for testing a chip, the driving module is electrically connected with the chip pushing-out assembly, and the indicator lamp control module is electrically connected with the indicator lamp.
Preferably, the wedge block comprises a vertical upper part and an inclined lower part, wherein the vertical upper part is arranged between the interface groove body and the guide top block in a sliding manner when the wedge block is at an initial position, the guide top block is contacted with the inclined lower part when the wedge block moves upwards by half, and the inclined lower part is in sliding fit with the interface groove body and the guide top block when the wedge block moves continuously.
Preferably, the recycling bin is in sliding connection with the box body through a limiting slide block, the limiting slide block is fixedly arranged on the box body, and a sliding groove in sliding fit with the recycling bin is formed in the inner side of the limiting slide block.
A chip testing device, its testing method includes the following steps:
S1: sequentially placing the chips to be tested into the interface groove body;
S2: the chip testing main body detects the chip to be tested;
s3: detecting qualified chips, lighting green lights corresponding to the indicator lights, and pushing the chips into a recycling bin through a chip pushing-out assembly to complete recycling;
s4: and detecting unqualified chips, lighting red lights corresponding to the indicator lights, recovering half of the chips from the interface groove body by workers after the chips are pushed out of the interface groove body by the chip pushing-out assembly, and clicking a reset button after recovering the chips to reset the chip pushing-out assembly.
The invention has the advantages that: according to the invention, the tested chips can be sequentially inserted into the chip test interfaces for testing by arranging the plurality of chip test interfaces, so that the test efficiency is improved, the tested chips which have finished testing and are qualified in test can be pushed to the recovery bin from the chip test interfaces by arranging the chip pushing-out assembly, the collection is convenient, the labor is saved, the qualified and unqualified tested chips are conveniently indicated by arranging the indicator lamp, and the classified collection of staff is convenient.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention. In the drawings:
FIG. 1 is a schematic diagram of the structure of the present invention;
FIG. 2 is a schematic diagram of a chip test interface and chip ejection assembly according to the present invention;
FIG. 3 is a schematic view of the structure of the case of the present invention;
FIG. 4 is a side view of a chip ejection assembly of the present invention;
FIG. 5 is a side view of the chip ejection guide assembly of the present invention;
FIG. 6 is a side view of a wedge block of the present invention;
FIG. 7 is a schematic view of the structure of the limit slider of the present invention;
FIG. 8 is a schematic diagram of the control motherboard of the present invention;
FIG. 9 is a flow chart of a method of testing a chip of the present invention;
FIG. 10 is a schematic view of the structure of the interface tank of the present invention;
FIG. 11 is a schematic diagram of a chip test body according to the present invention.
Reference numerals illustrate:
1. a case body; 2. a chip test interface; 3. a chip pushing-out assembly; 4. a recycling bin; 5. an indicator light; 11. a box cover; 12. a box base; 21. a chip test body; 22. an interface groove body; 31. a push plate; 32. a chip release guide assembly; 33. a guide ejector block; 34. a top plate; 35. pen type electric push rod; 36. a guide rod; 37. a mounting base plate; 321. a connecting rod; 322. a slide plate; 323. a limit sliding seat; 324. wedge blocks; 3241. a vertical upper portion; 3242. a sloped lower portion; 41. a limit sliding block; 411. and a sliding groove.
Detailed Description
Embodiment one, described with reference to fig. 1, 2 and 8:
A chip testing apparatus, comprising: the box body 1, be provided with four standing grooves in the box body 1, be provided with chip test interface 2 in the standing groove, chip test interface 2 and standing groove fixed connection, chip test interface 2 is used for inserting the chip that is tested, chip test interface 2 bottom activity is provided with chip and releases subassembly 3, chip release subassembly 3 can release the chip that is tested of putting into in the chip test interface 2, chip test interface 2 one side is provided with the recovery storehouse 4 of installing on box body 1, recovery storehouse 4 is used for the collection of the chip that is released, use manpower sparingly, chip test interface 2 opposite side is provided with pilot lamp 5, pilot lamp 5 is used for the instruction of being tested chip test result, the inside control mainboard that is provided with of box body 1, control mainboard is used for controlling the motion of chip release subassembly 3, the bright and the test of being tested chip of pilot lamp 5 with chip test interface 2, chip release subassembly 3 and pilot lamp 5.
The pilot lamp 5 one side still is provided with reset button, reset button is connected with control mainboard electricity and control chip release subassembly 3 resets, so sets up, under the unqualified circumstances of being surveyed the chip detection, control mainboard drive chip release subassembly 3 releases the standing groove with the upper half of being surveyed the chip, pilot lamp 5 lights the red light, takes out unqualified measured chip after the staff discerns and puts into unqualified district, then the staff presses reset button, makes chip release subassembly 3 reset to follow-up other measured chips detect.
The control main board comprises: chip interface module, chip test module, drive module, pilot lamp control module, power module, chip interface module is connected with chip test interface 2 electricity, and chip interface module plays the effect of connecting chip test interface 2 and control mainboard, and chip test module is used for testing the chip, and chip test module is prior art, and not described in detail here again, drive module is connected with chip release subassembly 3 electricity, and pilot lamp control module is connected with pilot lamp 5 electricity, and power module provides the electric energy, and drive module can drive chip release subassembly 3 motion, and pilot lamp control module is used for controlling pilot lamp 5.
Embodiment two, based on embodiment one, will be described with reference to fig. 3:
The case 1 includes: lid 11 and box seat 12, lid 11 sets up in box seat 12 upside, and lid 11 passes through screwed connection with box seat 12, the standing groove sets up on lid 11, and the standing groove is provided with four sets of, and chip release subassembly 3 fixed mounting is in box seat 12, control mainboard sets up in chip release subassembly 3 one side, and the control mainboard passes through the screw and installs in box seat 12. So set up, be convenient for dismouting and maintenance.
Embodiment III, based on embodiment II, is described with reference to FIG. 4:
the chip test interface 2 includes: the chip test main body 21 and the interface groove body 22, the chip test main body 21 is fixedly arranged on the interface groove body 22 through welding, the chip test main body 21 is electrically connected with the control main board, the chip test main body 21 is used for testing chips, and the interface groove body 22 is matched and connected with the chip pushing-out assembly 3.
The chip pushing-out assembly 3 includes: push pedal 31, chip deviate from direction subassembly 32, direction kicking block 33, roof 34, pen-type electric putter 35, guide bar 36 and mounting plate 37, push pedal 31 slides and sets up in interface cell body 22, and push pedal 31 lower extreme is connected with roof 34, can drive push pedal 31 upward movement along interface cell body 22 when roof 34 upward movement, and then release the chip that is surveyed.
The chip is deviate from between guide assembly 32 activity setting interface cell body 22 and the direction kicking block 33, and the direction kicking block 33 sets up on lid 11, and when the chip deviate from guide assembly 32 upward movement, the direction kicking block 33 can make the chip deviate from guide assembly 32 upward movement in the time, to the chip direction motion of being surveyed, and then pushes the chip of being surveyed into and retrieve in the storehouse 4, uses manpower sparingly.
The lower extreme that the chip deviate from the guide assembly 32 is connected with roof 34, and pen-type electric putter 35 output is connected with roof 34, and pen-type electric putter 35 lower extreme and mounting plate 37 fixed connection drive roof 34 motion when pen-type electric putter 35 starts, and roof 34 drives the chip simultaneously and deviate from guide assembly 32 and push pedal 31 upward movement.
The top plate 34 is movably connected with the mounting bottom plate 37 through a guide rod 36. When the pen-type electric push rod 35 is used, the pen-type electric push rod 35 is started to drive the top plate 34 to move upwards, the top plate 34 is guided by the guide assembly 32, the guide assembly 32 is a guide pillar, and the pen-type electric push rod 35 is adopted, so that the installation space can be effectively saved.
Embodiment four, based on embodiment three, is described with reference to fig. 5:
the chip ejection guide assembly 32 includes: the upper end of the connecting rod 321 is fixedly connected with the sliding plate 322, the lower end of the connecting rod 321 is fixedly connected with the top plate 34, the sliding plate 322 is connected with the lower side of the limiting sliding seat 323 in a sliding fit manner, the upper side of the limiting sliding seat 323 is fixedly connected with the wedge block 324, the wedge block 324 is arranged between the interface groove body 22 and the guide top block 33 in a sliding manner, and the upper portion of the wedge block 324 is used for pushing the separated chips to the recovery bin 4. So set up, wedge 324 can push away the chip that is surveyed to retrieve storehouse 4 one side, will be all surveyed the chip later and retrieve from retrieving storehouse 4, and then when testing the chip in batches, use manpower sparingly.
Embodiment five, based on embodiment four, will be described with reference to fig. 6:
The wedge block 324 includes a vertical upper portion 3241 and an inclined lower portion 3242, wherein the wedge block 324 is slidably disposed between the interface slot 22 and the guide top block 33 at an initial position, the guide top block 33 contacts the inclined lower portion 3242 when the wedge block 324 moves upward half way, and the inclined lower portion 3242 slidably engages between the interface slot 22 and the guide top block 33 when the wedge block 324 continues to move.
Embodiment six, based on embodiment five, is described with reference to fig. 7:
The recycling bin 4 is in sliding connection with the box body 1 through a limiting slide block 41, the limiting slide block 41 is fixedly arranged on the box body 1 through a screw, and a sliding groove 411 in sliding fit with the recycling bin 4 is formed in the inner side of the limiting slide block 41. So set up, the staff can be through spacing slider 41 installation and dismantlement retrieve storehouse 4, facilitate the use.
The working principle of the invention is as follows: a chip testing apparatus is described with reference to fig. 9, and the testing method thereof includes the steps of: s1: sequentially placing the chips to be tested into the interface groove body 22; s2: the chip testing body 21 detects a chip to be tested; s3: the qualified chips are detected, green lights are lightened corresponding to the indicator lamps 5, and the chips are pushed into the recycling bin 4 through the chip pushing-out assembly 3 to be recycled; s4: and detecting unqualified chips, lighting red light corresponding to the indicator light 5, recovering half of the chips from the interface groove body 22 by workers by the chip pushing assembly 3, clicking a reset button to reset the chip pushing assembly 3 after recovering, and then carrying out batch test on the chips of the next group. The invention has reasonable structure and convenient use, and the tested chips can be sequentially inserted into the chip test interfaces 2 for testing by arranging a plurality of chip test interfaces 2, so that the chip test efficiency is improved, the chips subjected to classification collection and test are conveniently tested in batches, and the manpower is saved.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof; the present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the invention, but any minor modifications, equivalents, and improvements made to the above embodiments according to the technical principles of the present invention should be included in the scope of the technical solutions of the present invention.

Claims (7)

1. A chip testing apparatus, comprising: the device comprises a box body (1), wherein a plurality of placing grooves are formed in the box body (1), a chip test interface (2) is arranged in the placing grooves, a chip pushing-out assembly (3) is movably arranged at the bottom of the chip test interface (2), a recovery bin (4) arranged on the box body (1) is arranged on one side of the chip test interface (2), an indicator lamp (5) is arranged on the other side of the chip test interface (2), a control main board is arranged in the box body (1), and the control main board is electrically connected with the chip test interface (2), the chip pushing-out assembly (3) and the indicator lamp (5); the case (1) includes: the device comprises a box cover (11) and a box seat (12), wherein the box cover (11) is arranged on the upper side of the box seat (12), the placing groove is formed in the box cover (11), the chip pushing-out component (3) is arranged in the box seat (12), and the control main board is arranged on one side of the chip pushing-out component (3); the chip test interface (2) comprises: the chip testing device comprises a chip testing main body (21) and an interface groove body (22), wherein the chip testing main body (21) is fixedly arranged on the interface groove body (22), the chip testing main body (21) is electrically connected with the control main board, the chip testing main body (21) is used for testing a chip, and the interface groove body (22) is connected with the chip pushing-out assembly (3) in a matched mode; the chip pushing-out assembly (3) includes: push pedal (31), chip deviate from direction subassembly (32), direction kicking block (33), roof (34), pen-type electric putter (35), guide bar (36) and mounting plate (37), push pedal (31) slip sets up in interface cell body (22), push pedal (31) lower extreme is connected with roof (34), chip deviate from between direction subassembly (32) activity setting interface cell body (22) and direction kicking block (33), direction kicking block (33) set up on lid (11), chip deviate from direction subassembly (32) lower extreme and roof (34) are connected, pen-type electric putter (35) output is connected with roof (34), pen-type electric putter (35) lower extreme and mounting plate (37) fixed connection, roof (34) and mounting plate (37) pass through guide bar (36) swing joint.
2. A chip testing apparatus according to claim 1, wherein the chip ejection guide assembly (32) comprises: connecting rod (321), slide (322), spacing slide (323) and wedge (324), connecting rod (321) upper end and slide (322) fixed connection, connecting rod (321) lower extreme and roof (34) fixed connection, slide (322) are connected with spacing slide (323) downside sliding fit, spacing slide (323) upside and wedge (324) fixed connection, wedge (324) slip sets up between interface cell body (22) and direction kicking block (33), wedge (324) upper portion is used for pushing the chip of taking off to retrieve storehouse (4).
3. The chip testing device according to claim 1, wherein a reset button is further provided on one side of the indicator lamp (5), and the reset button is electrically connected to the control main board and controls the chip pushing assembly (3) to reset.
4. The chip testing apparatus according to claim 1, wherein the control main board comprises: the chip interface module is electrically connected with the chip test interface (2), the chip test module is used for testing a chip, the driving module is electrically connected with the chip pushing-out assembly (3), and the indicator lamp control module is electrically connected with the indicator lamp (5).
5. The chip testing apparatus according to claim 2, wherein the wedge block (324) includes a vertical upper portion (3241) and an inclined lower portion (3242), the wedge block (324) is slidably disposed between the interface slot body (22) and the guide top block (33) when in the initial position, the guide top block (33) is in contact with the inclined lower portion (3242) when the wedge block (324) moves upward by half, and the inclined lower portion (3242) is slidably engaged with the interface slot body (22) and the guide top block (33) when the wedge block (324) continues to move.
6. The chip testing device according to claim 1, wherein the recovery bin (4) is slidably connected with the box body (1) through a limit sliding block (41), the limit sliding block (41) is fixedly installed on the box body (1), and a sliding groove (411) in sliding fit with the recovery bin (4) is arranged on the inner side of the limit sliding block (41).
7. A chip testing apparatus according to any one of claims 1 to 6, wherein the testing method comprises the steps of:
S1: sequentially placing the chips to be tested into the interface groove body (22);
s2: the chip testing main body (21) detects the chip to be tested;
S3: the qualified chips are detected, green lights are lightened corresponding to the indicator lamps (5), and the chips are pushed into the recycling bin (4) through the chip pushing-out assembly (3) to be recycled;
S4: and detecting unqualified chips, lighting red lights corresponding to the indicator lights (5), and recovering half of the chips pushed out of the interface groove body (22) by workers by the chip pushing-out assembly (3), and clicking a reset button to reset the chip pushing-out assembly (3) after recovering.
CN202410477576.0A 2024-04-19 2024-04-19 Chip testing method and device Active CN118091374B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410477576.0A CN118091374B (en) 2024-04-19 2024-04-19 Chip testing method and device

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Application Number Priority Date Filing Date Title
CN202410477576.0A CN118091374B (en) 2024-04-19 2024-04-19 Chip testing method and device

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CN118091374A true CN118091374A (en) 2024-05-28
CN118091374B CN118091374B (en) 2024-07-09

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KR101925831B1 (en) * 2018-03-27 2018-12-06 주식회사 더센 Semiconductor die test device
CN111060810A (en) * 2020-01-08 2020-04-24 张利霞 Semiconductor chip testing method
JP2020094833A (en) * 2018-12-10 2020-06-18 株式会社ディスコ Testing device
CN113295715A (en) * 2021-05-21 2021-08-24 丹东新东方晶体仪器有限公司 Semiconductor-grade monocrystalline silicon crystal bar orientation test system
CN218360726U (en) * 2022-10-20 2023-01-24 昆山迈野电子科技有限公司 Chip testing platform
CN115877175A (en) * 2022-05-27 2023-03-31 昊丰电子科技(苏州)有限公司 Chip testing machine with good detection effect
CN219039288U (en) * 2023-01-30 2023-05-16 陕西芯诚源恒网络科技有限公司 Integrated circuit testing device
CN220231789U (en) * 2023-06-28 2023-12-22 苏州光煜鑫自动化科技有限公司 Multi-module test fixture
CN117741396A (en) * 2023-12-07 2024-03-22 江西信芯半导体有限公司 Testing device for semiconductor chip sealing and testing
CN117849577A (en) * 2023-12-13 2024-04-09 安徽蓝宇信息科技有限公司 Test equipment for integrated circuit

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101925831B1 (en) * 2018-03-27 2018-12-06 주식회사 더센 Semiconductor die test device
JP2020094833A (en) * 2018-12-10 2020-06-18 株式会社ディスコ Testing device
CN111060810A (en) * 2020-01-08 2020-04-24 张利霞 Semiconductor chip testing method
CN113295715A (en) * 2021-05-21 2021-08-24 丹东新东方晶体仪器有限公司 Semiconductor-grade monocrystalline silicon crystal bar orientation test system
CN115877175A (en) * 2022-05-27 2023-03-31 昊丰电子科技(苏州)有限公司 Chip testing machine with good detection effect
CN218360726U (en) * 2022-10-20 2023-01-24 昆山迈野电子科技有限公司 Chip testing platform
CN219039288U (en) * 2023-01-30 2023-05-16 陕西芯诚源恒网络科技有限公司 Integrated circuit testing device
CN220231789U (en) * 2023-06-28 2023-12-22 苏州光煜鑫自动化科技有限公司 Multi-module test fixture
CN117741396A (en) * 2023-12-07 2024-03-22 江西信芯半导体有限公司 Testing device for semiconductor chip sealing and testing
CN117849577A (en) * 2023-12-13 2024-04-09 安徽蓝宇信息科技有限公司 Test equipment for integrated circuit

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