CN117849782A - Frequency offset error control circuit and control method for transponder ranging - Google Patents

Abstract

The invention discloses a frequency deviation error control circuit and method for transponder ranging, which mainly solve the problem of the prior art that the modulation frequency deviation error is increased. The device comprises a transmitting channel, a receiving channel, a frequency synthesis source module, a slope generator loop module and a high mixing module; the frequency synthesis source module outputs in two paths, one path is connected with the slope generator loop module through the first power divider, the frequency divider and the second power divider, and the other path is connected with the high frequency mixing module through the first power divider, the first filter and the frequency multiplier; the slope generator loop module is connected with the high frequency mixing module through the low frequency mixer and the third filter; the high frequency mixing module mixes the signal output by the frequency multiplier with the signal output by the third filter and inputs the mixed signal to the transmitting channel for transmitting; the receiving channel receives the transmitted signal and outputs a constant difference frequency signal for ranging. The invention can reduce the modulation frequency deviation error of the linear frequency modulation signal, improve the frequency stability of the transmitting signal, and can be used for distance measurement based on a linear frequency modulation continuous wave signal transponder.

Description

Frequency offset error control circuit and control method for transponder ranging

Technical Field

The invention belongs to the technical field of radar ranging, and particularly relates to a frequency offset error control circuit and method, which can be used for measuring the distance of a transponder and improving the ranging accuracy of the transponder.

Background

The radar and the transponder form an interrogation response type secondary radar system, the transponder is arranged on the plane, and the radar is positioned on the ground. The radar periodically transmits pulse inquiry signals to the transponder, the transponder receives the inquiry signals, judges and processes the inquiry signals, replies pulse response signals to the radar, meanwhile, the transponder has a altimeter function, can detect the distance between an airplane and the ground, adopts a linear frequency modulation continuous wave signal, the signal waveform is a saw-tooth wave, the frequency modulation bandwidth is B, the signal period is T, a voltage-controlled oscillator of the transponder generates linear frequency modulation continuous wave transmission, the transmission signal is reflected by a target to generate an echo signal with a certain time delay and is received by the transponder, the transponder mixes the echo signal with a replica of the transmission signal, then sequentially carries out filtering, coherent detection and sampling, finally carries out frequency spectrum analysis by adopting a group of narrow-band filters by an FFT method, and frequency information, namely difference frequency f is extracted _b Then according to the light velocity c, the sawtooth wave signal period T and the difference frequency f _b Relation between the four frequency modulation bandwidths B and the target distance R: r= (c×t×f) _b ) 2×b, and obtaining a distance measurement error Δr/r= Δf _b /f _b And + [ delta ] T/T-delta ] B/B. Wherein f _b The error of (2) is related to the number of FFT processing points, and f can be set to be higher as the number of points is larger and the frequency resolution is higher _b The error of (2) is controlled within 0.1%; the high-stability crystal oscillator and the high-speed digital clock are adopted for counting, so that the quantization error of T is small, and the error of T can be controlled within 0.1%; the error of B is related to the stability of the voltage-controlled oscillator, the fluctuation of the frequency of the voltage-controlled oscillator causes the error of modulation frequency deviation, and when the working frequency of the transponder is not higher than the C band, the error of B can be controlled within 1 percent. From the above formula, it is known that the error of B is a primary factor that restricts the improvement of the ranging accuracy of the transponder.

The existing modulation of the voltage-controlled oscillator mainly comprises an analog modulation mode and a digital modulation mode, wherein:

the voltage-controlled oscillator is subjected to analog modulation, as shown in fig. 1, by modulating the output frequency of the voltage-controlled oscillator by using a sawtooth voltage with amplitude changing linearly from low to high, which not only can generate a linear frequency modulation continuous wave signal with a certain bandwidth, but also can cause the linearity of the input sawtooth voltage to be poor when the tuning end of the voltage-controlled oscillator is influenced by the power supply ripple, so that the output frequency of the voltage-controlled oscillator is randomly shifted, the frequency modulation bandwidth B is changed, and the ranging precision of a transponder is influenced. The higher the frequency, the more likely the output frequency of the voltage controlled oscillator is to be randomly shifted, resulting in an increase in the error of the frequency modulation bandwidth B. When the working frequency of the transponder is higher than the C band, the error of the frequency modulation bandwidth B in the full temperature range is more than 1%, and the distance measurement precision of the transponder is reduced.

When the voltage-controlled oscillator adopts a digital modulation mode, the analog sawtooth wave voltage is changed into digital quantity voltage, the output frequency of the voltage-controlled oscillator is controlled by a digital phase-locked loop, the frequency increment step of the digital phase-locked loop is controlled by the digital quantity voltage, and the frequency step and the sampling step are in a linear relation. When the frequency steps are large and the number of the points is small in the fast Fourier transform FFT, the extracted frequency information is inaccurate, and the offset phenomenon can occur, so that the near distance measurement precision cannot meet the use requirement.

Disclosure of Invention

Aiming at the defects of the prior art, the invention provides a frequency deviation error control circuit and a control method for the distance measurement of a transponder, so as to realize the precise control of the modulation frequency deviation of a linear frequency modulation signal and improve the frequency stability of the linear frequency modulation signal, thereby improving the distance measurement precision of the transponder.

The technical idea of the invention is as follows: outputting a point frequency signal with high frequency stability through a frequency integrated source module; the power divider is divided into two paths of output, one path of output is subjected to frequency division and then is mixed with the low-frequency linear frequency modulation signal output by the slope generator loop module to generate a high-frequency linear frequency modulation signal, the high-frequency linear frequency modulation signal is input into the high-frequency mixing module, the other path of output is subjected to frequency multiplication and then is mixed with the high-frequency linear frequency modulation signal in the high-frequency mixing module to generate a higher-frequency linear frequency modulation signal, and the higher-frequency linear frequency modulation signal is transmitted to the antenna through the transmitting channel to be transmitted. The implementation scheme is as follows:

1. a frequency offset error control circuit for transponder ranging, comprising: transmitting channel, receiving channel and frequency modulation source, its characterized in that: the system also comprises a frequency synthesis source module 1, a slope generator loop module 2 and a high mixing module 3;

the frequency synthesis source module 1 outputs in two paths, one path is connected with the slope generator loop module 2 through the first power divider H1, the frequency divider D1 and the second power divider H2, and the second output end of the second power divider H2 is input to the low mixer F1 through the second filter B2; the other path is connected with the high frequency mixing module 3 through a first power divider H1, a first filter B1 and a frequency multiplier J;

the ramp generator loop module 2 is used as a frequency modulation source and is connected with the high frequency mixing module 3 through the low frequency mixer F1 and the third filter B3;

the Gao Hunpin module 3 mixes the signal output by the frequency multiplier J with the signal output by the third filter B3, inputs the mixed signal to the transmitting channel 4, and transmits the mixed signal through the antenna transmitting port; the receiving channel 5 receives the transmitted signal and outputs a constant difference frequency signal for ranging.

Further, the frequency synthesis source module 1 includes: the crystal oscillator E, the second frequency divider D2, the phase discriminator A, the fourth filter B4, the voltage-controlled oscillator C and the third power divider H3; the output end of the crystal oscillator E is connected with the first input end of the phase discriminator A, the output end of the phase discriminator A is connected with the input end of the voltage-controlled oscillator C through the fourth filter B4, the output end of the voltage-controlled oscillator C is divided into two paths of outputs through the third power divider H3, namely, the first path of output enters the input end of the first power divider H1, and the second path of output is fed back to the second input end of the phase discriminator A through the second frequency divider D2 to form a phase-locked loop; when the phase difference between the output signal of the second frequency divider D2 and the output signal of the crystal oscillator E is constant, the phase discriminator A outputs a direct-current voltage signal with a constant value, so that the output frequency of the voltage-controlled oscillator C is locked on the frequency of 11600MHz, and the direct-current voltage signal is input to the input end of the first power divider H1 through the first output end of the third power divider H3.

Further, the ramp generator loop module 2 includes: a digital ramp generating device L, a fifth filter B5 and a sixth filter B6; the fifth filter B5 filters the point frequency signal input by the second power divider H2 and then transmits the point frequency signal to the digital ramp generator L as a reference clock thereof, the ramp generator L generates a 93 MHz-257 MHz low frequency digital linear frequency modulation signal under the control of the drive of the reference clock and an external sawtooth wave digital signal, and the digital linear frequency modulation signal enters the input end of the low frequency mixer F1 after being filtered by the sixth filter B6.

Further, the high frequency conversion module 3 includes: a seventh filter B7, a first amplifier G1, an eighth filter B8, and a high mixer F2; the seventh filter B7 filters the signal output by the frequency multiplier J and then enters the high frequency mixer F2; the first amplifier G1 amplifies the power of the signal output by the third filter B3, and then filters the signal into the high mixer F2 through the eighth filter B8; gao Hunpin F2 mixes the incoming signals to produce a higher frequency chirp signal of 24018MHz to 24182MHz and transmits it into the transmit channel 4.

Further, the emission channel 4 includes: a ninth filter B9, a second amplifier G2, a tenth filter B10, and a coupler K; the higher-frequency chirped signals output by the high-frequency mixing module 3 sequentially pass through a ninth filter B9, a second amplifier G2, a tenth filter B10 and a coupler K and then are transmitted to an antenna transmitting port for transmission, and a receiving channel 5 receives the higher-frequency chirped signals.

2. The frequency offset error control method for the range finding of the transponder is characterized by comprising the following steps:

using a crystal oscillator as a reference source, enabling a frequency synthesizer source module to generate a 11600MHz stable point frequency signal through a phase-locked loop technology, dividing the frequency synthesizer source module into two paths of branch outputs, inputting one path of frequency-doubled frequency signal to a high frequency mixing module for mixing, and dividing the other path of frequency-doubled frequency signal into two paths of outputs, wherein the first path of frequency-doubled frequency signal is output to a low frequency mixer, and the second path of frequency-doubled frequency signal is output to a slope generator loop module to serve as a reference clock;

under the control of the driving of a reference clock and an external sawtooth wave digital signal, a slope generator loop module generates a low-frequency linear frequency modulation signal with the frequency of 93 MHz-257 MHz and enters a low mixer;

the low mixer mixes the stable point frequency signal and the low-frequency linear frequency modulation signal output by the slope generator loop module to generate a high-frequency linear frequency modulation signal with the frequency of 818 MHz-982 MHz, and the high-frequency linear frequency modulation signal is input to the high-frequency mixing module after being filtered;

the high frequency mixing module mixes the input high frequency linear frequency modulation signal with the frequency-doubled point frequency signal to generate a higher frequency linear frequency modulation signal with the frequency of 24018 MHz-24182 MHz, so as to control the frequency offset error, the higher frequency linear frequency modulation signal is input into a transmitting channel, the transmitting channel transmits the frequency offset error through an antenna transmitting port, the receiving channel receives the transmitting signal, and a constant difference frequency signal is output for ranging.

Compared with the prior art, the invention has the following advantages:

first, the invention uses the crystal oscillation with high frequency stability and low phase noise as the reference source, and the frequency synthesizer source module generates the stable point frequency signal of 11600MHz by the phase-locked loop technology, thereby improving the frequency stability and reducing the phase noise.

Second, the invention adopts digital slope generation technology, uses 725MHz point frequency signal as reference clock, can accelerate the sweep frequency, reduce the frequency increment step, reduce the sampling step length, increase the sampling point number, and improve the frequency stability and linearity.

Thirdly, the invention mixes the dot frequency signal with the linear frequency modulation signal to generate a 24018 MHz-24182 MHz linear frequency modulation signal with higher frequency, thereby further improving the stability of the output frequency, reducing the probability of frequency deviation of the output signal and improving the output frequency of the signal.

Drawings

FIG. 1 is a block diagram of a prior art system for generating a chirp signal;

FIG. 2 is a block diagram of a circuit configuration of the present invention;

FIG. 3 is a block diagram of a frequency synthesis source module according to the present invention;

FIG. 4 is a block diagram of a ramp generator loop module according to the present invention;

FIG. 5 is a block diagram of a high mixing module according to the present invention;

FIG. 6 is a block diagram of a transmit channel configuration in accordance with the present invention;

fig. 7 is an overall construction diagram of the present invention.

Detailed Description

Embodiments of the present invention are described in further detail below with reference to the accompanying drawings.

Referring to fig. 2, the frequency offset error control circuit for ranging a transponder of this example includes: the frequency synthesizer comprises a frequency synthesizer source module 1, a harmonic generator loop module 2, a high mixing module 3, a transmitting channel 4, a receiving channel 5, a frequency multiplier J, a low mixer F1, a frequency divider D1, two power dividers H1 and H2 and three filters B1, B2 and B3. Wherein:

the output of the frequency synthesis source module 1 is connected with the input end of a first power divider H1, the first power divider H1 is provided with two output ends, namely, the first output end is connected with the input end of the high frequency mixing module 3 through a first filter B1 and a frequency multiplier J in sequence, and the second output end is connected with the input end of a second power divider H2 through a first frequency divider D1; the second power divider H2 is also provided with two output ends, namely a first output end is connected with the input end of the low frequency mixer F1 through a second filter B2, and a second output end is connected with the input end of the slope generator loop module 2;

the input of the ramp generator loop module 2 is a sawtooth wave digital signal and a reference clock output by the second power divider H2, the output end of the ramp generator loop module is connected with the input end of the low mixer F1, and the output end of the low mixer F1 is connected with the input end of the Gao Hunpin device module 3 through the third filter B3;

the output end of the high mixing module 3 is connected with an antenna transmitting port through a transmitting channel 4, and a receiving channel 5 receives signals transmitted by the antenna transmitting port and outputs constant difference frequency signals for ranging.

Referring to fig. 3, the frequency synthesis source module 1 includes a crystal oscillator E, a second frequency divider D2, a phase discriminator a, a fourth filter B4, a voltage controlled oscillator C, and a third power divider H3; the output end of the crystal oscillator E is connected with the first input end of the phase discriminator A, the output end of the phase discriminator A is connected with the input end of the voltage-controlled oscillator C through the fourth filter B4, the output end of the voltage-controlled oscillator C is divided into two paths of outputs through the third power divider H3, namely, the first path of output enters the input end of the first power divider H1, and the second path of output is fed back to the second input end of the phase discriminator A through the second frequency divider D2 to form a phase-locked loop; when the phase difference between the output signal of the second frequency divider D2 and the output signal of the crystal oscillator E is constant, the phase discriminator A outputs a direct-current voltage signal with a constant value, so that the output frequency of the voltage-controlled oscillator C is locked on the frequency of 11600MHz, and the direct-current voltage signal is input to the input end of the first power divider H1 through the first output end of the third power divider H3.

Referring to fig. 4, the ramp generator loop module 2 includes: a digital ramp generating device L, a fifth filter B5 and a sixth filter B6; the fifth filter B5 filters the point frequency signal input by the second power divider H2 and then transmits the point frequency signal to the digital ramp generator L as a reference clock thereof, the ramp generator L generates a 93 MHz-257 MHz low frequency digital linear frequency modulation signal under the control of the drive of the reference clock and an external sawtooth wave digital signal, and the digital linear frequency modulation signal enters the input end of the low frequency mixer F1 after being filtered by the sixth filter B6. The digital ramp generating device L is provided with a control register L1, a frequency synthesizer L2 and a D/A converter L3, wherein the input end of the control register L1 is connected with an external sawtooth wave digital signal through a serial port, the external sawtooth wave digital signal comprises three signals of a sawtooth period SPI_CLK, a sawtooth wave amplitude SPI_DATA and a sawtooth wave enabling control SPI_LE, the output end of the control register L1 is sequentially connected with the first input end of the frequency synthesizer L2 and the first input end of the D/A converter L3, and the second input end of the D/A converter L3 is connected with the output end of the fifth filter B5.

Referring to fig. 5, the high frequency conversion module 3 includes: a seventh filter B7, a first amplifier G1, an eighth filter B8, and a high mixer F2; the seventh filter B7 filters the signal output by the frequency multiplier J and then enters the high frequency mixer F2; the first amplifier G1 amplifies the power of the signal output by the third filter B3, and then filters the signal into the high mixer F2 through the eighth filter B8; gao Hunpin F2 mixes the incoming signals to produce a higher frequency chirp signal of 24018MHz to 24182MHz and transmits it into the transmit channel 4.

Referring to fig. 6, the emission channel 4 includes: a ninth filter B9, a second amplifier G2, a tenth filter B10, and a coupler K; the higher-frequency chirped signals output by the high-frequency mixing module 3 sequentially pass through a ninth filter B9, a second amplifier G2, a tenth filter B10 and a coupler K and then are transmitted to an antenna transmitting port for transmission, and a receiving channel 5 receives the higher-frequency chirped signals.

Referring to fig. 7, the method for controlling the frequency offset error by using the circuit principle of the present invention is as follows:

s1, forming a phase-locked loop and outputting a stable point frequency signal:

the voltage-controlled oscillator C outputs different frequencies when different voltages are added to the tuning input end, and the voltage-controlled oscillator C initially inputs V ₁ Voltage, output frequency is f ₁ The method comprises the steps of carrying out a first treatment on the surface of the The output signal of the voltage-controlled oscillator C is divided into two paths of output through a third power divider H3, the first path of output enters the input end of the first power divider H1, the second path of output signal is subjected to frequency division through a second frequency divider D2, and the frequency division coefficient is N ₁ 116, the divided signal and the 100MHz signal output by the crystal oscillator E enter the input end of the phase discriminator a at the same time; the phase discriminator A detects the phase difference of the two paths of signals and outputs a direct-current voltage signal related to the phase difference, and the direct-current voltage signal enters the input end of the voltage-controlled oscillator C after being filtered by the fourth filter B4 so as to control the frequency of the output signal of the voltage-controlled oscillator C; and the frequency and the phase of the output signal of the voltage-controlled oscillator C are fed back to the phase discriminator A through the third power divider H3 and the second frequency divider D2 to form a phase-locked loop.

When the phase difference between the 100MHz signal output by the second frequency divider D2 and the 100MHz signal output by the crystal oscillator E is constant, the phase discriminator a will output a dc voltage signal with a constant value, so that the output frequency of the voltage controlled oscillator C is locked at the point frequency of 116×100 mhz=11600 MHz, and the crystal oscillator E outputs a point frequency signal with high frequency stability and low phase noise when the 100MHz signal is output, and the voltage controlled oscillator C is also enabled to output a point frequency signal with high frequency stability and low phase noise through the phase locked loop.

S2, outputting a frequency stabilization signal in a branching way:

the voltage-controlled oscillator C divides a stable 11600MHz point frequency signal into two paths of output signals through the first power divider H1, wherein the first path of output signals enter the frequency multiplier J after being filtered by the first filter B1, the frequency multiplier J performs frequency doubling output on the input 11600MHz point frequency signal to obtain a 2X 11600MHz = 23200MHz point frequency signal, and the 2X 11600MHz = 23200MHz point frequency signal enters the input end of the high frequency mixer F2 after being filtered by the seventh filter B7;

the second output signal is subjected to frequency division by the first frequency divider D1, and the frequency division coefficient is N ₂ =16, resulting in a divided 11600 MHz/16=725 MHz point frequency signal, and input to the second power divider H2.

S3, splitting output frequency division signals:

the second power divider H2 divides the 725MHz point frequency signal after frequency division into two paths of output, wherein:

the first path of output is filtered by a second filter B2 and enters the input end of a low frequency mixer F1 after being filtered;

the second path is output to the fifth filter B5, and the filtered signal is used as a reference clock signal to enter the input end of the digital ramp generating device L.

S4, generating a stable high-frequency chirp signal:

under the control of the driving of a reference clock and an external sawtooth wave digital signal, the digital slope generating device L generates a stable low-frequency linear frequency modulation signal with the frequency of 93 MHz-257 MHz and enters the input end of the low-frequency mixer F1, and the minimum stepping frequency of the low-frequency linear frequency modulation signal is as follows: reference clock frequency/2 ³² =0.2 Hz, the minimum step time is: 4/reference clock frequency = 5ns;

the low mixer F1 mixes the input 725MHz point frequency signal with the 93 MHz-257 MHz low frequency chirp signal, and outputs a stable high frequency chirp signal with the frequency of 818 MHz-982 MHz.

S5. Gao Hunpin the F2 generates a stable higher frequency chirp signal by mixing:

the 818 MHz-982 MHz high-frequency linear frequency modulation signal sequentially passes through the power amplification of the first amplifier G1 and the filtering of the eighth filter B8 and then enters the input end of the high mixer F2, the high mixer F2 mixes the input 23200MHz point frequency signal with the 818 MHz-982 MHz high-frequency linear frequency modulation signal, and the output 24018 MHz-24182 MHz higher-frequency linear frequency modulation signal enters the transmitting channel.

S6: mixing the transmitting signal with the echo signal to generate a constant difference frequency signal f _b 。

The higher-frequency linear frequency modulation signals of 24018 MHz-24182 MHz are sequentially filtered by a ninth filter B9, amplified by a second amplifier G2 and filtered by a tenth filter B10 in a transmitting channel 4, and then transmitted to an antenna transmitting port through a coupler K to be transmitted;

the transmitted higher frequency chirp signal is reflected by the target to form echo signal and enters the receiving channel 5, and the coupler K in the transmitting channel 4 mixes the coupled transmitting signal with the echo signal to generate constant difference frequency signal f _b 。

S7, calculating a target distance R according to the difference frequency signal and parameters of an external input system:

according to the sawtooth wave initial voltage V of the external input system ₁ Obtaining the corresponding system output initial frequency f _v1 ；

According to the sawtooth wave termination voltage V of the external input system ₂ Obtaining the corresponding system output termination frequency f _v2 ；

According to the initial frequency f of system output _v1 Termination frequency f _v2 Resulting in a frequency modulation bandwidth b=f _v2 -f _v1 ；

According to the difference frequency signal f _b And calculating the frequency modulation bandwidth B to obtain the distance R between the target and the transponder:

R＝(c×T×f _b )÷(2×B)

where c is the speed of light and T is the period of the sawtooth signal.

According to the distance R, the aircraft is guided to land towards the target.

The above description is only one specific example of the invention and does not constitute any limitation of the invention, and it will be apparent to those skilled in the art that various modifications and changes in form and details may be made without departing from the principles, construction of the invention, but these modifications and changes based on the idea of the invention are still within the scope of the claims of the invention.

Claims (6)

1. A frequency offset error control circuit for transponder ranging, comprising: transmitting channel (4), receiving channel (5), its characterized in that: the system also comprises a frequency synthesis source module (1), a slope generator loop module (2) and a high frequency mixing module (3);

the frequency synthesis source module (1) outputs in two paths, one path is connected with the slope generator loop module (2) through the first power divider H1, the frequency divider D1 and the second power divider H2, and the second output end of the second power divider H2 is input to the low mixer F1 through the second filter B2; the other path is connected with a high frequency mixing module (3) through a first power divider H1, a first filter B1 and a frequency multiplier J;

the ramp generator loop module (2) is used as a frequency modulation source and is connected with the high frequency mixing module (3) through the low frequency mixer F1 and the third filter B3;

the Gao Hunpin module (3) mixes the signal output by the frequency multiplier J with the signal output by the third filter B3, inputs the mixed signal to the transmitting channel (4) and transmits the mixed signal through the antenna transmitting port; the receiving channel (5) receives the transmitting signal and outputs a constant difference frequency signal for ranging.

2. The circuit according to claim 1, characterized in that the frequency synthesis source module (1) comprises: the crystal oscillator E, the second frequency divider D2, the phase discriminator A, the fourth filter B4, the voltage-controlled oscillator C and the third power divider H3; the output end of the crystal oscillator E is connected with the first input end of the phase discriminator A, the output end of the phase discriminator A is connected with the input end of the voltage-controlled oscillator C through the fourth filter B4, the output end of the voltage-controlled oscillator C is divided into two paths of outputs through the third power divider H3, namely, the first path of output enters the input end of the first power divider H1, and the second path of output is fed back to the second input end of the phase discriminator A through the second frequency divider D2 to form a phase-locked loop; when the phase difference between the output signal of the second frequency divider D2 and the output signal of the crystal oscillator E is constant, the phase discriminator A outputs a direct-current voltage signal with a constant value, so that the output frequency of the voltage-controlled oscillator C is locked on the frequency of 11600MHz, and the direct-current voltage signal is input to the input end of the first power divider H1 through the first output end of the third power divider H3.

3. The circuit according to claim 1, characterized in that the ramp generator loop module (2) comprises: a digital ramp generating device L, a fifth filter B5 and a sixth filter B6; the fifth filter B5 filters the point frequency signal input by the second power divider H2 and then transmits the point frequency signal to the digital ramp generator L as a reference clock thereof, the ramp generator L generates a 93 MHz-257 MHz low frequency digital linear frequency modulation signal under the control of the drive of the reference clock and an external sawtooth wave digital signal, and the digital linear frequency modulation signal enters the input end of the low frequency mixer F1 after being filtered by the sixth filter B6.

4. The circuit according to claim 1, characterized in that the high frequency conversion module (3) comprises: a seventh filter B7, a first amplifier G1, an eighth filter B8, and a high mixer F2; the seventh filter B7 filters the signal output by the frequency multiplier J and then enters the high frequency mixer F2; the first amplifier G1 amplifies the power of the signal output by the third filter B3, and then filters the signal into the high mixer F2 through the eighth filter B8; gao Hunpin F2 mixes the incoming two signals to produce a higher frequency chirp signal of 24018MHz to 24182MHz and transmits it into the transmit channel (4).

5. The circuit according to claim 1, characterized in that the transmission channel (4) comprises: a ninth filter B9, a second amplifier G2, a tenth filter B10, and a coupler K; the higher-frequency linear frequency modulation signals output by the high-frequency mixing module (3) sequentially pass through a ninth filter B9, a second amplifier G2, a tenth filter B10 and a coupler K and then are transmitted to an antenna transmitting port to be transmitted, and a receiving channel (5) is used for receiving.

6. A method of controlling frequency offset error for transponder ranging using the circuit of claim 1, comprising the steps of:

using a crystal oscillator as a reference source, enabling a frequency synthesizer source module to generate a 11600MHz stable point frequency signal through a phase-locked loop technology, dividing the frequency synthesizer source module into two paths of branch outputs, inputting one path of frequency-doubled frequency signal to a high frequency mixing module for mixing, and dividing the other path of frequency-doubled frequency signal into two paths of outputs, wherein the first path of frequency-doubled frequency signal is output to a low frequency mixer, and the second path of frequency-doubled frequency signal is output to a slope generator loop module to serve as a reference clock;

under the control of the driving of a reference clock and an external sawtooth wave digital signal, a slope generator loop module generates a low-frequency linear frequency modulation signal with the frequency of 93 MHz-257 MHz and enters a low mixer;

the low mixer mixes the stable point frequency signal and the low-frequency linear frequency modulation signal output by the slope generator loop module to generate a high-frequency linear frequency modulation signal with the frequency of 818 MHz-982 MHz, and the high-frequency linear frequency modulation signal is input to the high-frequency mixing module after being filtered;

the high frequency mixing module mixes the input high frequency linear frequency modulation signal with the frequency-doubled point frequency signal to generate a higher frequency linear frequency modulation signal with the frequency of 24018 MHz-24182 MHz, so as to control the frequency offset error, the higher frequency linear frequency modulation signal is input into a transmitting channel, the transmitting channel transmits the frequency offset error through an antenna transmitting port, the receiving channel receives the transmitting signal, and a constant difference frequency signal is output for ranging.