CN1172337C

CN1172337C - Chip type multiple linking electronic device

Info

Publication number: CN1172337C
Application number: CNB011187875A
Authority: CN
Inventors: 竹内宏幸; 应; 大岩直应
Original assignee: Murata Manufacturing Co Ltd
Current assignee: Murata Manufacturing Co Ltd
Priority date: 2000-06-14
Filing date: 2001-06-13
Publication date: 2004-10-20
Anticipated expiration: 2021-06-13
Also published as: JP3765225B2; KR100418602B1; JP2001358034A; KR20010112629A; TW508602B; CN1329342A

Abstract

The multiple electronic chip parts are constituted by incorporating four electric elements, such as capacitors, etc., in an elemental body 10 formed by laminating sheets upon another and arranging the external electrodes 13a and 13b on the surface of the body 10. The widths b of the internally arranged electrodes 13b are made larger than those a of the electrodes 13a at both ends so as to increase the probability that the electrodes 13b come into contact with a conductive medium used at plating. To obtain multiple electronic chip parts which can correct the variation of the plated thicknesses of external electrodes, particularly, can prevent the plated thicknesses of internally arranged external electrodes from being thinner and, in its turn, can eliminate defective mounting of the parts on a board.

Description

Chip type multiple linking electronic device

Technical field

The present invention relates to a kind of chip type multiple linking electronic device, particularly a kind of in the cell cube of ceramic the built-in chip type multiple linking electronic device of electronic components such as a plurality of electric capacity, inductance, resistance.

Background technology

In the past, as shown in Figure 4, internal electrode is set on the cell cube of being made up of laminated shim 1 constitutes (the not expression in Fig. 4 of electronic components such as a plurality of electric capacity, inductance, resistance, but in keep 4 elements), have various on the surface of cell cube 1, formation at certain intervals to conduct electricity the chip type multiple linking electronic devices of the outer electrode 2 that is connected with each element.

Cell cube 1 is that the ceramic sheet lamination by dielectric, magnetic, nonmagnetic material or insulator forms.Outer electrode 2 is by having electroplated coating such as Cu, Ni, Sn on the basalis that has toasted behind the conducting resinl and form having smeared or duplicated.Width a, the b of each electrode 2 are identical.

But, in chip type multiple linking electronic device in the past shown in Figure 4, when forming the coating of outer electrode 2, as shown in Figure 5, conductivity medium 3 such as having formed cell cube 1 behind the basalis and steel ball are put into electroplanting device (not shown) and mix, electroplate by medium 3.

But the diameter of medium 3 is relatively large, therefore, compares with the electrode 2 at two ends, and inboard electrode 2 and the contact between the medium 3 are poorer, and the thickness of coating of inboard electrode 2 is always thinner relatively, the weldability variation of scolding tin, thus cause installing bad problem.Particularly in recent years, along with the miniaturization of electronic circuit, also require electronics miniaturization, setting at interval of outer electrode 2 diminishes.So, for the short circuit that prevents electrode 2, the growth that suppresses electrodeposited coating, tend to suppress electroplating time and current density, make the thickness of coating integral thinned.Under such tendency, the problem of the thickness of coating attenuation of inboard electrode 2 is more remarkable.

Summary of the invention

The object of the present invention is to provide the thickness of coating inequality that can correct outer electrode, particularly can prevent to be provided in the thickness of coating attenuation of inboard outer electrode and to eliminate toward the chip type multiple linking electronic device of the poor installation of substrate.

In order to reach above purpose, the invention is characterized in to possess by the cell cube of forming by laminated shim, be built in the electronic component more than 3 in this cell cube and be connected on this electronic component and be arranged in the chip type multiple linking electronic device of lip-deep outer electrode of said units body, be positioned at the orientation two ends with the inboard on the width of outer electrode wideer than the width of the outer electrode that is positioned at two ends.

Outer electrode forms electrodeposited coating and forms on basalis.When forming this electrodeposited coating, the width that is positioned at inboard outer electrode is wideer than the width of the outer electrode that is positioned at two ends, therefore, outer electrode and the contact probability between the conductivity medium in the inboard increase, thereby almost the contact probability with the outer electrode that is positioned at two ends is identical.Therefore, can prevent to be positioned at thickness of coating irregular of two ends and inboard outer electrode.

Description of drawings

Below accompanying drawing is carried out simple declaration.

Fig. 1 is the stereogram of the outward appearance of the chip type multiple linking capacitor of expression one embodiment of the invention.

Fig. 2 is the stereogram of the state after the thin slice of above-mentioned capacitor is decomposed.

Fig. 3 is the vertical view of the terminal pad of the substrate of the above-mentioned capacitor of expression installation.

Fig. 4 is the stereogram of the outward appearance of expression chip type multiple linking electronic device in the past.

The key diagram of the relation between the medium that Fig. 5 uses when being above-mentioned electronic device of expression and plating.

Among the figure, 10: the cell cube of ceramic, 11: ceramic sheet, 12: internal electrode, 13a, 13b: outer electrode, a, b: electrode width.

Embodiment

Below, the embodiment to chip type multiple linking electronic device related to the present invention describes with reference to accompanying drawing.

Fig. 1 is the stereogram of the outward appearance of the chip type multiple linking capacitor of expression one embodiment of the invention.Also have, Fig. 2 represents its decomposing state.

In Fig. 1,2; on the ceramic sheet of forming by dielectric 11, form the internal electrode 12 of regulation shape; these thin slices 11 and the multi-disc protection that is made of identical materials are up and down cut out each and every one unit of 1 shown in Fig. 1,2 behind overlapping, the dry and sintering with thin slice 11, thus formation chip type multiple linking capacitor.Form 4 array of capacitors by means of overlapping up and down internal electrode 12.

Correspondingly with each capacity cell on the surface of the cell cube 10 that laminated shim 11 forms be formed with 4 couples of outer electrode 13a, 13b.At first, these

outer electrodes

13a, 13b toast after smearing or duplicated conducting resinls such as Ag, Ag-Pd, Cu as basalis, then, and with plating Cu, Ni, Sn etc. such as well-known tumble-plating process and form electrodeposited coating.

Feature in the present embodiment is that the width b that is positioned at inboard outer electrode 13b is set to the width a of being wider than the outer electrode 13a that is positioned at two ends.

Usually, the diameter of the employed conductivity medium of tumble-plating process is also bigger than the interval of outer electrode, always low toward the contact probability that is positioned at inboard outer electrode 13b, but as present embodiment, can bring up to almost and the identical contact probability of outer electrode 13a that is positioned at two ends by widening the width b that is positioned at inboard outer electrode 13b.

Therefore, in the present embodiment, can be under the thickness of coating condition much at one of the thickness of coating that is positioned at inboard electrode 13b and the outer electrode 13a that is positioned at two ends film forming, the problems such as bad connection when installing toward substrate can be eliminated.

Lift an example explanation dimensionally in passing, the size of cell cube 10 is long 2.0mm, wide 1.0mm, high 0.5mm, and the width a of outer electrode 13a is 0.23mm, and the width b of outer electrode 13b is 0.25mm, and electrode gap is 0.5mm.Also have, the diameter of the employed conductivity medium of tumble-plating process is 0.8mm.

On the other hand, as shown in Figure 3, might be formed with the terminal pad 21a corresponding with the electrode 13a at two ends on the substrate 20 that chip type multiple linking electronic device is housed, this terminal pad is bigger than the terminal pad 21b corresponding with the electrode 13b of inboard.Under the situation of using such substrate 20,21a compares with terminal pad, and its soldering tin amount of terminal pad 21b reduces.But in the present embodiment, the width of the outer electrode 13b corresponding with terminal pad 21b is strengthened setting, therefore, can guarantee and terminal pad 21b that soldering tin amount is few between weldability.

Additional embodiments

Also have, the chip type multiple linking electronic device relevant with present embodiment is not limited to the foregoing description, can carry out various changes in the scope of its main idea.

Particularly except above-mentioned capacitor various elements such as inductance and resistance can also be arranged as electronic component, the material of ceramic sheet also can use various materials such as magnetic, insulator according to the kind of element except dielectric.Also have, for outer electrode also can adopt except that the foregoing description illustrated material and method, also can be 3 layers of structure.

By above explanation as can be known, according to the present invention, widened the width of the outer electrode on the inboard that is positioned at except that two ends, therefore, can prevent the coating attenuation of this electrode, and can obtain and be positioned at the almost same thickness of coating of the electrode at two ends, can also eliminate toward problems such as the installation of substrate are bad.Also have, also can guarantee enough weldabilities for the terminal pad that area is little.

Claims

1. chip type multiple linking electronic device, possess by the cell cube of forming by laminated shim, be built in the electronic component more than 3 in this cell cube and be connected on this electronic component and be arranged on the lip-deep outer electrode of said units body, it is characterized in that, be positioned at the orientation two ends with the inboard on the width of outer electrode wideer than the width of the outer electrode that is positioned at two ends.

2. chip type multiple linking electronic device according to claim 1 is characterized in that the said external electrode is made of at basalis that the conducting resinl that forms on the surface of said units body is formed and the electrodeposited coating of being electroplated on this basalis baking.