CN117199209A - Infrared LED chip and manufacturing method thereof - Google Patents
Infrared LED chip and manufacturing method thereof Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 77
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims abstract description 50
- 239000010949 copper Substances 0.000 claims description 38
- 238000005530 etching Methods 0.000 claims description 35
- 239000010408 film Substances 0.000 claims description 35
- 229910052751 metal Inorganic materials 0.000 claims description 28
- 239000002184 metal Substances 0.000 claims description 28
- 230000007704 transition Effects 0.000 claims description 25
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 18
- 239000007787 solid Substances 0.000 claims description 16
- 238000005566 electron beam evaporation Methods 0.000 claims description 15
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 14
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 238000001704 evaporation Methods 0.000 claims description 13
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 12
- 238000001259 photo etching Methods 0.000 claims description 12
- 238000005868 electrolysis reaction Methods 0.000 claims description 11
- 238000009713 electroplating Methods 0.000 claims description 11
- 238000004018 waxing Methods 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 10
- 230000008020 evaporation Effects 0.000 claims description 10
- 238000010438 heat treatment Methods 0.000 claims description 9
- 238000005520 cutting process Methods 0.000 claims description 8
- 230000008569 process Effects 0.000 claims description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 claims description 7
- 229910000365 copper sulfate Inorganic materials 0.000 claims description 7
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 claims description 7
- 238000007747 plating Methods 0.000 claims description 7
- 239000000243 solution Substances 0.000 claims description 7
- 238000000137 annealing Methods 0.000 claims description 6
- 239000002131 composite material Substances 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 5
- 230000000694 effects Effects 0.000 claims description 5
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 5
- 239000011259 mixed solution Substances 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 5
- 238000005406 washing Methods 0.000 claims description 5
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 229910018885 Pt—Au Inorganic materials 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- QAOWNCQODCNURD-UHFFFAOYSA-L Sulfate Chemical compound [O-]S([O-])(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-L 0.000 claims description 3
- 239000010405 anode material Substances 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 3
- 239000008367 deionised water Substances 0.000 claims description 3
- 229910021641 deionized water Inorganic materials 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 claims description 3
- 238000003487 electrochemical reaction Methods 0.000 claims description 3
- 238000002955 isolation Methods 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 230000008018 melting Effects 0.000 claims description 3
- 238000002844 melting Methods 0.000 claims description 3
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 3
- 238000006479 redox reaction Methods 0.000 claims description 3
- 238000006722 reduction reaction Methods 0.000 claims description 3
- 239000002904 solvent Substances 0.000 claims description 3
- 238000000926 separation method Methods 0.000 claims description 2
- 238000002791 soaking Methods 0.000 claims description 2
- 238000012423 maintenance Methods 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 7
- 150000004767 nitrides Chemical class 0.000 description 6
- 238000002310 reflectometry Methods 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 239000002253 acid Substances 0.000 description 4
- 239000003513 alkali Substances 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- QFWPJPIVLCBXFJ-UHFFFAOYSA-N glymidine Chemical compound N1=CC(OCCOC)=CN=C1NS(=O)(=O)C1=CC=CC=C1 QFWPJPIVLCBXFJ-UHFFFAOYSA-N 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- 230000007480 spreading Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- XTLNYNMNUCLWEZ-UHFFFAOYSA-N ethanol;propan-2-one Chemical compound CCO.CC(C)=O XTLNYNMNUCLWEZ-UHFFFAOYSA-N 0.000 description 1
- 238000004880 explosion Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 230000004297 night vision Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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Abstract
The invention relates to an infrared LED chip and a manufacturing method thereof, and belongs to the technical field of LED chips. The LED chip comprises a supporting substrate, an N electrode, an N-AlGaAs ohmic layer, an N-AlGaAs current expansion layer, an N-AlGaAs limiting layer, an MQW light-emitting layer, a P-AlGaAs limiting layer, a P-AlGaAs current expansion layer, a P-GaP ohmic contact layer and a P electrode which are sequentially arranged from bottom to top.
Description
Technical Field
The invention relates to an infrared LED chip and a manufacturing method thereof, and belongs to the technical field of LED chips.
Background
The light emitting diode is used as an electroluminescent light source and has the advantages of low power consumption, high reliability, small volume, long service life, quick response and the like which are incomparable with the traditional light source. In recent years, infrared night vision systems have rapidly developed and are widely used in various fields such as traffic, monitoring and public security. Currently, the infrared LEDs popular in the market mainly have two wavelengths of 850nm and 940 nm. Products with the infrared wavelength of 850nm are dominant in the fields of monitoring and video shooting, the technology is relatively mature, but in some special occasions which are relatively hidden, products with the wavelength of 940nm are dominant.
With increasing demand and better customer experience, higher demands are placed on infrared light sources. The current mainstream infrared LED chip structure has a forward mounting process and a reverse polarity process, the production flow of the forward mounting process is relatively simple, but the GaAs substrate can absorb light emitted to the substrate by the active region, so the luminous efficiency of the LED infrared chip of the conventional GaAs-based forward mounting process is generally lower; meanwhile, the GaAs substrate is poor in electric conduction and heat conduction performance, so that the photoelectric efficiency of the LED can be further reduced, the heat dissipation performance is poor, and the reliability of the application end of the infrared LED is seriously affected.
In order to improve the problems, industry experts and scholars develop a reverse polarity infrared chip with a metal substrate structure, the production process is relatively complex, the production period is longer, the original GaAs substrate is peeled off, and the metal Bonding technology is transferred to the metal substrate, but the current metal Bonding technology has high technological requirements and needs special wafer Bonding equipment to finish, and the abnormal rates of explosion points, layering and falling off are higher, so that the infrared LED chip has low yield, low luminous efficiency and high production cost, and the industrialization of the infrared LED is severely restricted.
Chinese patent document CN104576862B discloses a copper substrate based nitride LED vertical chip and a method for manufacturing the same, comprising an n-type electrode, a two-dimensional derivative film attached to the n-type electrode, a nitride epitaxial layer attached to the two-dimensional derivative film, and a p-type electrode attached to the nitride epitaxial layer. After the nitride LED epitaxial wafer based on the copper substrate is prepared, a perforation process is used for perforating the rear surface of the copper substrate to a buffer layer or an n-type electron injection layer; manufacturing a metal channel structure to realize ohmic contact with the n-type electron injection layer and simultaneously realize conduction between the n-type electron injection layer and the copper substrate; and manufacturing a p-type electrode on top of the p-type hole injection layer. The copper substrate provided by the preparation method during epitaxial growth of the nitride LED is limited in the field of nitride LEDs, cannot be applied to the field of infrared GaAs, and has the technical problems of lattice mismatch, overlarge dislocation defects and the like.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the infrared LED chip, which adopts a brand new technology based on electron beam evaporation and electroplated metal copper substrate, overcomes the disadvantages of the conventional Bonding technology, increases the reflection of one side light towards the substrate, improves the luminous efficiency of the infrared LED chip by more than 5%, improves the Bonding yield by more than 20% and improves the reliability by more than 10%, and solves the technical problems of low luminous efficiency, low wafer Bonding yield and poor reliability in the current manufacture of the infrared LED chip. While the reflectivity of the metal substrate (such as a silicon substrate and a Cu substrate) used for conventional bonding is relatively low, the reflectivity of the metal of the first layer of the N electrode on the support substrate is higher by using Au, so that the reflection of the side light emitted to the substrate can be increased.
The invention also provides a manufacturing method of the infrared LED chip.
The technical scheme of the invention is as follows:
an infrared LED chip comprises a supporting substrate, an N electrode, an N-AlGaAs ohmic layer, an N-AlGaAs current expansion layer, an N-AlGaAs limiting layer, an MQW light-emitting layer, a P-AlGaAs limiting layer, a P-AlGaAs current expansion layer, a P-GaP ohmic contact layer and a P electrode which are sequentially arranged from bottom to top,
the P-GaP ohmic contact layer is provided with a light window layer, the light window layer and the P-GaP ohmic contact layer are provided with ITO films on conductive holes, the N electrode comprises six layers, specifically an Au layer, a Ni layer, an Au layer, a Ge layer, an Au layer and a Cu layer which are sequentially connected from top to bottom, the light window layer and the P-GaP ohmic contact layer are deposited in an electron beam evaporation mode, the supporting substrate is metal Cu, and the N electrode is prepared in an electroplating mode.
The manufacturing method of the infrared LED chip comprises the following steps:
(1) Sequentially growing a GaInP cut-off layer, an N-AlGaAs ohmic layer, an N-AlGaAs current expansion layer, an N-AlGaAs limiting layer, an MQW light-emitting layer, a P-AlGaAs limiting layer, a P-AlGaAs current expansion layer, a P-GaP expansion layer and a P-GaP ohmic contact layer on a GaAs temporary substrate by adopting an MOCVD method to obtain an epitaxial wafer;
(2) Manufacturing a coarsening pattern of a light-emitting area on the P-GaP ohmic contact layer by adopting a photoetching process, coarsening the light-emitting area to obtain a P-GaP light window layer, and greatly reducing the total emission phenomenon of emergent light of the coarsened P-GaP light window layer so as to improve the light-emitting efficiency;
(3) Photoetching a conductive hole pattern on the P-GaP ohmic contact layer, and carrying out etching treatment to obtain a conductive hole;
(4) Depositing an ITO film on the whole surface of the P-GaP light window layer and the conducting holes;
(5) Photoetching a P electrode pad pattern on the conductive hole in the step (4), evaporating a P electrode pad, stripping and cleaning to finish P electrode manufacturing, and performing rapid annealing treatment;
(6) Forming a cutting path pattern by using the wafer photoetching mask obtained in the step (5), and performing etching treatment to form isolation of the P-face die;
(7) Uniformly coating a layer of solid wax on a transition substrate, and attaching the transition substrate to the P surface of the epitaxial wafer through the solid wax to perform temporary bonding treatment;
(8) Removing the GaAs temporary substrate and the GaInP cut-off layer to obtain an epitaxial wafer with the surface exposed with the N-AlGaAs ohmic layer;
(9) Depositing N electrode metal on the surface of the N-AlGaAs ohmic layer by utilizing an electron beam evaporation deposition mode to form an N electrode;
(10) Electroplating a layer of metal substrate on the N electrode to finish the manufacture of the composite metal support substrate, thereby obtaining a wafer;
(11) Stripping the transition substrate of the wafer obtained in the step (10);
(12) And (3) cutting, testing, sorting and checking the wafer in the step (11) to obtain the infrared LED chip.
According to the invention, in the step (1), the N-AlGaAs ohmic layer has an AlxGa (1-X) As structure, wherein 0.1 < X < 0.4 and the thickness is 1.5-3um;
according to the invention, in the step (2), the coarsening pattern of the luminous area is a fancy coarsening pattern, the fancy coarsening pattern is named because the fancy coarsening pattern is similar to petals in shape, and the mixed solution of iodic acid, sulfuric acid, hydrofluoric acid and water is adopted for coarsening at normal temperature;
according to the invention, in the step (3), the conductive hole pattern is obtained by dry etching or wet etching, the dry etching is performed by ICP, and the wet etching is performed by HBr and H 2 Etching the O mixed solution, wherein the concentration of HBr is 4% -8%, and the etching depth is more than or equal to the thickness of the P-GaP ohmic contact layer;
according to the present invention, in the step (4), the thickness of the ITO film is adjusted according to the wavelength of the chip, and the formula of the thickness of the ITO film is d=m (1λ/4 n), d: ITO film target thickness, m: odd, λ: wavelength of chip, n: refractive index of the ITO thin film.
According to the preferred embodiment of the present invention, in the step (5), the P electrode is located in the conductive hole, and the electrode is a Cr-Pt-Au composite structure, wherein the first layer of Cr has an adhesion function, the thickness is 20-150nm, the second layer of Pt has a diffusion barrier function, the thickness is 30-100nm, the third layer of Au is used as an electrode pad, the thickness is 2000-4000nm, evaporation is performed by using electron beam evaporation, and rapid annealing is performed by using RTP, and the temperature is 390 ℃.
According to the invention, in the step (6), the dicing street etching adopts an ICP etching method, etching equipment selects a northern micro 380 model, and gas selects Cl 2 And BCl 3 As the main etching gas, the etching gas ratio is 16:1, the cavity pressure is 3mTorr, the bias power is 400W, the ICP power supply power is 900W, the etching temperature is-10 ℃, the etching uniformity is good under the formula, the side wall has no slope, and the P-GaP ohmic contact layer is deeply etched;
according to a preferred embodiment of the present invention, in step (7), the solid wax requires: the melting point is above 100 ℃, acid and alkali resistance, easy removal and high adhesiveness are realized;
further preferably, the transition substrate is of a transparent oxide structure, has the characteristics of high temperature resistance, acid and alkali resistance, high hardness and the like, and adopts ceramic aluminum nitride, aluminum oxide or quartz glass;
preferably, the temporary bonding is reinforced by a waxing machine, the attached transition substrate is placed on a heating carrying disc of the waxing machine which is preheated (100 ℃) in advance, two pieces of dust-free paper are covered, a lifting shaft of the waxing machine is pressed down and is directly above a wafer, the pressure is 50KG, and the temporary bonding treatment can be completed after the transition substrate is maintained for 5-8 min.
According to the invention, in the step (9), the N electrode comprises six layers, namely an Au layer, a Ni layer, an Au layer, a Ge layer, an Au layer and a Cu layer which are sequentially connected, the deposition is carried out in an electron beam evaporation mode, the evaporation equipment adopts a large-cavity Fulin EB evaporation table, the heating evaporation temperature is 200 ℃, the high vacuum is lower than 3E-6Torr, the film forming property under the parameters is good, the quality is high, the contact resistance is small, the reflectivity is high, the first layer Au mainly plays a role of specular reflection, the film thickness is 20-100nm, the second layer Ni plays an ohmic contact role to the fifth layer Au, the film thickness of the second layer Ni is 3-20nm, the film thickness of the third layer Au is 20-100m, the film thickness of the fourth layer Ge layer is 10-50nm, the film thickness of the fifth layer Au is 100-400nm, the sixth layer Cu plays an adhesion role, and the adhesion force with a supporting substrate is increased, and the film thickness is 3-10um.
According to the preferred embodiment of the present invention, in the step (10), the supporting substrate is metallic Cu, and mainly plays a supporting role, and has a thickness of 50-150um, and is prepared by electroplating, wherein the electroplated copper is sulfate plating solution, the LED epitaxial wafer is placed at the cathode, the elemental copper is an anode material, the plating solution is composed of copper sulfate, sulfuric acid, chloride ions and water, the concentration of the copper sulfate is 150-250g/L, the concentration of the sulfuric acid is 40-80g/L, the concentration of the chloride ions is 35-50mg/L, the temperature of the solvent is controlled at about 25 ℃, the electrolysis current is 0.1-0.4A, the electrolysis voltage is 3-6V, the electrolysis time is about 3.5 hours, the electrochemical reaction is oxidation-reduction reaction, and the anode is oxidized to provide Cu 2+ Generating a reduction reaction at the cathode to generate a Cu metal simple substance;
according to the invention, in the step (11), the transition substrate is peeled off by adopting a heating and dissolving solid wax separation mode, the solid wax remained on the surface is removed by adopting a mode of soaking a de-waxing liquid, and then the transition substrate is peeled off by washing with deionized water and washing with acetone and ethanol.
The invention is not exhaustive, such as MOCVD epitaxy, photolithographic masking, cleaning etching, cutting, splintering, spot measurement sorting, etc., are all prior art in the field.
The invention has the beneficial effects that:
1. the invention provides an infrared LED chip, which adopts a brand new technology based on electron beam evaporation and electroplating of a metal copper substrate, avoids the disadvantages of the conventional bonding technology, improves the bonding yield by more than 20% and improves the reliability by more than 10%.
2. The scheme of electron beam evaporation and metal copper electroplating substrate provided by the invention avoids the problems of light absorption of a conventional GAAs substrate, low reflectivity of a common metal substrate and the like, and an AU layer with higher reflectivity is added before a supporting substrate, so that the reflection of side light emitted to the substrate is increased, and the luminous efficiency of an infrared LED chip is improved by more than 5%.
3. According to the infrared LED chip provided by the invention, the P-side light-emitting area adopts the scheme of fancy coarsening and ITO transparent conductive expansion, so that the working voltage of the infrared LED chip is reduced by more than 0.05V, and the light-emitting efficiency of the infrared LED chip is improved by about 3%.
Drawings
Fig. 1 is a schematic structural view of the present invention.
Fig. 2 is a schematic view of the epitaxial wafer structure of the present invention.
FIG. 3 is a schematic illustration of the present invention after temporary bonding of an infrared LED wafer to a transition substrate.
In the figure, 1, a GaAs temporary substrate; 2. a GaInP cut-off layer; 3. an N-AlGaAs ohmic layer; 4. an N-AlGaAs current spreading layer; 5. an N-AlGaAs confinement layer; 6. an MQW light-emitting layer; 7. a P-AlGaAs confinement layer; 8. a P-AlGaAs current spreading layer; 9. a P-GaP extension layer; 10. a P-GaP ohmic contact layer; 11. a light window layer; 12. an ITO thin film; 13. a P electrode; 14. solid wax; 15. a transition substrate; 16. an N electrode; 17. and supporting the substrate.
Detailed Description
The invention will now be further illustrated by way of example, but not by way of limitation, with reference to the accompanying drawings.
Example 1:
an infrared LED chip comprises a supporting substrate 17, an N electrode 16, an N-AlGaAs ohmic layer 3, an N-AlGaAs current expansion layer 4, an N-AlGaAs limiting layer 5, an MQW light-emitting layer 6, a P-AlGaAs limiting layer 7, a P-AlGaAs current expansion layer 8, a P-GaP expansion layer 9, a P-GaP ohmic contact layer 10 and a P electrode 13 which are sequentially arranged from bottom to top,
the P-GaP ohmic contact layer 10 is provided with a light window layer 11, conductive holes of the light window layer 11 and the P-GaP ohmic contact layer 10 are provided with ITO films 12, the N electrode 16 comprises six layers, specifically an Au layer, a Ni layer, an Au layer, a Ge layer, an Au layer and a Cu layer which are sequentially connected from top to bottom, the light window layer 11 and the conductive holes of the P-GaP ohmic contact layer 10 are deposited in an electron beam evaporation mode, and the supporting substrate 17 is metal Cu and is prepared in an electroplating mode.
The manufacturing method of the infrared LED chip comprises the following steps:
(1) A MOCVD method is adopted, and a GaInP cut-off layer 2, an N-AlGaAs ohmic layer 3, an N-AlGaAs current expansion layer 4, an N-AlGaAs limiting layer 5, an MQW light-emitting layer 6, a P-AlGaAs limiting layer 7, a P-AlGaAs current expansion layer 8, a P-GaP expansion layer 9 and a P-GaP ohmic contact layer 10 are sequentially grown on a GaAs temporary substrate 1 to obtain an epitaxial wafer;
(2) Manufacturing a light-emitting area coarsening pattern on the P-GaP ohmic contact layer 10 by adopting a photoetching process, wherein the light-emitting area coarsening pattern is a fancy coarsening pattern which is named because of the similar shape to petals, and coarsening the fancy coarsening pattern at normal temperature by adopting a mixed solution of iodic acid, sulfuric acid, hydrofluoric acid and water to obtain a P-GaP light window layer 11, wherein the coarsened P-GaP light window layer can greatly reduce the total emission phenomenon of emergent light, and further improve the light-emitting efficiency;
(3) Photoetching a conductive hole pattern on the P-GaP ohmic contact layer 10, wherein the conductive hole pattern is obtained by dry ICP etching to obtain a conductive hole;
(4) Depositing an ITO film 12 on the whole surface of the P-GaP light window layer 11 and the conducting holes;
(5) Photoetching a P electrode pad pattern on the conductive hole in the step (4), evaporating a P electrode pad, stripping and cleaning to finish the manufacturing of the P electrode 13, and performing rapid annealing treatment;
(6) Forming a cutting path pattern by using the wafer photoetching mask obtained in the step (5), and performing etching treatment to form isolation of the P-face die;
(7) Uniformly coating a layer of solid wax 14 on a transition substrate 15, and attaching the transition substrate 15 to the P surface of the epitaxial wafer through the solid wax 14 to perform temporary bonding treatment;
(8) Removing the GaAs temporary substrate 1 and the GaInP cut-off layer 2 to obtain an epitaxial wafer with the surface exposed with the N-AlGaAs ohmic layer 3;
(9) Depositing N electrode metal on the surface of the N-AlGaAs ohmic layer 3 by utilizing an electron beam evaporation deposition mode to form an N electrode;
(10) Electroplating a layer of metal substrate on the N electrode 16 to finish the manufacture of the composite metal support substrate, thereby obtaining a wafer;
(11) Stripping the transition substrate of the wafer obtained in the step (10);
(12) And (3) cutting, testing, sorting and checking the wafer in the step (11) to obtain the infrared LED chip.
In the step (1), the N-AlGaAs ohmic layer has an AlxGa (1-X) As structure, wherein x=0.1 and the thickness is 1.5um;
in the step (4), the thickness of the ITO film is adjusted according to the wavelength of the chip, and the calculation formula of the thickness of the ITO film is d=m (1λ/4 n), d: ITO film target thickness, m: odd, λ: wavelength of chip, n: refractive index of the ITO thin film.
In the step (5), the P electrode is positioned in the conductive hole, the electrode is of a composite structure of Cr-Pt-Au, wherein the first layer of Cr has an adhesion effect, the thickness is 20-150nm, the second layer of Pt has a diffusion barrier effect, the thickness is 30-100nm, the third layer of Au is used as an electrode pad, the thickness is 2000-4000nm, evaporation is carried out by adopting an electron beam evaporation mode, rapid annealing is carried out by using RTP, and the temperature is 390 ℃.
In the step (6), the dicing channel etching adopts an ICP etching method, etching equipment selects a northern micro 380 model, and gas selects Cl 2 And BCl 3 As the main etching gas, the etching gas ratio is 16:1, the cavity pressure is 3mTorr, the bias power is 400W, the ICP power supply power is 900W, the etching temperature is-10 ℃, the etching uniformity is good under the formula, the side wall has no slope, and the P-GaP ohmic contact layer is deeply etched.
In step (7), the solid wax requires: the melting point is above 100 ℃, acid and alkali resistance, easy removal and high adhesiveness.
The transition substrate is of a transparent oxide structure, has the characteristics of high temperature resistance, acid and alkali resistance, high hardness and the like, and adopts ceramic aluminum nitride, aluminum oxide or quartz glass and the like;
the temporary bonding is reinforced by a waxing machine, the bonded transition substrate is placed on a heating carrying disc of the waxing machine which is preheated (100 ℃) in advance, two pieces of dust-free paper are covered, a lifting shaft of the waxing machine is pressed down and directly above a wafer, the pressure is 50KG, and the temporary bonding treatment can be completed after the transition substrate is maintained for 5-8 min.
In the step (9), the N electrode 16 includes six layers, specifically, an Au layer, a Ni layer, an Au layer, a Ge layer, an Au layer and a Cu layer, which are sequentially connected, and is deposited in an electron beam evaporation mode, the evaporation equipment adopts a large-chamber fulin EB evaporation table, the heating evaporation temperature is 200 ℃, the high vacuum is lower than 3E-6Torr, the film forming property under the parameters is good, the forming quality is high, the contact resistance is small, the reflectivity is high, the first layer Au mainly plays a role of specular reflection, the film thickness is 20nm, the second layer Ni plays an ohmic contact role to the fifth layer Au, the second layer Ni film thickness is 3nm, the third layer Au film thickness is 20m, the fourth layer Ge film thickness is 10nm, the fifth layer Au film thickness is 100nm, the sixth layer Cu plays an adhesion role, the adhesion with the support substrate is increased, and the film thickness is 3um.
In the step (10), the supporting substrate 17 is metallic Cu, which mainly plays a supporting role, has a thickness of 50um, is prepared by adopting an electroplating mode, the electroplated copper adopts sulfate plating solution, the LED epitaxial wafer is placed at a cathode, a copper simple substance is an anode material, the plating solution consists of copper sulfate, sulfuric acid, chloride ions and water, the concentration of the copper sulfate is 150g/L, the concentration of the sulfuric acid is 40g/L, the concentration of the chloride ions is 35mg/L, the temperature of a solvent is controlled to be about 25 ℃, the electrolysis current is 0.1A, and the electrolysis voltage is3V, the electrolysis time is about 3.5 hours, the electrochemical reaction is oxidation-reduction reaction, and the anode is oxidized to provide Cu 2+ The cathode generates reduction reaction to generate Cu metal simple substance.
In the step (11), the transition substrate 15 is peeled off by heating to dissolve the solid wax, removing the solid wax remained on the surface by immersing in the de-waxing liquid, and washing with deionized water and acetone-ethanol to finish the peeling off of the transition substrate.
The invention is not exhaustive, such as MOCVD epitaxy, photolithographic masking, cleaning etching, cutting, splintering, spot measurement sorting, etc., are all prior art in the field.
Example 2
A method for manufacturing an infrared LED chip, which is as described in embodiment 1, is different in that,
in the step (1), the N-AlGaAs ohmic layer has a structure of AlxGa (1-X) As, wherein x=0.4 and a thickness of 3um;
in the step (3), the conductive hole pattern is obtained by wet etching, and the wet etching adopts HBr and H 2 Etching the O mixed solution, wherein the concentration of HBr is 4% -8%, and the etching depth is more than or equal to the thickness of the P-GaP ohmic contact layer;
in the step (9), the thickness of the first layer of Au is 100nm, the thickness of the second layer of Ni is 20nm, the thickness of the third layer of Au is 100m, the thickness of the fourth layer of Ge is 50nm, the thickness of the fifth layer of Au is 400nm, and the thickness of the sixth layer of Cu is 10um.
In the step (10), the supporting substrate 17 is metal Cu, the thickness is 150um, the concentration of copper sulfate in the electroplating solution is 250g/L, the concentration of sulfuric acid is 80g/L, the concentration of chloride ions is 50mg/L, the electrolysis current is 0.4A, and the electrolysis voltage is 6V.
Claims (10)
1. An infrared LED chip is characterized by comprising a supporting substrate, an N electrode, an N-AlGaAs ohmic layer, an N-AlGaAs current expansion layer, an N-AlGaAs limiting layer, an MQW luminescent layer, a P-AlGaAs limiting layer, a P-AlGaAs current expansion layer, a P-GaP ohmic contact layer and a P electrode which are sequentially arranged from bottom to top,
the P-GaP ohmic contact layer is provided with a light window layer, the light window layer and the P-GaP ohmic contact layer are provided with ITO films on conductive holes, the N electrode comprises six layers, specifically an Au layer, a Ni layer, an Au layer, a Ge layer, an Au layer and a Cu layer which are sequentially connected from top to bottom, the light window layer and the P-GaP ohmic contact layer are deposited in an electron beam evaporation mode, the supporting substrate is metal Cu, and the light window layer and the P-GaP ohmic contact layer are prepared in an electroplating mode.
2. The method for manufacturing an infrared LED chip as set forth in claim 1, comprising the steps of:
(1) Sequentially growing a GaInP cut-off layer, an N-AlGaAs ohmic layer, an N-AlGaAs current expansion layer, an N-AlGaAs limiting layer, an MQW light-emitting layer, a P-AlGaAs limiting layer, a P-AlGaAs current expansion layer, a P-GaP expansion layer and a P-GaP ohmic contact layer on a GaAs temporary substrate by adopting an MOCVD method to obtain an epitaxial wafer;
(2) Manufacturing a light-emitting area coarsening pattern on the P-GaP ohmic contact layer by adopting a photoetching process, and then coarsening the light-emitting area to obtain a light window layer;
(3) Photoetching a conductive hole pattern on the P-GaP ohmic contact layer, and carrying out etching treatment to obtain a conductive hole;
(4) Depositing a layer of ITO film on the whole surface of the light window layer and the conducting hole;
(5) Photoetching a P electrode pad pattern on the conductive hole in the step (4), evaporating a P electrode pad, stripping and cleaning to finish P electrode manufacturing, and performing rapid annealing treatment;
(6) Forming a cutting path pattern by using the wafer photoetching mask obtained in the step (5), and performing etching treatment to form isolation of the P-face die;
(7) Uniformly coating a layer of solid wax on a transition substrate, and attaching the transition substrate to the P surface of the epitaxial wafer through the solid wax to perform temporary bonding treatment;
(8) Removing the GaAs temporary substrate and the GaInP cut-off layer to obtain an epitaxial wafer with the surface exposed with the N-AlGaAs ohmic layer;
(9) Depositing N electrode metal on the surface of the N-AlGaAs ohmic layer by utilizing an electron beam evaporation deposition mode to form an N electrode;
(10) Electroplating a layer of metal substrate on the N electrode to finish the manufacture of the composite metal support substrate, thereby obtaining a wafer;
(11) Stripping the transition substrate of the wafer obtained in the step (10);
(12) And (3) cutting, testing, sorting and checking the wafer in the step (11) to obtain the infrared LED chip.
3. The method of manufacturing an infrared LED chip according to claim 2, wherein in the step (1), the N-AlGaAs ohmic layer has an AlxGa (1-X) As structure in which 0.1 < X < 0.4 and a thickness of 1.5 to 3um.
4. The method of manufacturing an infrared LED chip as set forth in claim 2, wherein in the step (3), the conductive hole pattern is obtained by dry etching or wet etching, the dry etching is performed by ICP etching, and the wet etching is performed by HBr or H 2 And etching the O mixed solution, wherein the concentration of HBr is 4% -8%, and the etching depth is more than or equal to the thickness of the P-GaP ohmic contact layer.
5. The method of manufacturing an infrared LED chip according to claim 2, wherein in the step (4), the ITO thin film thickness is calculated as d=m (1λ/4 n), d: ITO film target thickness, m: odd, λ: wavelength of chip, n: refractive index of the ITO thin film.
6. The method of manufacturing an infrared LED chip as set forth in claim 2, wherein in the step (5), the P electrode is located in the conductive hole, the electrode is a Cr-Pt-Au composite structure, wherein the first layer of Cr plays a role in adhesion, the thickness is 20-150nm, the second layer of Pt plays a role in diffusion barrier, the thickness is 30-100nm, the third layer of Au serves as an electrode pad, the thickness is 2000-4000nm, evaporation is performed by means of electron beam evaporation, and rapid annealing is performed by RTP at a temperature of 390 ℃.
7. The method of manufacturing an infrared LED chip as set forth in claim 2, wherein in the step (6), the dicing street etching is an ICP etching method, and gas-selective Cl is used 2 And BCl 3 As the main etching gas, the etching gas ratio is 16:1, the cavity pressure is 3mTorr, and the bias power is 40And 0W, the ICP power supply power is 900W, the etching temperature is-10 ℃, and the deep etching is performed until the P-GaP ohmic contact layer is formed.
8. The method of manufacturing an infrared LED chip as set forth in claim 2, wherein in the step (7), the solid wax requires: the melting point is above 100 ℃;
the transition substrate is of a transparent oxide structure and adopts ceramic aluminum nitride, aluminum oxide or quartz glass;
the temporary bonding is reinforced by a waxing machine, the bonded transition substrate is placed on a heating carrying disc of the waxing machine which is preheated in advance, two pieces of dust-free paper are covered, a lifting shaft of the waxing machine is put down and pressed right above a wafer, the pressure is 50KG, and the temporary bonding treatment is completed after the maintenance of 5-8 min.
9. The method of manufacturing an infrared LED chip as claimed in claim 2, wherein in the step (9), the N electrode comprises six layers, specifically an Au layer, a Ni layer, an Au layer, a Ge layer, an Au layer and a Cu layer, which are sequentially connected, and is deposited in an electron beam evaporation manner, wherein the heating evaporation temperature is 200 ℃, the high vacuum is lower than 3E-6Torr, the first layer Au mainly has a specular reflection effect, the film thickness is 20-100nm, the second layer Ni to the fifth layer Au have an ohmic contact effect, the second layer Ni film thickness is 3-20nm, the third layer Au film thickness is 20-100m, the fourth layer Ge film thickness is 10-50nm, the fifth layer Au film thickness is 100-400nm, the sixth layer Cu has an adhesion effect, the adhesion with the support substrate is increased, and the film thickness is 3-10um.
10. The method for manufacturing an infrared LED chip as claimed in claim 2, wherein in the step (10), the supporting substrate is metal Cu, the thickness is 50-150 μm, the plating copper is prepared by adopting a sulfate plating solution, the LED epitaxial wafer is placed on the cathode, the elemental copper is an anode material, the plating solution is composed of copper sulfate, sulfuric acid, chloride ions and water, the concentration of the copper sulfate is 150-250g/L, the concentration of the sulfuric acid is 40-80g/L, the concentration of the chloride ions is 35-50mg/L, the temperature of the solvent is controlled at 25 ℃, the electrolysis current is 0.1-0.4A, the electrolysis voltage is 3-6V, and the electrolysis time is 3.5 hoursThe electrochemical reaction is oxidation-reduction reaction, and the anode is oxidized to provide Cu 2+ Generating a reduction reaction at the cathode to generate a Cu metal simple substance;
preferably, in the step (11), the transition substrate is peeled off by adopting a heating and dissolving solid wax separation mode, removing the solid wax remained on the surface by adopting a soaking and dewaxing liquid mode, and then washing with deionized water and washing with acetone and ethanol to finish the peeling off of the transition substrate.
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| CN117810318A (en) * | 2024-02-29 | 2024-04-02 | 江西兆驰半导体有限公司 | High-voltage Micro-LED chip and preparation method thereof |
| CN117810318B (en) * | 2024-02-29 | 2024-05-07 | 江西兆驰半导体有限公司 | High-voltage Micro-LED chip and preparation method thereof |
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