CN117060709B - Single-stage bridgeless isolated Zeta type power factor correction circuit - Google Patents

Single-stage bridgeless isolated Zeta type power factor correction circuit Download PDF

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Publication number
CN117060709B
CN117060709B CN202311056930.4A CN202311056930A CN117060709B CN 117060709 B CN117060709 B CN 117060709B CN 202311056930 A CN202311056930 A CN 202311056930A CN 117060709 B CN117060709 B CN 117060709B
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energy storage
input
transformer
power factor
factor correction
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CN117060709A (en
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李浩昱
丁明远
邢延林
叶一舟
苏航
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Harbin Institute of Technology
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Harbin Institute of Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4258—Arrangements for improving power factor of AC input using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

The single-stage bridgeless isolation type Zeta-type power factor correction circuit solves the problems of more used elements and low efficiency of the existing Zeta-type bridgeless PFC circuit topology, and belongs to the field of single-stage single-phase bridgeless power factor correction converter topologies. The invention comprises an input filter inductance L f, an input filter capacitance C f, a transformer T, an energy storage capacitance C, an energy storage inductance L, an output filter capacitance C dc1, an output filter capacitance C dc2, a No. 1 bidirectional switch and a No. 2 bidirectional switch; the values of the energy storage inductance L and the excitation inductance L m and the maximum duty cycle d max are also designed. The rectifier diode at the alternating current input end is completely eliminated, and the circuit realizes bridge-free in the true sense; the maximum withstand voltage born by the semiconductor device is effectively reduced at higher output voltage, the switching loss is effectively reduced, and the circuit efficiency is further improved; the control is simple, the input current does not need to be sampled, and the power factor correction function can be realized by adopting single-voltage loop fixed duty ratio control.

Description

Single-stage bridgeless isolated Zeta type power factor correction circuit
Technical Field
The invention relates to a single-stage bridgeless isolation type Zeta-type power factor correction circuit, and belongs to the topology field of single-stage single-phase bridgeless power factor correction converters.
Background
Brushless direct current (BLDC) motors, which use electronic commutators, have now completely replaced conventional dc motors, and have gained much attention and application in light Electric Vehicles (EVs) and household appliances. The driving system of the motor mainly comprises a Power Factor Correction (PFC) circuit and a Voltage Source Inverter (VSI), wherein the Zeta type PFC circuit is used as a front-stage PFC and is in cascade connection and cooperation with a rear-stage voltage source inverter due to the advantages of good dynamic response, continuous output current, easiness in isolation and the like under a Discontinuous Conduction Mode (DCM). The traditional Zeta type power factor correction circuit adopts a diode rectifier bridge at the alternating current side, and the existence of the rectifier bridge can reduce the conversion efficiency, the Power Factor (PF), the Total Harmonic Distortion (THD) and other electric energy quality parameters of the converter. In order to achieve high efficiency and low cost, researches on a bridgeless Zeta type PFC circuit topology are developed successively.
Because of the complexity of the Zeta circuit structure, the current bridgeless Zeta type PFC circuit topology mainly comprises a bridgeless Zeta type PFC based on a double primary side transformer and a dual bridgeless Zeta type PFC. The bridgeless Zeta type PFC topological circuit based on the double primary windings has a relatively simple structure, but the used transformer is a double primary winding, a center tap is needed, the transformer is relatively troublesome to manufacture, meanwhile, two primary windings are respectively connected with a diode in series, a diode bridge arm still exists on the alternating current side, and the efficiency of the converter is reduced; the output side of the dual bridgeless Zeta type PFC topology is of a double-capacitor structure, voltage stress of a switching device is reduced, but two Zeta conversion circuits are used for respectively working at positive half cycles and negative half cycles of input alternating voltage, and the circuit structure is relatively complex.
Disclosure of Invention
Aiming at the problems of more used elements and low efficiency of the existing Zeta-type bridgeless PFC circuit topology, the invention provides a single-stage bridgeless isolated Zeta-type power factor correction circuit.
The invention relates to a single-stage bridgeless isolation type Zeta type power factor correction circuit, which comprises an input filter inductance L f, an input filter capacitance C f, a transformer T, an energy storage capacitance C, an energy storage inductance L, an output filter capacitance C dc1, an output filter capacitance C dc2, a No.1 bidirectional switch and a No.2 bidirectional switch;
The positive electrode of the input power supply is connected with one end of an input filter inductor L f, the other end of the input filter inductor L f is simultaneously connected with one end of a No. 1 bidirectional switch and one end of an input filter capacitor C f, the other end of the No. 1 bidirectional switch is connected with the homonymous end of the primary side of the transformer T, and the negative electrode of the input power supply and the other end of the input filter capacitor C f are simultaneously connected with the heteronymous end of the primary side of the transformer T;
the same-name end of the secondary side of the transformer T is connected with one end of an energy storage capacitor C, the other end of the energy storage capacitor C is simultaneously connected with one end of a No. 2 bidirectional switch and one end of an energy storage inductor L, and the other end of the energy storage inductor L is simultaneously connected with the anode of a diode D 1 and the cathode of a diode D 2;
The synonym end of the secondary side of the transformer T, the other end of the No. 2 bidirectional switch, the negative electrode of the output filter capacitor C dc1 and the positive electrode of the output filter capacitor C dc2 are connected at the same time;
The cathode of the diode D 1 is connected to the anode of the output filter capacitor C dc1, and the anode of the diode D 2 is connected to the cathode of the output filter capacitor C dc2.
Preferably, the circuit operates in an intermittent conduction mode.
Preferably, the parallel inductance value of the excitation inductance L m and the energy storage inductance L of the transformer T is designed as L eq:
Where P ac is the input power, T S is the switching period, d is the duty cycle, and V ac_max is the peak of the AC input voltage.
Preferably, the value of the energy storage inductance L is designed as:
Where α is the ripple coefficient of the input current.
Preferably, the maximum duty cycle d max is designed as:
Wherein, the transformation ratio of the transformer T is n:1, v dc is the load voltage.
Preferably, the excitation inductance L m is designed as:
Preferably, the maximum voltage stress V S1/S2_max borne by the bidirectional switch No. 1 is:
VS1/S2_max＝Vac_max+nVdc/2
the maximum voltage stress V S3/S4_max borne by the bidirectional switch No. 1 is:
VS3/S4_max＝Vac_max+nVdc/2。
The circuit has the beneficial effects that the bridge-free PFC function is realized by only using one isolation transformer, one energy storage capacitor and one energy storage inductor, the circuit structure is simple, and meanwhile, the transformer is of a standard structure and the design is simple. The main advantages of the circuit are: the rectifier diode at the alternating current input end is completely eliminated, and the circuit realizes no bridge in the true sense; the maximum withstand voltage born by the semiconductor device is effectively reduced at higher output voltage, the switching loss is effectively reduced, and the circuit efficiency is further improved; the control is simple, the input current does not need to be sampled, and the power factor correction function can be realized by adopting single-voltage loop fixed duty ratio control.
Drawings
FIG. 1 is a circuit diagram of a single-stage bridgeless isolated Zeta-type power factor correction circuit;
FIG. 2 is a diagram of the main operating waveforms of a switching cycle circuit in the positive half cycle of an AC voltage;
FIG. 3 is a schematic diagram of three phases of operation of a switching cycle circuit in the positive half cycle of an AC voltage, wherein FIG. 3 (a) is a schematic diagram of mode I, FIG. 3 (b) is a schematic diagram of mode II, and FIG. 3 (c) is a schematic diagram of mode III;
FIG. 4 is a diagram of the main operating waveforms of a switching cycle circuit in the negative half cycle of an AC voltage;
FIG. 5 is a schematic diagram of three phases of operation of a switching cycle circuit in the negative half cycle of the AC voltage, wherein FIG. 5 (a) is mode IV, FIG. 5 (b) is mode V, and FIG. 5 (c) is mode VI;
FIG. 6 is a graph of voltage and current waveforms at 100V/50Hz AC input and 100V/500W DC output, wherein FIG. 6 (a) is a graph of input voltage and current waveforms, and FIG. 6 (b) is a graph of output voltage and two output filter capacitor voltages;
Fig. 7 is a waveform diagram of voltages at two ends of a switching tube under an alternating current input of 100V/50Hz and a direct current output of 100V/500W, wherein fig. 7 (a) is a waveform diagram of voltages at two ends of the switching tube S 1 and S 2, and fig. 7 (b) is a waveform diagram of voltages at two ends of the switching tube S 3 and S 4.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that, without conflict, the embodiments of the present invention and features of the embodiments may be combined with each other.
The invention is further described below with reference to the drawings and specific examples, which are not intended to be limiting.
The single-stage bridgeless isolation type Zeta-type power factor correction circuit of the embodiment comprises an input filter inductor L f, an input filter capacitor C f, a transformer T (excitation inductor L m, transformation ratio n: 1), an energy storage capacitor C, an energy storage inductor L, two output filter capacitors C dc1、Cdc2, two bidirectional switches and a diode D 1、D2. The positive electrode of the input power supply is connected with one end of an input filter inductor L f, the other end of the input filter inductor L f is simultaneously connected with one end of a No. 1 bidirectional switch and one end of an input filter capacitor C f, the other end of the No. 1 bidirectional switch is connected with the homonymous end of the primary side of the transformer T, and the negative electrode of the input power supply and the other end of the input filter capacitor C f are simultaneously connected with the heteronymous end of the primary side of the transformer T; the same-name end of the secondary side of the transformer T is connected with one end of an energy storage capacitor C, the other end of the energy storage capacitor C is simultaneously connected with one end of a No. 2 bidirectional switch and one end of an energy storage inductor L, and the other end of the energy storage inductor L is simultaneously connected with the anode of a diode D 1 and the cathode of a diode D 2; the synonym end of the secondary side of the transformer T, the other end of the No. 2 bidirectional switch, the negative electrode of the output filter capacitor C dc1 and the positive electrode of the output filter capacitor C dc2 are connected at the same time; the cathode of the diode D 1 is connected to the anode of the output filter capacitor C dc1, and the anode of the diode D 2 is connected to the cathode of the output filter capacitor C dc2. Wherein, the two bidirectional switches are respectively realized by two groups of anti-serial switch tubes (a first group S 1、S2 and a second group S 3、S4) and can pass bidirectional current.
In order to facilitate the analysis of the circuit operating principle, the following description is made:
(1) The circuit operates in Discontinuous Conduction Mode (DCM);
(2) Neglecting the influence of parasitic parameters, conduction voltage drop and line parameters of the used components;
(3) The capacitance of the output filter capacitor C dc1、Cdc2 is equal and large enough, and the capacitance partial pressure is equal, namely v Cdc1＝vCdc2＝Vdc/2;
(4) The switching frequency f S is far higher than the power frequency, the input voltage in the switching period T S is regarded as a fixed value V in, and the voltage of the energy storage capacitor is regarded as a fixed value V C.
In the positive half cycle of the alternating voltage, the diode D 1 is turned on, the diode D 2 is turned off, and the voltage at the two ends of the output port is the voltage V dc/2 at the two ends of the output filter capacitor C dc1; in the negative half cycle of the alternating voltage, the diode D 1 is turned off, the diode D 2 is turned on, and the voltage at the two ends of the output port is the voltage V dc/2 at the two ends of the output filter capacitor C dc2. According to the positive and negative of the alternating current input voltage and the switching actions of the switching tubes of the two bidirectional switches, six different working modes exist in the single-stage bridgeless isolation type Zeta type power factor correction circuit. The main working waveform of a switch period circuit in the positive half cycle of alternating voltage is shown in figure 2, and the corresponding phase mode diagram is shown in figure 3; the main working waveform of a switch period circuit in the negative half cycle of the alternating voltage is shown in fig. 4, and the corresponding phase mode diagram is shown in fig. 5.
Modality I (as shown in fig. 3 (a)): the mode starts from the conduction time of the switching tubes S 1 and S 2, the switching tubes S 3 and S 4 are turned off, the primary side voltage of the transformer is +V in, and the exciting inductance of the transformer is charged linearly and positively; the secondary side voltage of the transformer is +V in/n, and the transformer and the energy storage capacitor C discharge to the energy storage inductor L and the load through the diode D 1.
Modality II (as shown in fig. 3 (b)): the mode starts when the switching transistors S 1 and S 2 are turned off, and the switching transistors S 3 and S 4 are turned on. The input power source freewheels through a filtering loop, and the energy stored by the primary side excitation inductance of the transformer is released to the energy storage capacitor C through the secondary side; the energy storage inductance L discharges to the load through the switching transistors S 3 and S 4, and the current of the energy storage inductance L starts to decrease linearly.
Modality III (as shown in fig. 3 (c)): the mode starts when the current of the switching transistors S 3 and S 4 is 0, and the switching transistors S 1 and S 2 are turned off and the switching transistors S 3 and S 4 are turned off in this stage. The input power supply continuously freewheels through the filter loop, and the energy storage inductor L freewheels with the secondary winding of the transformer through the energy storage capacitor C.
Modality IV (as shown in fig. 5 (a)): the mode starts from the conduction time of the switching tubes S 1 and S 2, the switching tubes S 3 and S 4 are turned off, the primary voltage of the transformer is-V in, and the excitation inductance of the transformer is charged in a linear reverse direction; the secondary side voltage of the transformer is-V in/n, and the transformer and the energy storage capacitor C discharge to the energy storage inductor L and the load through the diode D 2.
Modality V (as shown in fig. 5 (b)): the mode starts when the switching transistors S 1 and S 2 are turned off, and the switching transistors S 3 and S 4 are turned on. The input power source freewheels through a filtering loop, and the energy stored by the primary side excitation inductance of the transformer is released to the energy storage capacitor C through the secondary side; the energy storage inductance L discharges to the load through the switching transistors S 3 and S 4, and the current of the energy storage inductance L starts to decrease in a reverse linear manner.
Modality VI (as shown in fig. 5 (c)): the mode starts when the current of the switching transistors S 3 and S 4 is 0, and the switching transistors S 1 and S 2 are turned off and the switching transistors S 3 and S 4 are turned off in this stage. The input power supply continuously freewheels through the filter loop, and the energy storage inductor L freewheels with the secondary winding of the transformer through the energy storage capacitor C.
From the analysis of the operating principle, the principle of the circuit in the positive half cycle and the negative half cycle of the alternating input voltage are identical, and only the current direction is reversed. During the period when the mode II and mode V switching tubes S 1 and S 2 are turned off, the switching tubes S 1 and S 2 bear the maximum withstand voltage; during the off-period of the mode I and mode IV switching tubes S 3 and S 4, the switching tubes S 3 and S 4 are subjected to the maximum withstand voltage. The maximum voltage stress it is subjected to can be expressed as:
where V ac_max is the peak value of the AC input voltage.
From the observation of the voltage stress expression, the dc output voltage is converted to half the voltage stress of the switching tube. For the occasion with higher output voltage, the voltage stress of the topological switch tube is effectively reduced, the switching loss is effectively reduced, and the circuit efficiency is further improved.
And writing a volt-second balance equation of a switching period for the voltage columns at two ends of the excitation inductance L m and the energy storage inductance L of the transformer, and obtaining:
Where d is the duty cycle, delta 1 is the time duty cycle of mode II/V, delta 2 is the time duty cycle of mode III/VI. The above simplification can be obtained:
The voltage of the energy storage capacitor follows the change of the voltage V dc/2 at the two ends of the output port, and the voltage gain of the circuit depends on the ratio of d to nDelta 1. In the mode III/VI stage, the voltage at two ends of the energy storage inductor L is 0, and the inductor L freewheels with the secondary winding of the transformer through the energy storage capacitor C. When the switching tubes S 1 and S 2 are turned on, the primary exciting inductance and the energy storage inductance of the transformer are charged linearly, and the input side current reaches the maximum value I S_max at the turn-off time of the two-way switching tubes S 1 and S 2, which can be expressed as:
Wherein, L eq is a parallel inductance value representing the inductance L m and L, and the expression is as follows:
The two-way switching tubes S 1 and S 2 are only in the on state in the mode I/IV, and are all turned off in other stages, so that the input current waveform is triangular. Based on the input current peak value, an input current average value expression is obtained:
Thereby obtaining an expression of alternating current input current at power frequency:
Observing an alternating current input current expression, when the parallel inductance parameter and the switching period are certain, the power factor correction function of the input side can be realized by adopting fixed duty ratio control, the duty ratio can be obtained through an output voltage single closed loop, and the control method is simple and stable.
From the input current expression, it can be found that the inductance parameter has a large influence on the effective value of the current. In the case of a definite circuit input power, the shunt inductance value can be obtained by:
where P ac is the input power. As can be seen from the design formula of the parallel inductor, the maximum value of the parallel inductor value depends on the maximum duty cycle d max of the system. Based on the foregoing theoretical analysis, the system maximum duty cycle is determined by:
The above formula is modified to obtain the expression of d max:
The current of the energy storage inductor L has continuity, the general inductance value is larger, the design can be carried out according to the current ripple, and the design formula of the energy storage inductor L is as follows:
Where α is the ripple coefficient of the input current. Based on the obtained parallel inductance L eq and the energy storage inductance L, the inductance value of the transformer excitation inductance L m can be obtained according to a parallel inductance formula.
The design of inductance parameters is carried out by taking 100V/50Hz power frequency input and 100V/500W output as examples.
The switching frequency was designed to be 50kHz and the transformer ratio n=1. Based on the input-output voltage indicator, a maximum duty cycle is calculated:
The duty cycle value d=0.25 is thus determined. And taking the input current ripple coefficient alpha=0.2 to obtain the inductance values of the energy storage inductor and the parallel inductor.
And obtaining the inductance value of the transformer excitation inductance L m according to an inductance parallel formula.
Based on the inductance parameters, the power factor correction condition of the input side and the output voltage waveform of the circuit are shown in fig. 6, and the simulation result shows that the input current of the circuit is sine wave with the same phase with the alternating voltage, and the power factor correction effect is good; the two output filter capacitors can realize voltage equalizing and output voltage stabilization. The voltage stress conditions of the two groups of bidirectional switching tubes are shown in fig. 7, the voltage stress of the circuit switching tube is 193V under the conditions of 100V effective value alternating current input and 100V direct current output, the voltage stress is basically the same as the theoretical value V ac_max+nVdc/2, and the circuit realizes lower device stress under higher output voltage.
Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the different dependent claims and the features described herein may be combined in ways other than as described in the original claims. It is also to be understood that features described in connection with separate embodiments may be used in other described embodiments.

Claims (8)

1. The single-stage bridgeless isolation type Zeta type power factor correction circuit is characterized by comprising an input filter inductor L f, an input filter capacitor C f, a transformer T, an energy storage capacitor C, an energy storage inductor L, an output filter capacitor C dc1, an output filter capacitor C dc2, a No. 1 bidirectional switch and a No. 2 bidirectional switch;
The positive electrode of the input power supply is connected with one end of an input filter inductor L f, the other end of the input filter inductor L f is simultaneously connected with one end of a No. 1 bidirectional switch and one end of an input filter capacitor C f, the other end of the No. 1 bidirectional switch is connected with the homonymous end of the primary side of the transformer T, and the negative electrode of the input power supply and the other end of the input filter capacitor C f are simultaneously connected with the heteronymous end of the primary side of the transformer T;
the same-name end of the secondary side of the transformer T is connected with one end of an energy storage capacitor C, the other end of the energy storage capacitor C is simultaneously connected with one end of a No. 2 bidirectional switch and one end of an energy storage inductor L, and the other end of the energy storage inductor L is simultaneously connected with the anode of a diode D 1 and the cathode of a diode D 2;
The synonym end of the secondary side of the transformer T, the other end of the No. 2 bidirectional switch, the negative electrode of the output filter capacitor C dc1 and the positive electrode of the output filter capacitor C dc2 are connected at the same time;
The cathode of the diode D 1 is connected to the anode of the output filter capacitor C dc1, and the anode of the diode D 2 is connected to the cathode of the output filter capacitor C dc2.
2. The single-stage bridgeless isolated Zeta-type power factor correction circuit of claim 1, wherein the circuit operates in an intermittent conduction mode.
3. The single-stage bridgeless isolated Zeta-type power factor correction circuit according to claim 2, wherein the parallel inductance value of the excitation inductance L m and the energy storage inductance L of the transformer T is L eq:
Where P ac is the input power, T S is the switching period, d is the duty cycle, and V ac_max is the peak of the AC input voltage.
4. A single-stage bridgeless isolated Zeta-type power factor correction circuit according to claim 3, wherein the value of the energy storage inductance L is:
Where α is the ripple coefficient of the input current.
5. The single-stage bridgeless isolated Zeta-type power factor correction circuit according to claim 3 or 4, wherein the maximum duty cycle d max:
Wherein, the transformation ratio of the transformer T is n:1, v dc is the load voltage.
6. The single-stage bridgeless isolated Zeta-type power factor correction circuit according to claim 4, wherein the excitation inductance L m:
7. The single-stage bridgeless isolated Zeta-type power factor correction circuit of claim 2, wherein the maximum voltage stress V S1/S2_max experienced by the No. 1 bi-directional switch is:
VS1/S2_max＝Vac_max+nVdc/2
Wherein V ac_max is the peak value of the ac input voltage, and the transformation ratio of the transformer T is n:1, v dc is the load voltage.
8. The single-stage bridgeless isolated Zeta-type power factor correction circuit of claim 2, wherein the maximum voltage stress V S3/S4_max experienced by the No. 1 bi-directional switch is:
VS3/S4_max＝Vac_max+nVdc/2
Wherein V ac_max is the peak value of the ac input voltage, and the transformation ratio of the transformer T is n:1, v dc is the load voltage.
CN202311056930.4A 2023-08-21 2023-08-21 Single-stage bridgeless isolated Zeta type power factor correction circuit Active CN117060709B (en)

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