CN116830811A

CN116830811A - Component carrier comprising identification marks

Info

Publication number: CN116830811A
Application number: CN202280016402.3A
Authority: CN
Inventors: 陈俊杰; 王琦玮
Original assignee: AT&S Chongqing Co Ltd
Current assignee: AT&S Chongqing Co Ltd
Priority date: 2021-01-28
Filing date: 2022-01-12
Publication date: 2023-09-29
Also published as: JP2024504747A; CN215735031U; WO2022161174A1; TWM631709U

Abstract

The component carrier comprises a stack having at least four electrically insulating layer structures and at least five electrically conductive layer structures stacked on top of each other in an alternating manner along a stacking direction, wherein one of the electrically conductive layer structures forms a first outer electrically conductive layer of the stack and the other of the electrically conductive layer structures forms a second outer electrically conductive layer of the stack, and wherein the first outer electrically conductive layer and the second outer electrically conductive layer are opposite outer layers of the stack. The component carrier further comprises: a first identification mark detectable by the detecting means, wherein the first identification mark is formed in an electrically conductive layer structure arranged closest to the first outer electrically conductive layer; and a second identification mark detectable by the detection means, wherein the second identification mark is formed in the electrically conductive layer structure arranged closest to the second outer electrically conductive layer. The first identification mark and the second identification mark are formed one above the other in the stacking direction.

Description

Component carrier comprising identification marks

Cross Reference to Related Applications

The present utility model claims priority to application CN 202120247645.0 filed on 1 month 28 of 2021, the entire disclosure of which is incorporated herein by reference.

Technical Field

The present application relates to a component carrier comprising an identification mark.

Background

With increasing product functions of component carriers equipped with one or more components, with progressive miniaturization of these components and with increasing numbers of components to be connected to component carriers such as printed circuit boards or the like, increasingly powerful array-like components or packages with a plurality of components are employed, which have a plurality of contacts or connections, wherein the spacing between the contacts is increasingly smaller. In particular, the component carrier should be mechanically strong and electrically reliable to be able to operate even under severe conditions. More and more functions are integrated in component carriers.

During the manufacture of complex component carriers such as Printed Circuit Boards (PCBs), it is important that the component carriers be aligned and oriented in a precise and accurate manner. In order to align the component carrier, identification marks may be formed within the layer structure of the component carrier. The identification marks may be measured by corresponding detection means, such as an X-ray detector or the like, wherein based on the measured images of the identification marks, a corresponding alignment of the component carrier may be determined.

However, if the respective layer including the identification mark is covered by a plurality of additional layers during the manufacturing process, the image of the identification mark (e.g., contrast and contours in the image of the identification mark) becomes increasingly uncertain.

It may therefore be desirable to provide an identification mark that can be correctly determined by the detection device to provide correct alignment of the component carrier.

Disclosure of Invention

According to an exemplary embodiment of the present application, a component carrier is described. The component carrier comprises a stack comprising at least four electrically insulating layer structures and at least five electrically conducting layer structures, which are stacked on top of each other in an alternating manner along a stacking direction. One of the electrically conductive layer structures forms a first outer electrically conductive layer of the stack and the other of the electrically conductive layer structures forms a second outer electrically conductive layer of the stack, wherein the first outer electrically conductive layer and the second outer electrically conductive layer are opposite outer layers of the stack.

The component carrier further comprises a first identification mark detectable by the detection means, wherein the first identification mark is formed in the electrically conductive layer structure. In an exemplary embodiment, the first identification mark is formed in the electrically conductive layer structure arranged closest to the first outer electrically conductive layer, and the second identification mark is detectable by the detection means, wherein the second identification mark is formed in the electrically conductive layer structure. In an exemplary embodiment, the second identification mark is formed in an electrically conductive layer structure disposed closest to the second outer electrically conductive layer. The first identification mark and the second identification mark are formed one above the other in the stacking direction.

According to an exemplary embodiment of the present application, a method for manufacturing the above-described component carrier is described. The electrically insulating layer structure and the at least five electrically conducting layer structures are stacked on top of each other in an alternating manner along the stacking direction such that one of the electrically conducting layer structures forms a first outer electrically conducting layer of the stack and the other of the electrically conducting layer structures forms a second outer electrically conducting layer of the stack, wherein the first outer electrically conducting layer and the second outer electrically conducting layer are opposite outer layers of the stack. Further, a first identification mark that can be detected by the detection means is formed in the electrically conductive layer structure. In an exemplary embodiment, the first identification mark is formed in an electrically conductive layer structure disposed closest to the first outer electrically conductive layer. A second identification mark that can be detected by the detection means is formed in the electrically conductive layer structure. In an exemplary embodiment, the second identification mark is formed in an electrically conductive layer structure disposed closest to the second outer electrically conductive layer. The first identification mark and the second identification mark are formed one above the other in the stacking direction.

In the context of the present application, the term "component carrier" may particularly denote any support structure on and/or in which one or more components can be accommodated to provide mechanical support and/or electrical connection. In other words, the component carrier may be configured as a mechanical and/or electrical carrier for the component. In particular, the component carrier may be one of a printed circuit board, an organic interposer, a metal core substrate, an inorganic substrate, and an IC (integrated circuit) substrate. The component carrier may also be a hybrid plate combining different ones of the above-mentioned types of component carriers.

In the context of the present application, the term "component carrier material" may particularly denote one or more electrically insulating layer structures and/or a connection arrangement of one or more electrically conducting layer structures used in component carrier technology. More specifically, such component carrier material may be a material for a Printed Circuit Board (PCB) or an IC substrate. In particular, the electrically conductive material of such component carrier material may comprise copper. The electrically insulating material of the component carrier material may comprise a resin, in particular an epoxy resin, optionally in combination with reinforcing particles such as glass fibres or glass spheres.

In an embodiment, the component carrier is a laminate type component carrier. In such embodiments, the component carrier is a compound of a multi-layered structure that is stacked and joined together by application of pressure and/or heat.

In an embodiment, the at least one electrically insulating layer structure comprises at least one of: resins or polymers such as epoxy resins, cyanate resins, benzocyclobutene resins, amine triazine resins, polyphenylene derivatives (e.g., based on polyphenylene ether, PPE), polyimide (PI), polyamide (PA), liquid Crystal Polymers (LCP), polytetrafluoroethylene (PTFE), and/or combinations thereof. Reinforcing structures such as meshes, fibers, spheres or other types of filler particles made, for example, of glass (multiple layer glass) to form composites may also be used. A semi-cured resin, for example, a fiber impregnated with the above resin, combined with a reinforcing agent is called a prepreg. These prepregs are generally named for their properties, for example FR4 or FR5, which describe the flame resistance properties of the prepreg. While prepregs, particularly FR4, are generally preferred for rigid PCBs, other materials, particularly epoxy-based laminates (such as laminates) or photoimageable dielectric materials, may also be used. For high frequency applications, high frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and/or cyanate resins may be preferred. In addition to these polymers, low temperature co-fired ceramics (LTCCs) or other low DK materials, very low or ultra low DK materials may be implemented as electrically insulating layer structures in component carriers.

In an embodiment, the at least one electrically conductive layer structure comprises at least one of copper, aluminum, nickel, silver, gold, palladium, tungsten, and magnesium. Although copper is generally preferred, other materials or other types of coating thereof are also possible, in particular materials coated with a superconducting material or conducting polymer such as graphene or poly (3, 4-ethylenedioxythiophene) (PEDOT), respectively.

The first identification mark and the second identification mark are formed one above the other in the stacking direction. Thus, the stack may be formed of a plurality of electrically insulating layer structures and a plurality of electrically conductive layer structures, wherein respective identification marks are formed in the spaced apart electrically conductive layer structures of the stack. If the first identification mark and the second identification mark are formed one above the other in the stacking direction, an appropriate image of the alignment of the identification marks taken by the detection device can be provided. In other words, the first identification mark and the second identification mark are formed such that: the identification mark and the further identification mark completely overlap each other on a projection plane having a projection normal parallel to the stacking direction.

The identification mark is formed in one of the electrically conductive layer structures. Specifically, by the present method, the identification marks are formed in the electrically conductive layer structures closest to the external electrically conductive layer, respectively, of the electrically conductive layer structures. Therefore, the (e.g., X-ray) detection device more easily detects the peripheral shape and orientation of the identification mark, respectively.

According to an exemplary embodiment, at least one of the first identification mark and the second identification mark comprises an inner volume portion, which is free of material of the electrically conductive layer structure. For example, the interior volume of the identification mark is hollow and, for example, free of copper. In an exemplary embodiment, the interior volume of the identification mark is filled with an electrically insulating material. The electrically insulating material may be similar to an electrically insulating layer structure laminated on top of a corresponding electrically conducting layer structure, for example polypropylene (PP).

According to an exemplary embodiment, the identification mark comprises a triangular shape. By providing a triangular shape, it is easier to detect the orientation and alignment of the identification mark and, correspondingly, of the component carrier.

According to a further exemplary embodiment, the identification mark comprises an arrow shape. By providing an arrow shape, it is easier to detect the orientation and alignment of the identification mark and accordingly of the component carrier.

According to a further exemplary embodiment, the identification mark comprises three identification points forming a triangular shape, wherein each identification point comprises an inner volume free of electrically conductive material. The orientation of the identification mark is also possible by providing, for example, hollow points or contours (circular, oval or rectangular) which are arranged relative to each other such that a specific direction can be determined. For example, three recognition points may be formed at corners of a virtual triangle.

According to a further exemplary embodiment, the identification mark is formed at an edge portion of one of the electrically conductive layer structures.

According to a further exemplary embodiment, the identification mark is formed at a corner portion of one of the electrically conductive layer structures.

According to a further exemplary embodiment, the first identification mark and the second identification mark comprise the same peripheral shape. For example, both the identification marks have a triangular shape or an arrow shape, and in particular, the first identification mark and the second identification mark have a triangular shape or an arrow shape.

According to a further exemplary embodiment, the second identification mark is filled with an electrically conductive material. For example, the second identifying indicia includes only a circumferential extension or path that is devoid of electrically conductive material. Therefore, the detection device detects only the circumferential path of the identification mark. However, since the second identification mark and the above identification mark of the internal volume portion without the electrically conductive material are formed one above the other, the corresponding overlapping and matching of the two identification marks on the image taken from the detection device can be detected.

According to a further exemplary embodiment, the second identification mark comprises an inner volume free of electrically conductive material.

According to a further exemplary embodiment, the component carrier further comprises a detachable core layer, wherein the detachable core layer is arranged in a detachable manner between the at least one electrically insulating layer structure and the at least one electrically conducting layer structure on one side and the at least one further electrically insulating layer structure and the at least one further electrically conducting layer structure on the other side.

Thus, on opposite sides of the disassembled core, the respective stacks with the electrically conductive layer structure and the electrically insulating layer structure may be formed in layered form. In the respective electrically conductive layer structures arranged on opposite sides of the detached core layer, a first identification mark and a second identification mark may be arranged. After the respective overlapping portions on both sides of the disassembled core are formed, the disassembled core may be removed (e.g., by applying heat or chemical solutions) so that the two overlapping portions may be formed in a common manufacturing/lamination step, respectively. By forming the first and second identification marks, the orientation of the respective component carrier can be detected before the removal of the disassembly core layer and after the removal of the disassembly core layer.

In an embodiment, the first identification mark is arranged closest to the first outer electrically conductive layer and/or the second identification mark is arranged closest to the second outer electrically conductive layer.

In an embodiment, the component carrier further comprises: additional first identification indicia and/or additional second identification indicia are formed in each of the other electrically-conductive layer structures except the first and second electrically-conductive layers.

In an embodiment, the component carrier further comprises: a further identification mark detectable by the detection means, wherein the further identification mark is formed in a respective electrically conductive layer structure arranged closest to the first or second outer electrically conductive layer.

In an embodiment, the stack comprises a mirror plane parallel to the stacking direction, wherein the further identification mark is arranged at an opposite side with respect to the first identification mark with respect to the mirror plane.

In an embodiment, the stack comprises a mirror plane parallel to the stacking direction, wherein the further identification mark is arranged at the same side with respect to the second identification mark with respect to the mirror plane.

In an embodiment, the further identification mark comprises an interior volume free of electrically conductive material.

In an embodiment, a further identification mark is formed in each of the other electrically conductive layer structures than the first and second outer electrically conductive layers.

In an embodiment, the further identification mark comprises a triangular shape.

In an embodiment, the further identifying indicia comprises an arrow shape.

In an embodiment, the further identification mark comprises three identification points forming a triangular shape, each identification point comprising an inner volume free of electrically conductive material.

In an embodiment, the further identification mark is formed at an edge portion of one of the electrically conductive layer structures.

In an embodiment, the further identification mark is formed at a corner portion of the electrically conductive layer structure.

In an embodiment, the further identification mark, the first identification mark and/or the second identification mark comprise the same peripheral shape.

In an embodiment, the further identification mark is filled with an electrically conductive material.

In an embodiment, the component carrier is shaped as a plate. This contributes to a compact design, wherein the component carrier nevertheless provides a large base for the mounting components on the component carrier. Further, in particular, a bare wafer, which is an example of an embedded electronic component, can be conveniently embedded in a thin plate such as a printed circuit board or the like due to its small thickness.

In an embodiment, the component carrier is configured as one of a printed circuit board, a substrate (in particular an IC substrate) and an interposer.

In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a board-like component carrier formed by laminating a plurality of electrically conductive layer structures with a plurality of electrically insulating layer structures, e.g. by applying pressure and/or supplying thermal energy. As a preferred material for PCB technology, the electrically conductive layer structure is made of copper, whereas the electrically insulating layer structure may comprise resin and/or glass fibres, so-called prepreg or FR4 material. The individual electrically conductive layer structures may be connected to each other in a desired manner by forming a via through the laminate, for example by laser drilling or mechanical drilling, and by filling the via with an electrically conductive material, in particular copper, thereby forming a via or any other via connection. The filled holes connect the entire stack (through-hole connections extending through the layers or the entire stack), or the filled holes connect at least two electrically conductive layers, which holes are called vias. Similarly, optical interconnects may be formed through the various layers of the stack to receive an electro-optic circuit board (EOCB). In addition to one or more components that may be embedded in a printed circuit board, the printed circuit board is typically configured to house the one or more components on one or both opposing surfaces of the board-like printed circuit board. One or more components may be connected to the respective major surfaces by welding. The dielectric portion of the PCB may include a resin with reinforcing fibers, such as fiberglass.

In the context of the present application, the term "substrate" may particularly denote a small component carrier. The substrate may be a relatively small component carrier with respect to the PCB, on which one or more components may be mounted, and which may serve as a connection medium between one or more chips and the further PCB. For example, the substrate may have substantially the same dimensions as the components (particularly electronic components) to be mounted on the substrate (e.g., in the case of a Chip Scale Package (CSP)). More specifically, a substrate may be understood as a carrier for an electrical connector or electrical network as well as a component carrier comparable to a Printed Circuit Board (PCB) but having a rather high density of laterally and/or vertically arranged connectors. The transverse connection is for example a conductive channel, while the vertical connection may be for example a borehole. These lateral and/or vertical connections are arranged within the base plate and may be used to provide electrical, thermal and/or mechanical connection of the accommodated components or the non-accommodated components, such as bare wafers, in particular IC chips, to a printed circuit board or an intermediate printed circuit board. Thus, the term "substrate" also includes "IC substrate". The dielectric portion of the substrate may comprise a resin with reinforcing particles, such as reinforcing spheres, particularly glass spheres.

The substrate or interposer may include or consist of: at least one layer of glass, silicon (Si), and/or photoimageable or dry etchable organic material, such as an epoxy-based laminate material (e.g., an epoxy-based laminate film), or a polymer compound (which may or may not include photosensitive and/or thermosensitive molecules), such as polyimide or polybenzoxazole.

At least one component may be embedded in the stack and/or may be surface mounted on the stack. Such components may be selected from non-electrically conductive inlays, point-knife inlays (such as metal inlays, preferably comprising copper or aluminum), heat transfer units (e.g., heat pipes), light guiding elements (e.g., optical waveguides or optical conductor connectors), electronic components, or combinations thereof. The inlay may be, for example, a metal block (IMS inlay) with or without a coating of insulating material, which inlay may be embedded or surface mounted to facilitate heat dissipation. Suitable materials are defined in terms of their thermal conductivity, which should be at least 2W/mK. Such materials are typically based on, but are not limited to, metals, metal oxides and/or ceramics, such as copper, aluminum oxide (Al 2O 3) or aluminum nitride (AlN). Other geometries with increased surface area are also often used in order to increase heat exchange capacity. Furthermore, the components may be active electronic components (with at least one p-n junction implemented), passive electronic components such as resistors, inductors or capacitors, electronic chips, memory devices (e.g., DRAM or another data storage device), filters, integrated circuits (e.g., field Programmable Gate Array (FPGA), programmable Array Logic (PAL), general purpose array logic (GAL), and Complex Programmable Logic Devices (CPLD)), signal processing components, power management components (such as Field Effect Transistors (FETs), metal Oxide Semiconductor Field Effect Transistors (MOSFETs), complementary Metal Oxide Semiconductors (CMOS), junction Field Effect Transistors (JFETs), or Insulated Gate Field Effect Transistors (IGFETs), all based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga 2O 3), indium gallium arsenide (InGaAs), and/or any other suitable inorganic compound), photo-interface elements, light emitting diodes, photo-couplers, voltage converters (e.g., DC/DC or AC/DC converters), cryptographic components, transmitters and receivers, electromechanical sensors, switches, micro-electromechanical sensors, micro-electromechanical devices, switches, micro-processors, charge-controllers, charge-trapping devices, micro-controllers, and power converters, micro-processors, charge-controllers, and power switches. However, other components may be embedded in the component carrier. For example, a magnetic element may be used as the member. Such magnetic elements may be permanent magnetic elements (such as ferromagnetic elements, antiferromagnetic elements, multiferroic elements or ferrimagnetic elements, e.g. ferrite cores), or may be paramagnetic elements. However, the component may also be an IC substrate, interposer or another component carrier, for example in the form of a board-in-board. The component may be surface mounted on the component carrier and/or may be embedded in the component carrier. In addition, other components may be used as components, particularly those that generate and emit electromagnetic radiation and/or are sensitive to electromagnetic radiation propagating from the environment.

After the treatment of the inner layer structure of the component carrier, one main surface or the opposite main surfaces of the treated layer structure may be symmetrically or asymmetrically covered (in particular by lamination) with one or more further electrically insulating layer structures and/or electrically conductive layer structures. In other words, lamination may be continued until the desired number of layers is obtained.

After the formation of the stack of electrically insulating layer structures and electrically conducting layer structures has been completed, a surface treatment of the obtained layer structure or component carrier may be performed.

In particular, in terms of surface treatment, an electrically insulating solder resist may be applied to one major surface or the opposite two major surfaces of the layer stack or component carrier. For example, the solder resist may be formed over the entire major surface and the solder resist layer then patterned to expose one or more electrically conductive surface portions that will serve to electrically couple the component carrier to the electronic periphery. The surface portion of the component carrier that remains covered with the solder resist is effectively protected from oxidation or corrosion, and in particular, the surface portion containing copper can be effectively protected from oxidation or corrosion.

With respect to the surface treatment, a surface finish may also be selectively applied to the exposed electrically conductive surface portions of the component carrier. Such surface modifications may be electrically conductive covering materials on exposed electrically conductive layer structures (such as pads, conductive traces, etc., including or consisting of copper in particular) on the surface of the component carrier. Without protecting such exposed electrically conductive layer structures, the exposed electrically conductive component carrier material (particularly copper) may oxidize, thereby making the component carrier less reliable. The resurfacing portion may then be formed, for example, as a junction between a surface mounted component and a component carrier. The surface modifying portion has the function of protecting the exposed electrically conductive layer structure, in particular the copper circuit, and of effecting the bonding process with one or more components, for example by soldering. Examples of suitable materials for the surface modifying portion are Organic Solderability Preservative (OSP), electroless Nickel Immersion Gold (ENIG), electroless Nickel Immersion Palladium Immersion Gold (ENIPIG), gold (particularly hard gold), electroless tin, nickel gold, nickel palladium, and the like.

The above-defined aspects and other aspects of the present invention are apparent from and are explained with reference to examples of embodiment to be described hereinafter.

Drawings

Fig. 1 shows a schematic view of a conventional component carrier with conventional identification marks.

Fig. 2 shows a schematic view of a component carrier comprising a disassembled core and identification marks according to an exemplary embodiment.

Fig. 3 shows a schematic view of a component carrier comprising three identification marks according to an exemplary embodiment.

Fig. 4 shows a schematic view of a component carrier according to an exemplary embodiment comprising three identification marks arranged one above the other along the stacking direction.

Fig. 5 shows a schematic diagram of an arrow-shaped identification mark according to an exemplary embodiment.

Fig. 6 shows a schematic diagram of an identification mark formed of three dots according to an exemplary embodiment.

Detailed Description

The illustrations in the figures are schematic. In the different drawings, similar or identical elements are provided with the same reference numerals.

Fig. 1 shows a schematic view of a conventional component carrier 1000 with conventional identification marks 1001, 1002.

The conventional component carrier 1000 comprises a stack 101 with an electrically insulating layer structure 102 and electrically conducting layer structures 103, 16, which electrically conducting layer structures 103, 106 are made of an electrically conducting material, the electrically insulating layer structure 102 and the electrically conducting layer structures 103, 106 being stacked on top of each other in an alternating manner along a stacking direction 104.

The conventional identification mark 1001 is formed in a triangular shape in the electrically conductive layer structure 103 (upper layer L6, internal pattern mirror image). Additional conventional identification marks 1002 are formed in the electrically conductive layer structure 106 (lower layer L6) in a triangular shape. The identification marks 1001, 1002 are filled with an electrically conductive material. The two conventional identification marks 1001, 1002 are not arranged one above the other in the stacking direction 104 and have an offset with respect to one another in the stacking direction 104. In addition, the conventional identification marks 1001, 1002 are mirror images and have the same pattern in the upper layer L6 and the lower layer L6. The (e.g., X-ray) detection means take respective images 110 and detect the peripheral shape and orientation of the identification mark 107, respectively.

The outer covered electrically conductive layer structure 103, 106 (L7) may be a carrier copper foil, which may have a thickness between 3 μm and 18 μm. This will affect the contrast in the image 110 of the detection device (e.g. x-ray detection device) due to the thick outer covered electrically conductive layer structure 103, 106 (L7). Even by adjusting the X-ray source and contrast, both sides of the triangular identification marks 1001, 1002 pointing in different directions before the core is disassembled will affect the direction identification in the respective image 110.

Fig. 2 shows a schematic view of a component carrier 100 comprising a detachable core layer 109 and identification marks 107, 108 according to an exemplary embodiment.

The component carrier 100 comprises a stack 101, which stack 101 has four electrically insulating layer structures 102 and at least one electrically conducting layer structure 103, 106, the electrically conducting layer structures 103, 106 being made of an electrically conducting material, the four electrically insulating layer structures 102 and the at least one electrically conducting layer structure 103, 106 being stacked on top of each other in an alternating manner along the stacking direction. One of the electrically conductive layer structures 103, 106 forms a first outer electrically conductive layer 111 of the stack 101 and the other of the electrically conductive layer structures 103, 106 forms a second outer electrically conductive layer 112 of the stack 101, wherein the first outer electrically conductive layer 111 and the second outer electrically conductive layer 112 are opposite outer layers of the stack 101. A first identification mark 107 is formed which can be detected by the detection means. The first identification mark 107 is formed in the electrically conductive layer structure 103 arranged closest to the first outer electrically conductive layer 111. Additionally, additional first identifying indicia 107 and/or second identifying indicia 108 may also be formed in each of the other electrically-conductive layer structures 103, 106 in addition to the outer electrically-conductive layers 111, 112.

Further, a second identification mark 108 is formed which is detectable by the detection means, wherein the second identification mark 108 is formed in the electrically conductive layer structure 106 arranged closest to the second outer electrically conductive layer 112. The first identification mark 107 and the second identification mark 108 are formed one above the other along the stacking direction 104.

The first identification mark 107 and/or the second identification mark 108 comprise an inner volume that is free of electrically conductive material. The identification marks 107, 108 extend along the plane of the respective electrically conductive layer structure 103, 106 and comprise respective normals parallel to the normals of the plane of the respective electrically conductive layer structure 103, 106.

In order to show the shape of the identification marks 107, 108 in the figure, the identification marks 107, 108 in the figure are shown inclined by 90 °. Further, the electrically conductive layers 103, 106 are denoted by layer numbers L4 to L8.

The identification marks 107, 108 are formed in at least one of the electrically conductive layer structures 103, 106 (layer L6, inner pattern mirror image) closest to the outer electrically conductive layers 111, 112, respectively. Specifically, for example, the identification mark 107 includes an internal volume portion that is free of the material of the electrically conductive layer structure. For example, the interior volume of the identification mark 107 is hollow and, for example, free of copper. The electrically insulating material may be similar to the electrically insulating layer structure 102, which electrically insulating layer structure 102 is laminated on top of the respective electrically conducting layer structure 103. The (e.g. X-ray) detection means take respective images 110 and detect the peripheral shape and orientation of the identification mark 107, respectively.

The covered electrically conductive layer structure 103, 106 (L7) may be a copper foil, which may have a thickness between 3 μm and 18 μm.

The first identification mark 107 and the second identification mark 108 are formed one above the other in the stacking direction 104. Thus, the stack 101 may be formed of a plurality of electrically insulating layer structures 102, 105 and a plurality of electrically conducting layer structures 103, 106, wherein in the spaced apart electrically conducting layer structures 103, 106 of the stack 101 respective identification marks 107, 108 are formed. If the first identification mark 107 and the second identification mark 108 are formed one above the other in the stacking direction 104, an aligned suitable image 110 of the identification marks 107, 108 taken by the detection means may be provided.

In the example shown, the identification marks 107, 108 comprise the same triangular shape. In other words, the first identification mark 107 and the second identification mark 108 are formed such that: the first identification mark 107 and the second identification mark 108 completely overlap each other on a projection plane having a projection normal line parallel to the stacking direction 104.

The component carrier 100 further comprises a detachable core layer 109, wherein the detachable core layer 109 is detachably arranged between the central electrically conductive layer structure 103 (L5) on one side and the further electrically conductive layer structure 106 (L5) on the other side. On opposite sides of the disassembled core 109, the respective stacked portions of the stack 101 made of the electrically conductive layer structures 103, 106 and the electrically insulating layer structures 102, 105 may be formed in a layered manner. In the respective electrically conductive layer structures 103, 106 arranged on opposite sides of the release core layer 109, a first identification mark 107 and a second identification mark 108 are formed. After the respective overlapping portions on both sides of the disassembled core 109 are formed, the disassembled core 109 may be removed so that two overlapping portions may be formed in the same manufacturing/lamination step. By forming the identification marks 107, 108, the orientation of the respective component carrier 100 can be detected before removal of the disassembly core 109 and after removal of the disassembly core 109.

In fig. 2, the three electrically conductive layer structures 103, 106 (L5, L6 and L7) are copper layers. The identification marks 107, 108 are formed in the conductive layer structure L6, because in these layer structures L6, the pattern processing is completed, and the identification marks 107, 108 can be formed in such corresponding pattern processing. In the conductive layer structure 103, 106, i.e. L5, and the top outer electrically conductive layer 111, 112, i.e. L7, closest to the detached core layer 109, no patterning is done before detachment from the detached core layer 109.

Fig. 3 shows a schematic view of a component carrier 100 comprising three identification marks 107, 301 according to an exemplary embodiment. The stack 101 including the conductive layer structures L5, L6, and L7 is an inverted stack portion of the upper portion of the stack 101 in fig. 2. This first identification mark 107 is identical to the first identification mark 107 in fig. 2, the first identification mark 107 in fig. 2 may be formed in the electrically conductive layer structure 103 (L6) before the electrically conductive layer structure 103 (L6) is detached from the detachment core layer 109, while the third identification mark 301 in fig. 3 is an additional mark formed in the electrically conductive layer structures L5 and L7 after the electrically conductive layer structures L5 and L7 are detached from the detachment core layer 109. The third identification marks 301 may have the same contour, for example, a triangular contour, and the third identification marks 301 are formed one above the other in the stacking direction 104, the third identification marks being similar to the first identification marks 107 and the second identification marks 108 shown in fig. 2. The stack 101 comprises a mirror plane 201 parallel to the stacking direction 104, wherein the further identification mark 301 is arranged at an opposite side with respect to the first identification mark 107 with respect to the mirror plane 201.

The component carrier 100 shown in fig. 3 may be formed by laminating a further electrically insulating layer structure 102, 105 and a further outer electrically conductive layer 302 (L4, L8) on top of the outer electrically conductive layer 111 (L5, L7). The identification mark 107 is arranged on the right side due to the flip of the upper stack portion in fig. 2, and the identification mark 107 is still now formed in the center of the stack 101 in the electrically conductive layer structure 103 (L6). Thus, although the central identification mark 107 is hardly visible in the image 110 of the detection device, additional further identification marks 301 are formed in the electrically conductive layer structures 103, 106 (L5, L7), which electrically conductive layer structures 103, 106 (L5, L7) are arranged closest to the further outer electrically conductive layer 302 (L4, L8) and thus closest to the surface of the stack 101. Thus, the shape of the further identification mark 301 can be clearly displayed in the image 110 of the detection device. The further identification mark 301 may have an inner volume without electrically conductive material. In addition, additional identification indicia 301 may also be formed in each of the other electrically-conductive layer structures 103, 106 in addition to the outer electrically-conductive layers 111, 112.

Fig. 4 shows a schematic view of a component carrier according to an exemplary embodiment comprising three identification marks 108, 301, which identification marks 108, 301 are arranged one above the other along the stacking direction 104. The component carrier 100 shown in fig. 4 may be formed by laminating a further electrically insulating layer structure 102, 105 and a further outer electrically conductive layer 302 (L4, L8) on top of the outer electrically conductive layer 112 (L5, L7).

The stack 101 including the conductive layer structures L5, L6, and L7 is a stacked portion of the lower portion of the stack 101 in fig. 2. The second identification mark 108 is the same as the second identification mark 108 in fig. 2, the second identification mark 108 in fig. 2 may be formed in the electrically conductive layer structure 103 (L6) before the electrically conductive layer structure 103 (L6) is detached from the detached core layer 109, and the third identification mark 301 in fig. 4 is an additional mark formed in the electrically conductive layer structures L5 and L7 after the electrically conductive layer structures L5 and L7 are detached from the detached core layer 109. The third identification marks 301 may have the same contour, for example, a triangle contour, and the third identification marks 301 are formed one above the other along the stacking direction and are similar to the first identification marks 107 and the second identification marks 108 shown in fig. 2. The stack 101 comprises a mirror plane 201 parallel to the stacking direction 104, wherein the further identification mark 301 is arranged on the same side with respect to the second identification mark 108 with respect to the mirror plane 201. Further, additional identification marks 301 may also be formed in each of the other electrically conductive layer structures 103, 106 in addition to the outer electrically conductive layers 111, 112.

Since the second identification mark 108 and the third identification mark 301 having an inner volume without electrically conductive material are formed one above the other, a corresponding overlap and matching of all identification marks 108, 301 on the image 110 taken by the detection means can be detected.

Fig. 5 shows a schematic view of an arrow-shaped first identification mark 107 according to an exemplary embodiment. The first identification mark 107 includes an arrow shape. The second identification mark 108 and the third identification mark 301 may also have corresponding shapes.

Fig. 6 shows a schematic diagram of an identification mark 107 formed of three points according to an exemplary embodiment. The three identification points form a triangular shape, wherein each identification point comprises an interior volume portion that is free of electrically conductive material. For example, three identification points may be formed at corners of the virtual triangle to form the identification mark 107. The second identification mark 108 and the third identification mark 301 may also have corresponding shapes.

It should be noted that the term "comprising" does not exclude other elements or steps and the "a" or "an" does not exclude a plurality. Furthermore, elements described in association with different embodiments may be combined.

It should also be noted that reference signs in the claims shall not be construed as limiting the scope of the claims.

The form of realisation of the application is not limited to the preferred embodiments shown in the drawings and described above. Rather, various modifications can be made using the solutions shown and according to the principles of the application, even in the case of radically different embodiments.

List of reference numerals:

100 component carrier

101 stack

102 electrical insulation layer structure

103 electrically conductive layer structure

104 stacking direction

105 further electrically insulating layer structure

106 further electrically conductive layer structure

107 identification mark

108 second identification mark

109 removing core layer

110X-ray image

111 first external electrically conductive layer

112 a second external electrically conductive layer

201 mirror plane

301 third identification mark, further identification mark

302 an additional external electrically conductive layer.

Claims

1. A component carrier, characterized in that the component carrier (100) comprises:

a stack (101), the stack (101) having at least four electrically insulating layer structures (102) and at least five electrically conducting layer structures (103, 106), the electrically insulating layer structures (102) and the electrically conducting layer structures (103, 106) being stacked on top of each other in an alternating manner along a stacking direction (104),

wherein one of the electrically conductive layer structures (103, 106) forms a first outer electrically conductive layer (111) of the stack (101) and the other of the electrically conductive layer structures (103, 106) forms a second outer electrically conductive layer (112) of the stack (101),

wherein the first outer electrically conductive layer (111) and the second outer electrically conductive layer (112) are opposite outer layers of the stack (101),

A first identification mark (107), said first identification mark (107) being detectable by a detection means,

wherein the first identification mark (107) is formed in the electrically conductive layer structure (103, 106),

a second identification mark (108), said second identification mark (108) being detectable by a detection means,

wherein the second identification mark (108) is formed in the electrically conductive layer structure (103, 106),

wherein the first identification mark (107) and the second identification mark (108) are formed one above the other in the stacking direction (104).

2. The component carrier of claim 1, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) comprises an interior volume free of electrically conductive material.

3. The component carrier of claim 2, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) comprises a triangular shape.

4. The component carrier of claim 2, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) comprises an arrow shape.

5. The component carrier of claim 2, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) comprises three identification points forming a triangular shape,

wherein each identification point comprises an interior volume that is free of electrically conductive material.

6. The component carrier of claim 2, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) is formed at an edge portion of one of the electrically conductive layer structures.

7. The component carrier of claim 2, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) is formed at a corner portion of one of the electrically conductive layer structures.

8. The component carrier of claim 1, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) and the second identification mark (108) comprise the same peripheral shape.

9. The component carrier of claim 1, wherein the component carrier comprises a plurality of support members,

the second identification mark (108) is filled with an electrically conductive material.

10. The component carrier of claim 9,

wherein the second identifying mark (108) comprises only a peripheral path free of electrically conductive material.

11. The component carrier of claim 1, wherein the component carrier comprises a plurality of support members,

the second identifying mark (108) comprises an interior volume free of electrically conductive material.

12. The component carrier according to claim 1, wherein the component carrier (100) further comprises:

the core layer (109) is disassembled,

wherein the detachable core layer (109) is detachably arranged between at least one of the electrically insulating layer structures (102) and at least one of the electrically conductive layer structures on one side and at least one further electrically insulating layer structure (105) and at least one further electrically conductive layer structure on the other side.

13. The component carrier of claim 1, wherein the component carrier comprises a plurality of support members,

the first identification mark (107) is arranged closest to the first external electrically conductive layer (111), and/or

The second identification mark (108) is arranged closest to the second outer electrically conductive layer (112).

14. The component carrier according to claim 1, wherein the component carrier (100) further comprises:

a further first identification mark and/or a further second identification mark formed in each of the other electrically conductive layer structures than the first and second electrically conductive layer (111, 112).

15. The component carrier according to claim 1, wherein the component carrier (100) further comprises:

a further identification mark (301), said further identification mark (301) being detectable by the detection means,

wherein the further identification mark (301) is formed in a respective electrically conductive layer structure arranged closest to the first or second outer electrically conductive layer (111, 112).

16. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the stack (101) comprises a mirror plane (201) parallel to the stacking direction (104),

wherein the further identification mark (301) is arranged at the opposite side of the first identification mark (107) with respect to the mirror plane (201).

17. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

wherein the further identification mark (301) is arranged at the same side as the second identification mark (108) with respect to the mirror plane (201).

18. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the further identification mark (301) comprises an inner volume free of electrically conductive material.

19. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

an additional identification mark (301) is formed in each of the other electrically conductive layer structures than the first and second outer electrically conductive layers (111, 112).

20. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

The further identification mark (301) comprises a triangular shape.

21. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the further identification mark (301) comprises an arrow shape.

22. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the further identification mark (301) comprises three identification points forming a triangular shape, wherein each identification point comprises an inner volume free of electrically conductive material.

23. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the further identification mark (301) is formed at an edge portion of one of the electrically conductive layer structures.

24. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the further identification mark (301) is formed at a corner portion of the electrically conductive layer structure (103, 106).

25. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the further identification mark (301), the first identification mark (107) and/or the second identification mark (108) comprise the same peripheral shape.

26. The component carrier of claim 15, wherein the component carrier comprises a plurality of pins,

the further identification mark (301) is filled with an electrically conductive material.

27. The component carrier of claim 1,

wherein the first identification mark (107) and the second identification mark (108) are formed such that: the first identification mark (107) and the second identification mark (108) completely overlap each other on a projection plane having a projection normal parallel to the stacking direction (104).

28. The component carrier of claim 1,

wherein the first outer electrically conductive layer (111) and/or the second outer electrically conductive layer (112) covering the stack (101) is a copper foil, in particular the copper foil has a thickness of between 3 and 18 μm.

29. A method of manufacturing a component carrier (100), the method comprising:

forming a stack (101), the stack (101) having at least four electrically insulating layer structures (102) and at least five electrically conducting layer structures (103, 106), the electrically insulating layer structures (102) and the electrically conducting layer structures (103, 106) being stacked on top of each other in an alternating manner along a stacking direction (104),

providing a first identification mark (107), said first identification mark (107) being detectable by a detection means, and

the first identification mark (107) is formed in the electrically conductive layer structure (103, 106),

providing a second identification mark (108), said second identification mark (108) being detectable by the detection means, and

the second identification mark (108) is formed in the electrically conductive layer structure (103, 106),

30. The method according to claim 29,

forming a detachable core layer (109),

wherein the detachable core layer (109) is arranged in a detachable manner between at least one of the electrically insulating layer structures (102) and at least one of the electrically conducting layer structures (103) on one side and at least one further electrically insulating layer structure (105) and at least one further electrically conducting layer structure (106) on the other side.

31. The method according to claim 30,

by forming the first identification mark (107) and the second identification mark (108), the orientation of the respective component carrier (100) is detected before the removal of the disassembly core (109) and after the removal of the disassembly core (109).

32. The method according to claim 30,

-forming the second identification mark (108) in the electrically conductive layer structure (103, 106) before detaching the electrically conductive layer structure (103, 106) from the detached core layer (109).

33. The method according to claim 32,

forming a further identification mark (301), said further identification mark (301) being detectable by the detection means,

wherein the further identification mark (301) is formed in a respective electrically conductive layer structure (103, 106) arranged closest to the first or second outer electrically conductive layer (111, 112),

wherein the third identification mark (301) is an additional mark formed in the electrically conductive layer structure (103, 106) after the electrically conductive layer structure (103, 106) is detached from the detached core layer (109).