CN116643143A - Automatic chip full-temperature test system and method based on ATE tester - Google Patents

Automatic chip full-temperature test system and method based on ATE tester Download PDF

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Publication number
CN116643143A
CN116643143A CN202310278633.8A CN202310278633A CN116643143A CN 116643143 A CN116643143 A CN 116643143A CN 202310278633 A CN202310278633 A CN 202310278633A CN 116643143 A CN116643143 A CN 116643143A
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temperature
test
chip
ate tester
value
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朱刚俊
朱刚杰
张洪俞
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NANJING MICRO ONE ELECTRONICS Inc
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NANJING MICRO ONE ELECTRONICS Inc
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2834Automated test systems [ATE]; using microprocessors or computers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2849Environmental or reliability testing, e.g. burn-in or validation tests

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Environmental & Geological Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The invention relates to the field of chip testing, in particular to a full-temperature automatic chip testing system and method based on an ATE (automatic test equipment) tester. The test device comprises an ATE tester, a high-low temperature test box, a test small plate and a temperature sampling device. The test process is as follows: according to the specification of the temperature-sensitive resistor, the relation between the temperature value and the resistance value is found out and input into an ATE tester; connecting the chip with a test small plate, and connecting the test small plate and a temperature sampling device with an ATE tester; then, placing the test small plate and the temperature sampling device into a high-low temperature test box, and starting the high-low temperature test box; and finally, starting the ATE tester when the temperature in the high-low temperature test box reaches the initial set value of the chip test, and synchronously recording the temperature value and the voltage and current parameters of the chip by the ATE tester. By adopting the system and the method, the testing efficiency can be greatly improved, and the problem of retesting caused by negligence of people can be avoided.

Description

Automatic chip full-temperature test system and method based on ATE tester
Technical Field
The invention relates to the field of chip testing, in particular to a full-temperature automatic chip testing system and method based on an ATE (automatic test equipment) tester.
Background
In each specification of the chip, there will be descriptions of the high and low temperature performance of certain parameters of the chip, and specific data curves must be presented. Therefore, in the field of chip testing, high and low temperature testing of chips is a necessary test item, and plays a vital role in chip performance verification.
At present, the high and low temperature test process of the chip is operated manually, namely, a worker selects one parameter to perform high and low temperature test, and the parameter value corresponding to each temperature interval is recorded manually in the test process, so that the process is repeated until all the parameters of the chip are tested completely. However, depending on the design and application requirements of the chip, multiple or even tens of parameters of the chip may be tested at the same time. This is inconvenient and takes a long time and effort if the test is performed manually, and there is a possibility that a problem of retesting due to erroneous test data caused by human negligence may occur.
Disclosure of Invention
The invention aims to solve the technical problem of providing a full-temperature automatic chip testing system and method based on an ATE (automatic test equipment) tester, and by adopting the system and the method, the testing efficiency can be greatly improved, and the problem of retesting caused by negligence of people can be avoided.
In order to solve the problems, the following technical scheme is provided:
the invention relates to a chip full-temperature automatic test system based on an ATE tester, which is characterized by comprising:
and the ATE tester is used for providing a VI source channel, measuring voltage and current and automatically storing test data during chip testing.
The high-low temperature test box is used for providing a high-low temperature environment during chip test.
And the test small plate is connected with the chip and the ATE tester in an adapting way and is used for providing peripheral devices for enabling the chip to work normally and transmitting test data to the ATE tester.
The temperature sampling device is connected with the ATE tester in an adaptive manner and is used for sampling the ambient temperature during chip testing to obtain a sampling signal, and transmitting the sampling signal to the ATE tester so that the ATE tester can obtain the ambient temperature of the chip testing according to the sampling signal.
The temperature sampling device comprises a temperature-sensitive resistor and a control circuit, wherein the control circuit inputs fixed voltage and outputs a current value as a sampling signal.
The control circuit adopts Kelvin design.
The method for carrying out the chip full-temperature test by adopting the chip full-temperature automatic test system based on the ATE tester is characterized by comprising the following steps of:
first, the preparation stage
Firstly, selecting an ATE tester, a high-low temperature test box, a test small plate and a temperature sampling device according to the type of a chip;
and then, according to the specification of the temperature-sensitive resistor, finding out the relation between the temperature value and the resistance value and inputting the relation into an ATE tester.
Second step, test stage
Firstly, connecting a chip with a test small plate, and connecting the test small plate and a temperature sampling device with an ATE tester;
then, placing the test small plate and the temperature sampling device into a high-low temperature test box, and starting the high-low temperature test box;
then, when the temperature in the high-low temperature test box reaches the initial set value of the chip test, starting an ATE (automatic test equipment) tester, wherein the ATE tester provides a VI source for a test small plate, and measuring the current voltage and current parameters of the chip and storing the current voltage and current parameters in real time; and meanwhile, the ATE tester outputs a fixed voltage to the control circuit, the resistance value K can be obtained according to the acquired output current value, the temperature value is obtained according to the comparison of the temperature value of the temperature-sensitive resistor and the resistance value, and the temperature value and the voltage and current parameters of the chip are synchronously recorded.
The process for finding out the relation between the temperature value of the temperature-sensitive resistor and the resistance value is as follows:
firstly, according to specifications of temperature-sensitive resistors, the resistance values in all temperature ranges are listed from low to high, and an array A is obtained;
then, according to the sequence of the resistance values in the array A, corresponding temperature values are listed in a one-to-one correspondence manner, and an array B is obtained;
inputting the array A and the array B into an ATE tester;
the relationship comparison process of the temperature-sensitive resistance temperature value and the resistance value of the ATE tester is as follows:
and comparing and finding out the position of the K value corresponding to the array A, and synchronizing the array A and the array B to obtain the temperature value.
By adopting the scheme, the method has the following advantages:
the full-temperature automatic chip testing system based on the ATE tester comprises the ATE tester, a high-temperature testing box, a low-temperature testing box, a testing small plate and a temperature sampling device. The test process is as follows: according to the specification of the temperature-sensitive resistor, the relation between the temperature value and the resistance value is found out and input into an ATE tester; connecting the chip with a test small plate, and connecting the test small plate and a temperature sampling device with an ATE tester; then, placing the test small plate and the temperature sampling device into a high-low temperature test box, and starting the high-low temperature test box; and finally, starting the ATE tester when the temperature in the high-low temperature test box reaches the initial set value of the chip test, and synchronously recording the temperature value and the voltage and current parameters of the chip by the ATE tester. The test system and the test method can automatically test and record the parameters of the chip, thereby avoiding manual recording of staff, and when a plurality of parameters are required to be tested simultaneously, a plurality of channels are arranged between the ATE tester and the test small plate, the whole high-low temperature test process is greatly simplified, and the working efficiency is improved. Moreover, no manual recording is needed, so that the problem of retesting caused by negligence of people is avoided.
Drawings
FIG. 1 is a functional block diagram of an ATE tester-based chip full temperature automatic test system of the present invention;
FIG. 2 is a diagram showing a temperature-sensitive resistor calculation process in the automatic chip temperature test system based on an ATE tester according to the present invention;
fig. 3 is a circuit diagram of a temperature sampling device in an ATE tester-based chip full-temperature automatic test system according to the present invention.
Detailed Description
The invention is described in further detail below in connection with figures 1-3 and the examples.
The invention relates to a chip full-temperature automatic test system based on an ATE tester, which comprises:
and the ATE tester is used for providing a VI source channel, measuring voltage and current and automatically storing test data during chip testing. ATE test machine is widely used in CP test and FT test of chip, all test machines can provide plural VI sources and corresponding measuring channels, taking STS8200F as an example of domestic peak test machine, one FOVI board card can provide 8 channels of VI sources (meanwhile can also be used as measuring channels). The FOVI board card can be added to increase the test channels according to the requirement. The ATE test equipment performs some simple test programming, where the test channels are set to supply VI sources or to measure channel states (like a multimeter) as required.
The high-low temperature test box is used for providing a high-low temperature environment during chip test.
And the test small plate is connected with the chip and the ATE tester in an adapting way and is used for providing peripheral devices for enabling the chip to work normally and transmitting test data to the ATE tester. The measurement of certain parameters of the chip can be very simple or complex according to the type of the chip to be tested, and the simple chip, such as the outer ring device of the LDO, only needs two input capacitors and two output capacitors, or the direct test without the input capacitors and the output capacitors is also feasible. While some complex digital chips, such as audio chips, ACDC chips, etc., require many peripheral devices that are placed on top of the test panel. On the other hand, with the upgrade of the tester, the parameters we can test are more and more, the simple test with the reference voltage VREF, the complex frequency, the level timing, etc. The aspects of testing these complex parameters need to be considered are numerous, which makes it necessary to consider more when making test platelets. The peripheral device is selected according to the test requirement, and the specific structure is the prior art and is not described in detail here.
The temperature sampling device is connected with the ATE tester in an adaptive manner and is used for sampling the ambient temperature during chip testing to obtain a sampling signal, and transmitting the sampling signal to the ATE tester so that the ATE tester can obtain the ambient temperature of the chip testing according to the sampling signal. The temperature sampling device comprises a temperature sensitive resistor and a control circuit, wherein the control circuit inputs fixed voltage and outputs a current value as a sampling signal. In this embodiment, the structure of the temperature sampling device in this embodiment is shown in fig. 3. The control circuit adopts Kelvin design, so that the ATE tester can accurately read the tested current value, and the current resistance value of the temperature-sensitive resistor can be accurately calculated. The temperature-sensitive resistor is MF58 series. The temperature-sensitive resistor characteristic is that the resistance value can correspondingly change along with the temperature change, by utilizing the characteristic that a tested VI source is utilized, a test channel is used for providing fixed voltage (such as 10V) for the temperature-sensitive resistor, because the current changing along with the temperature change of the resistance value also correspondingly changes, the resistance value of the resistor is calculated by measuring the current of the resistor (the characteristic of an ATE test channel is that the current flowing through the channel can be tested while the voltage is given, and vice versa), and the temperature of the environment where the resistor is located is calculated according to data. Thus, the parameters of the chip can be tested and the corresponding temperature can be recorded.
In this embodiment, the test panel and the temperature sampling device are both connected to the ATE tester through DB25 serial connectors.
A method for carrying out full-temperature test on a chip by a full-temperature automatic chip testing system based on an ATE tester comprises the following steps:
first, the preparation stage
Firstly, selecting an ATE tester, a high-low temperature test box, a test small plate and a temperature sampling device according to the type of a chip;
then, according to the specification of the temperature-sensitive resistor, the resistance values in all the temperature ranges are listed from low to high, and an array A is obtained;
then, according to the sequence of the resistance values in the array A, corresponding temperature values are listed in a one-to-one correspondence manner, and an array B is obtained;
inputting the array A and the array B into an ATE tester;
second step, test stage
Firstly, connecting a chip with a test small plate, and connecting the test small plate and a temperature sampling device with an ATE tester;
then, placing the test small plate and the temperature sampling device into a high-low temperature test box, and starting the high-low temperature test box;
then, when the temperature in the high-low temperature test box reaches the initial set value of the chip test, starting an ATE (automatic test equipment) tester, wherein the ATE tester provides a VI source for a test small plate, and measuring the current voltage and current parameters of the chip and storing the current voltage and current parameters in real time; meanwhile, the ATE tester outputs fixed voltage to the control circuit, the resistance value K can be obtained according to the acquired output current value, the position of the K value corresponding to the array A is found out in a comparison mode, the array A and the array B are synchronized, the temperature value can be obtained, and the temperature value and the voltage and current parameters of the chip can be synchronously recorded.
Through the system and the method, 2.5V and 3.3V output voltage parameter tests are carried out on an 8-channel LDO chip, a test value is selected every 5 ℃, and the displayed decimal point number can be set in a tester according to requirements. The numbers obtained are tested in the following table.
NTC U1 U2 U3 U4 U5 U6 U7 U8
-40 2.4985 2.4992 3.3 3.302 3.285 3.318 3.313 3.296
-35 2.4983 2.4989 3.3 3.302 3.284 3.318 3.313 3.297
-30 2.4983 2.4989 3.3 3.302 3.285 3.319 3.313 3.297
-25 2.4976 2.4984 3.301 3.303 3.283 3.318 3.313 3.297
-20 2.4976 2.498 3.301 3.303 3.284 3.32 3.312 3.297
-15 2.4974 2.4974 3.301 3.304 3.284 3.318 3.312 3.297
-10 2.4971 2.4973 3.302 3.304 3.283 3.319 3.312 3.298
-5 2.4973 2.4967 3.302 3.305 3.282 3.316 3.311 3.298
0 2.497 2.4959 3.303 3.306 3.282 3.316 3.309 3.298
5 2.4963 2.4946 3.303 3.306 3.28 3.316 3.308 3.299
10 2.4962 2.4936 3.304 3.307 3.279 3.315 3.307 3.299
15 2.4963 2.4932 3.305 3.309 3.278 3.314 3.307 3.3
20 2.4954 2.4923 3.305 3.31 3.275 3.313 3.306 3.301
25 2.4962 2.4926 3.306 3.29 3.308 3.315 3.307 3.301
30 2.4953 2.4912 3.306 3.291 3.306 3.313 3.306 3.301
35 2.4947 2.4898 3.307 3.293 3.304 3.309 3.304 3.302
40 2.4947 2.4896 3.308 3.293 3.303 3.309 3.303 3.302
45 2.4944 2.4889 3.308 3.295 3.302 3.309 3.302 3.303
50 2.4934 2.487 3.309 3.296 3.3 3.306 3.301 3.303
55 2.4933 2.487 3.309 3.297 3.297 3.304 3.299 3.303
60 2.4919 2.4856 3.309 3.297 3.297 3.305 3.298 3.303
65 2.4915 2.4842 3.31 3.298 3.295 3.303 3.296 3.303
70 2.4912 2.4838 3.31 3.3 3.293 3.3 3.294 3.303
75 2.4896 2.4823 3.31 3.3 3.291 3.299 3.292 3.303
80 2.4893 2.4809 3.31 3.301 3.29 3.298 3.291 3.303
85 2.4884 2.4799 3.31 3.302 3.287 3.295 3.288 3.303
90 2.4876 2.4789 3.31 3.302 3.285 3.294 3.287 3.303
95 2.4863 2.4781 3.31 3.303 3.283 3.292 3.285 3.303
100 2.4859 2.4768 3.31 3.303 3.281 3.289 3.283 3.303
105 2.4843 2.4759 3.311 3.304 3.279 3.287 3.282 3.303
110 2.4838 2.4749 3.311 3.306 3.277 3.286 3.28 3.303
115 2.4829 2.4745 3.312 3.307 3.276 3.284 3.279 3.304
120 2.4814 2.473 3.314 3.31 3.274 3.284 3.277 3.305
125 2.4807 2.472 3.316 3.313 3.273 3.283 3.276 3.307
TABLE 1
According to the curve distribution of the U1 and U2 data, the U1 and U2 can be obtained, the corresponding chip parameters are negative temperature coefficients, and the fluctuation of the variation values is obviously compared.
According to the full-temperature automatic chip testing system and method based on the ATE tester, time and energy for recording a large amount of data can be saved in actual high-low temperature testing, and efficiency and accuracy of testing are improved. Particularly in the high-low temperature measurement of industrial-level chips and automobile-level chips, a large number of chips need to be subjected to high-low temperature measurement of a large number of parameters, and high-low temperature and humidity tests in chip reliability verification can be also utilized to carry out the test by the automatic test method.

Claims (5)

1. An automatic chip full-temperature test system based on an ATE tester is characterized by comprising:
the ATE tester is used for providing a VI source channel, measuring voltage and current and automatically storing test data during chip test;
the high-low temperature test box is used for providing a high-low temperature environment during chip test;
the test small plate is connected with the chip and the ATE tester in an adapting way and is used for providing peripheral devices for enabling the chip to work normally and transmitting test data to the ATE tester;
the temperature sampling device is connected with the ATE tester in an adaptive manner and is used for sampling the ambient temperature during chip testing to obtain a sampling signal, and transmitting the sampling signal to the ATE tester so that the ATE tester can obtain the ambient temperature of the chip testing according to the sampling signal.
2. The automatic test system of chip total temperature based on ATE tester according to claim 1, wherein the temperature sampling device comprises a temperature sensitive resistor and a control circuit, the control circuit inputs a fixed voltage and outputs a current value as a sampling signal.
3. The ATE tester-based chip full-temperature automatic test system of claim 2, wherein the control circuit is in a kelvin design.
4. A method for performing a full-temperature chip test using the full-temperature chip automatic test system based on an ATE tester of claim 3, comprising the steps of:
first, the preparation stage
Firstly, selecting an ATE tester, a high-low temperature test box, a test small plate and a temperature sampling device according to the type of a chip;
then, according to the specification of the temperature-sensitive resistor, the relation between the temperature value and the resistance value is found out and input into an ATE tester;
second step, test stage
Firstly, connecting a chip with a test small plate, and connecting the test small plate and a temperature sampling device with an ATE tester;
then, placing the test small plate and the temperature sampling device into a high-low temperature test box, and starting the high-low temperature test box;
then, when the temperature in the high-low temperature test box reaches the initial set value of the chip test, starting an ATE (automatic test equipment) tester, wherein the ATE tester provides a VI source for a test small plate, and measuring the current voltage and current parameters of the chip and storing the current voltage and current parameters in real time; and meanwhile, the ATE tester outputs a fixed voltage to the control circuit, the resistance value K can be obtained according to the acquired output current value, the temperature value is obtained according to the comparison of the temperature value of the temperature-sensitive resistor and the resistance value, and the temperature value and the voltage and current parameters of the chip are synchronously recorded.
5. The method for testing the full temperature of the chip as claimed in claim 4, wherein the process of finding the relation between the temperature value of the temperature-sensitive resistor and the resistance value is as follows:
firstly, according to specifications of temperature-sensitive resistors, the resistance values in all temperature ranges are listed from low to high, and an array A is obtained;
then, according to the sequence of the resistance values in the array A, corresponding temperature values are listed in a one-to-one correspondence manner, and an array B is obtained;
inputting the array A and the array B into an ATE tester;
the relationship comparison process of the temperature-sensitive resistance temperature value and the resistance value of the ATE tester is as follows:
and comparing and finding out the position of the K value corresponding to the array A, and synchronizing the array A and the array B to obtain the temperature value.
CN202310278633.8A 2023-03-21 2023-03-21 Automatic chip full-temperature test system and method based on ATE tester Pending CN116643143A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310278633.8A CN116643143A (en) 2023-03-21 2023-03-21 Automatic chip full-temperature test system and method based on ATE tester

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310278633.8A CN116643143A (en) 2023-03-21 2023-03-21 Automatic chip full-temperature test system and method based on ATE tester

Publications (1)

Publication Number Publication Date
CN116643143A true CN116643143A (en) 2023-08-25

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