CN106483950B - Programmable logic device detection method and device - Google Patents
Programmable logic device detection method and device Download PDFInfo
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- CN106483950B CN106483950B CN201611189638.XA CN201611189638A CN106483950B CN 106483950 B CN106483950 B CN 106483950B CN 201611189638 A CN201611189638 A CN 201611189638A CN 106483950 B CN106483950 B CN 106483950B
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
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Abstract
The invention discloses a kind of programmable logic device detection method and devices, cover the detection of detection and dynamic linear time temporal logic relationship by carrying out static combinational logic to programmable logic device to be measured；In conjunction with the result of static combinational logic covering detection and dynamic linear time temporal logic relationship detection and according to the peripheral circuit feature of programmable logic device to be measured, the logic function of programmable logic device to be measured is obtained.Programmable logic device detection method provided by the invention and device, the automatic detection of the programmable logic device in aero-engine control device can be achieved, system response time is fast, control time precision is high, waveform complexity is high, measurement range is wide and detection accuracy is high.
Description
Technical field
The present invention relates to aero-engine control device detection fields, particularly, are related to a kind of programmable logic device inspection
Survey method and apparatus.
Background technique
A kind of aero-engine control device needs compiling internal during developing and component enters factory inspection receipts
Journey logical device (including simple PLD, complexity PLD and FPGA etc.) is detected, and needs do not destroying structure and circuit
In the case of, programmable logic device is analyzed and is checked and accepted.By the functional analysis to programmable logic device peripheral circuit,
Specify the input-output characteristic of each pin of programmable logic device.However, in the prior art, programmable logic device detection
Device using detection manually and open loop detection method, wiring is complicated, it is more to occupy instrument, it is high to tester's competency profiling,
And it cannot achieve digital information and show, analyze and store.
Therefore, programmable logic device detection device wiring complexity in the prior art, occupancy instrument are more and to test
Personnel qualifications height is a technical problem urgently to be resolved.
Summary of the invention
The present invention provides a kind of programmable logic device detection method and devices, in the prior art programmable to solve
The wiring of logical device detection device is complicated, occupies more and high to the tester's competency profiling technical problem of instrument.
The technical solution adopted by the invention is as follows:
According to an aspect of the present invention, a kind of programmable logic device detection method is provided, comprising steps of
Static combinational logic covering detection and dynamic linear time temporal logic relationship detection is carried out to programmable logic device to be measured；
It is compiled in conjunction with the result of static combinational logic covering detection and dynamic linear time temporal logic relationship detection and according to be measured
The peripheral circuit feature of journey logical device, obtains the logic function of programmable logic device to be measured.
Further, static combinational logic covering detection is carried out to programmable logic device to be measured and dynamic linear time temporal logic closes
Being the step of detection includes:
Static combinational logic covering detection is carried out to programmable logic device to be measured, obtains programmable logic device to be measured
The combinational logic relationship of input pin and output pin；
The detection of dynamic linear time temporal logic relationship is carried out to programmable logic device to be measured, obtains programmable logic device to be measured
The temporal and logic relation of input pin and output pin.
Further, static combinational logic covering detection is carried out to programmable logic device to be measured, obtained to be measured programmable
The step of combinational logic relationship of the input pin of logical device and output pin includes:
Logic coverage and incremental count are used to the input pin of programmable logic device to be measured；
Acquire and record the low and high level of the output pin of programmable logic device to be measured；
The low and high level of the output pin of the programmable logic device to be measured of acquisition and record is analyzed and handled, is obtained
The combinational logic relationship of the input pin and output pin of programmable logic device to be measured out.
Further, the detection of dynamic linear time temporal logic relationship is carried out to programmable logic device to be measured, obtained to be measured programmable
The step of temporal and logic relation of the input pin of logical device and output pin includes:
Clock signal and clock signal are added on the input pin of programmable logic device to be measured；
The variation relation of the output signal of the output pin output of Simultaneous Monitoring programmable logic device to be measured；
According to the variation relation of the output signal of the output pin of the programmable logic device to be measured of Simultaneous Monitoring output, look for
The temporal and logic relation of the input pin and output pin of programmable logic device out.
Further, in conjunction with static combinational logic covering detection and dynamic linear time temporal logic relationship detection result and according to
The peripheral circuit feature of programmable logic device, the step of obtaining the logic function of programmable logic device to be measured include:
It is compiled in conjunction with the result of static combinational logic covering detection and dynamic linear time temporal logic relationship detection and according to be measured
The peripheral circuit feature of journey logical device, obtains the functional block diagram and state transition graph of programmable logic device to be measured, obtain to
Survey the logic function of programmable logic device.
According to another aspect of the present invention, a kind of programmable logic device detection device is additionally provided, comprising:
Detection module, for carrying out to programmable logic device to be measured, static combinational logic covering is detected and dynamic time sequence is patrolled
The relationship of collecting detection；
Obtain module, result for combining static combinational logic covering detection and dynamic linear time temporal logic relationship to detect and
According to the peripheral circuit feature of programmable logic device to be measured, the logic function of programmable logic device to be measured is obtained.
Further, detection module includes combinational logic Relation acquisition unit and temporal and logic relation acquiring unit,
Combinational logic Relation acquisition unit, for carrying out static combinational logic covering inspection to programmable logic device to be measured
It surveys, obtains the input pin of programmable logic device to be measured and the combinational logic relationship of output pin；
Temporal and logic relation acquiring unit, for carrying out the inspection of dynamic linear time temporal logic relationship to programmable logic device to be measured
It surveys, obtains the input pin of programmable logic device to be measured and the temporal and logic relation of output pin.
Further, combinational logic Relation acquisition unit includes combinational logic input subelement, Combinational logic output list
Member and combinational logic obtain subelement,
Combinational logic inputs subelement, using Logic coverage and passs for the input pin to programmable logic device to be measured
It counts up；
Combinational logic output subelement, the height electricity of the output pin for acquiring and recording programmable logic device to be measured
It is flat；
Combinational logic obtains subelement, the height of the output pin for the programmable logic device to be measured to acquisition and record
Low level is analyzed and is handled, and the combinational logic of the input pin and output pin that obtain programmable logic device to be measured closes
System.
Further, temporal and logic relation acquiring unit includes sequential logic input subelement, Sequential logic output list
Member and sequential logic obtain subelement,
Sequential logic input subelement, on the input pin of programmable logic device to be measured be added clock signal and
Clock signal；
Sequential logic output subelement, the output that the output pin for Simultaneous Monitoring programmable logic device to be measured exports
The variation relation of signal；
Sequential logic obtains subelement, for according to the defeated of the output pin output of the programmable logic device of Simultaneous Monitoring
The variation relation of signal out finds out the input pin of programmable logic device to be measured and the temporal and logic relation of output pin.
Further, obtaining module includes functional status acquiring unit,
Functional status acquiring unit, for combining static combinational logic covering detection and dynamic linear time temporal logic relationship detection
As a result and according to the peripheral circuit feature of programmable logic device to be measured, the functional block diagram of programmable logic device to be measured is obtained
And state transition graph, obtain the logic function of programmable logic device to be measured.
The invention has the following advantages:
Programmable logic device detection method provided by the invention and device cover detection using static combinational logic and move
The detection of state temporal and logic relation, obtains the external characteristics of the programmable logic device in aero-engine control device, and according to can
The peripheral circuit feature of programmed logic device, in conjunction with the logic function for obtaining programmable logic device.It is provided by the invention to compile
Journey logical device detection method and device, it can be achieved that the programmable logic device in aero-engine control device automatic inspection
It surveys, system response time is fast, control time precision is high, waveform complexity is high, measurement range is wide and detection accuracy is high.
Other than objects, features and advantages described above, there are also other objects, features and advantages by the present invention.
Below with reference to figure, the present invention is described in further detail.
Detailed description of the invention
The attached drawing constituted part of this application is used to provide further understanding of the present invention, schematic reality of the invention
It applies example and its explanation is used to explain the present invention, do not constitute improper limitations of the present invention.In the accompanying drawings:
Fig. 1 is the flow diagram of programmable logic device detection method first embodiment of the present invention；
Fig. 2 is to carry out static combinational logic covering detection and dynamic linear time temporal logic to programmable logic device to be measured in Fig. 1
The refinement flow diagram for the step of relationship detects；
Fig. 3 is to carry out static combinational logic covering detection to programmable logic device to be measured in Fig. 2, is obtained to be measured programmable
The refinement flow diagram of the step of combinational logic relationship of the input pin of logical device and output pin；
Fig. 4 is the functional block diagram of combinational logic detection device；
Fig. 5 is the voltage mode schematic diagram of D/A card in Fig. 4；
Fig. 6 is to carry out the detection of dynamic linear time temporal logic relationship to programmable logic device to be measured in Fig. 2, is obtained to be measured programmable
The refinement flow diagram of the step of temporal and logic relation of the input pin of logical device and output pin；
Fig. 7 is the functional block diagram of sequential logic detection device；
Fig. 8 is the flow diagram of programmable logic device detection method second embodiment of the present invention；
Fig. 9 is the structural block diagram of programmable logic device detection device preferred embodiment of the present invention；
Figure 10 is the functional block diagram of detection module in Fig. 9；
Figure 11 is the functional block diagram of combinational logic Relation acquisition unit in Figure 10；
Figure 12 is the functional block diagram of temporal and logic relation acquiring unit in Figure 10；
Figure 13 is the functional block diagram that module is obtained in Fig. 9.
Drawing reference numeral explanation:
10, detection module；20, module is obtained；11, combinational logic Relation acquisition unit；12, temporal and logic relation obtains single
Member；111, combinational logic inputs subelement；112, Combinational logic output subelement；113, combinational logic obtains subelement；121,
Sequential logic inputs subelement；122, Sequential logic output subelement；123, sequential logic obtains subelement；21, functional status
Acquiring unit；100, programmable logic device to be measured；200, computer；300, A/D card；400, D/A card；500, number I/O card；
600, integrated data flow table module；700, controller；800, user interface；900, cabinet.
Specific embodiment
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase
Mutually combination.The present invention will be described in detail below with reference to the accompanying drawings and embodiments.
Referring to Fig.1, the preferred embodiment of the present invention provides a kind of programmable logic device detection method, applied to can compile
In journey logical device detection system, for making up programmable logic device in the prior art (PLD, including simple PLD, complexity
PLD, FPGA etc.) manual detection and open loop detecting method shortcoming.Programmable logic device inspection provided in this embodiment
Examining system, using industrial personal computer, A/D card, D/A card, frequency quantity input-output card, programmable logic device test jack and conditioning electricity
Road constitutes hardware platform and is combined logic to programmable logic device to be measured using NI Labwindows/CVI software platform
Detection, sequential logic detection (collection period is 1ms~2s), are acquired data, show and store；Using NI cabinet, NI
Controller, high speed digital I/O card carry out high frequency sequential logic detection design using NI Labwindows/CVI software platform
(sample frequency is 1~12MHz), the programmable logic device to be measured on control device is realized with specific, cured testing process
The automatic detection of part.Programmable logic device detection method provided in this embodiment, comprising steps of
Step S100, static combinational logic covering detection is carried out to programmable logic device to be measured and dynamic linear time temporal logic closes
System's detection.
External characteristics detection is carried out to programmable logic device to be measured, external characteristics detection mainly includes static combinational logic covering
Detection and dynamic linear time temporal logic relationship detects two ways.Wherein, static combinational logic covering detection is for obtaining to be measured compile
Combinational logic relationship between each pin of journey logical device；Dynamic linear time temporal logic relationship is detected for obtaining programmable logic to be measured
Temporal and logic relation between each pin of device.
Step S200, in conjunction with static combinational logic covering detection and dynamic linear time temporal logic relationship detection result and according to
The peripheral circuit feature of programmable logic device to be measured, obtains the logic function of programmable logic device to be measured.
Programmable logic device to be measured in conjunction with static combinational logic covering detection and dynamic linear time temporal logic Relation acquisition is each
Combinational logic relationship and temporal and logic relation between pin, and according to the peripheral circuit of programmable logic device to be measured spy
Sign, the comprehensive logic function for obtaining programmable logic device to be measured.
Programmable logic device detection method provided in this embodiment, when using static combinational logic covering detection and dynamic
The detection of sequence logical relation obtains the external characteristics of the programmable logic device in aero-engine control device, and according to programmable
The peripheral circuit feature of logical device, in conjunction with the logic function for obtaining programmable logic device.It is provided in this embodiment programmable
Logical device detection method, it can be achieved that the programmable logic device in aero-engine control device automatic detection, system ring
Fast between seasonable, control time precision height, waveform complexity height, measurement range is wide and detection accuracy is high.
Preferably, as shown in Fig. 2, programmable logic device detection method provided in this embodiment, step S100 include:
Step S110, static combinational logic covering detection is carried out to programmable logic device to be measured, obtained to be measured programmable
The input pin of logical device and the combinational logic relationship of output pin.
In the way of 1 (data area 000-3FF) of single step increasing, static combination is carried out to programmable logic device to be measured
Logic coverage detection, obtains the input pin of programmable logic device to be measured and the combinational logic relationship of output pin.
Step S120, the detection of dynamic linear time temporal logic relationship is carried out to programmable logic device to be measured, obtained to be measured programmable
The input pin of logical device and the temporal and logic relation of output pin.
The detection of dynamic linear time temporal logic relationship is carried out to programmable logic device to be measured, by programmable logic device to be measured
All input pins be combined input, then obtain all input pipes in all output pins of programmable logic device
Variation relation of the foot when combining input, so that the input pin of programmable logic device to be measured and the timing of output pin be taken to patrol
The relationship of collecting.
Programmable logic device detection method provided in this embodiment, when using static combinational logic covering detection and dynamic
The detection of sequence logical relation, the combinational logic relationship and timing for obtaining the input pin and output pin of surveying programmable logic device are patrolled
The relationship of collecting.Programmable logic device detection method provided in this embodiment is, it can be achieved that compiling in aero-engine control device
The automatic detection of journey logical device, system response time is fast, control time precision is high, waveform complexity is high, measurement range is wide
And detection accuracy is high.
Preferably, as shown in figure 3, programmable logic device detection method provided in this embodiment, step S110 include:
Step S111, Logic coverage and incremental count are used to the input pin of programmable logic device to be measured.
As shown in figure 4, programmable logic device detection system includes that combinational logic detection device and sequential logic detection are set
Standby, combinational logic detection device includes computer 200, A/D card 300 and D/A card 400, and A/D card 300 and D/A card 400 connect
It connects between computer 200 and programmable logic device to be measured 100, A/D card 300 is used for programmable logic device 100 to be measured
The data of output carry out analog-to-digital conversion, and data of the D/A card 400 for exporting to computer 200 are into digital-to-analogue conversion.Combinational logic inspection
Measurement equipment is core with computer 200, A/D card 300 and D/A card 400, with test cable by A/D card 300, D/A card 400 with can
The respective channel of the corresponding programmable logic device 100 to be measured of programmed logic device test jack is attached.When detecting, together
When the power supply of programmable logic device, clock signal input and the input of frequency quantity signal are provided.The output of combinational logic only with work as
Preceding input is related, therefore all input pins of programmable logic device to be measured are used with the side of Logic coverage and incremental count
Method.Wherein, the voltage mode of D/A card is as shown in Figure 5.
Step S112, acquire and record the low and high level of the output pin of programmable logic device to be measured.
The real-time display input-output wave shape in the user interface of computer display screen, while being recorded with text document format
The level height of all output pins of programmable logic device to be measured.
Step S113, the low and high level of the output pin of the programmable logic device to be measured of acquisition and record is analyzed
And processing, obtain the input pin of programmable logic device to be measured and the combinational logic relationship of output pin.
The low and high level of the output pin of the programmable logic device to be measured of acquisition and record is analyzed and handled, it can
To obtain the truth table of combinational logic, so that the combination for obtaining the input pin and output pin of programmable logic device to be measured is patrolled
The relationship of collecting.
Programmable logic device detection method provided in this embodiment, by acquiring and recording programmable logic device to be measured
Output pin low and high level；The low and high level of the output pin of the programmable logic device to be measured of acquisition and record is carried out
Analysis and processing, obtain the input pin of programmable logic device to be measured and the combinational logic relationship of output pin；To acquisition and
The low and high level of the output pin of the programmable logic device to be measured of record is analyzed and is handled, and obtains programmable logic to be measured
The input pin of device and the combinational logic relationship of output pin, i.e., the input pin and efferent duct of programmable logic device to be measured
The combinational logic relational expression of foot.To realize the automatic detection of the programmable logic device in aero-engine control device, this
The programmable logic device detection method that embodiment provides, system response time is fast, control time precision is high, waveform complexity
Height, measurement range is wide and detection accuracy is high.
Optionally, as shown in fig. 6, programmable logic device detection method provided in this embodiment, step S120 include:
Step S121, clock signal and clock signal are added on the input pin of programmable logic device to be measured.
As shown in fig. 7, sequential logic detection device includes number I/O card 500, integrated data flow table module 600, controller
700, user interface 800 and cabinet 900, digital I/O card 500 are connected with programmable logic device 100 to be measured, for as to
Survey the data input/output interface of programmable logic device 100；Integrated data flow table module 600 is connected with number I/O card 500,
Controller is connected with integrated data flow table module 600 and user interface 800 respectively, for storing data；Digital I/O card 500, collection
It is arranged in cabinet 900 at data flow disk module 600, controller 700.The output of sequential logic is not only related with input, also with
The Last status of programmable logic device detection system is related, therefore, on the input pin of programmable logic device to be measured
Clock signal and clock signal is added to form clock edge, the output of sequential logic is detected.
Step S122, the variation of the output signal of the output pin output of Simultaneous Monitoring programmable logic device to be measured is closed
System.
The variation of output level is driven by clock edge in the output pin of programmable logic device to be measured, therefore for all
Each combination on the input pin of programmable logic device to be measured, carries out data acquisition and display to output level, to every
A kind of combined timing is detected and is recorded, while carrying out the record of timing waveform and right using oscillograph and logic analyser
Than.
Step S123, according to the change of the output signal of the output pin of the programmable logic device to be measured of Simultaneous Monitoring output
Change relationship finds out the input pin of programmable logic device and the temporal and logic relation of output pin.
The design key of sequential logic detection device is to match clock frequency, therefore to programmable logic to be measured
Device first carries out sequential logic detection (collection period is 1ms~2s), then carries out higher speed acquisition (such as 1~12MHz sampling again
Frequency) function the design of sequential logic detection device, and the efferent duct of the programmable logic device to be measured according to Simultaneous Monitoring
The sequential logic of the variation relation of the output signal of foot output, the input pin and output pin of finding out programmable logic device is closed
System.Different clock frequencies is matched, to the software and hardware composition of programmable logic device detection system, sample rate, storage capacity
It is different.
Programmable logic device detection method provided in this embodiment, passes through the input pipe in programmable logic device to be measured
Clock signal and clock signal are added on foot；The output signal of the output pin output of Simultaneous Monitoring programmable logic device to be measured
Variation relation；It is closed according to the variation of the output signal of the output pin of the programmable logic device to be measured of Simultaneous Monitoring output
System, finds out the input pin of programmable logic device and the temporal and logic relation of output pin, to realize aero-engine control
The automatic detection of programmable logic device in device processed, system response time is fast, control time precision is high, waveform complexity
Height, measurement range is wide and detection accuracy is high.
Preferably, as shown in figure 8, programmable logic device detection method provided in this embodiment, step S200 include:
Step S200A, in conjunction with the result and root of the covering detection and dynamic linear time temporal logic relationship detection of static combinational logic
According to the peripheral circuit feature of programmable logic device to be measured, functional block diagram and the state conversion of programmable logic device to be measured are obtained
Figure, obtains the logic function of programmable logic device to be measured.
In the present embodiment, it in conjunction with the covering detection and dynamic linear time temporal logic relationship detection of static combinational logic, obtains to be measured
Combinational logic relationship and temporal and logic relation between each pin of programmable logic device, that is, obtain programmable logic device to be measured
Input pin and output pin logic level, analysis obtains the combinational logic relational expression of programmable logic device to be measured；With
And according to demand signals, timing is adjusted in real time by hundreds of groups of merging, obtains output timing logic, and compile according to be measured
The peripheral circuit feature of journey logical device obtains the functional block diagram and state transition graph of programmable logic device to be measured, to slap
The logic function of programmable logic device to be measured is held, provides support for the detection, analysis and verifying of programmable logic device.
Programmable logic device detection method provided in this embodiment, when in conjunction with static combinational logic covering detection and dynamic
The result that sequence logical relation detects and the peripheral circuit feature according to programmable logic device to be measured show that be measured may be programmed is patrolled
The functional block diagram and state transition graph for collecting device, obtain the logic function of programmable logic device to be measured, to realize that aviation is sent out
The automatic detection of programmable logic device in motivation control device.Programmable logic device detection side provided in this embodiment
Method, system response time is fast, control time precision is high, waveform complexity is high, measurement range is wide and detection accuracy is high.
In the present embodiment, the hardware of programmable logic device detection system includes PXI cabinet, PXI controller and number
(digital waveform generator/analyzer as used 32 channels, logic level and TTL, 3.3V supply voltage, 2.5V's I/O card power
Voltage, 1.8V supply voltage, LVTTL are compatible, maximum clock frequency 100MHz, the onboard 64Mb memory in each channel).Pass through
By the clock signal (such as 1~12MHz) for being supplied to programmable logic device to be measured while the external clock for inputing to digital I/O card
The level height of clock cycle is read at end, to record each output channel of programmable logic device to be measured by clock along driving
Low and high level result.For example programmable logic device detection time to be measured is 3s, then the memory on board in each channel can save
3s × 12MHz × 1bit=36Mb data.Save button is clicked after one-time detection, it can be by the memory on board number in 8 channels
According to depositing to PXI controller hard disk.
In the present embodiment, software platform uses NI LabView, and the memory value needed for detection data is greater than memory on board,
It so needs to save the 1s × 12MHz × channel 1bit/ × 8 channels=12MB/s data to hard disk, after to be detected in real time
It is played back.Data storage can be carried out with integrated data flow disk module, be believed the calibration in initial data and channel using api function
Breath is directly transferred to hard disk from board by dma mode.
Preferably, as shown in figure 9, the present embodiment provides a kind of programmable logic device detection device, it is applied to programmable
In logical device detection system, for making up programmable logic device in the prior art (PLD, including simple PLD, complexity
PLD, FPGA etc.) manual detection and open loop detecting method shortcoming.Programmable logic device inspection provided in this embodiment
Examining system, using industrial personal computer, A/D card, D/A card, frequency quantity input-output card, programmable logic device test jack and conditioning electricity
Road constitutes hardware platform and is combined logic to programmable logic device to be measured using NI Labwindows/CVI software platform
Detection, sequential logic detection (collection period is 1ms~2s), are acquired data, show and store；Using NI cabinet, NI
Controller, high speed digital I/O card carry out high frequency sequential logic detection design using NI Labwindows/CVI software platform
(sample frequency is 1~12MHz), the programmable logic device to be measured on control device is realized with specific, cured testing process
The automatic detection of part.The programmable logic device detection device includes detection module 10 and acquisition module 20, wherein detection module
10, for carrying out static combinational logic covering detection and dynamic linear time temporal logic relationship detection to programmable logic device to be measured；It obtains
Modulus block 20, for combining the result of static combinational logic covering detection and dynamic linear time temporal logic relationship detection and according to be measured
The peripheral circuit feature of programmable logic device, obtains the logic function of programmable logic device to be measured.
Detection module 10 carries out external characteristics detection to programmable logic device to be measured, and external characteristics detection mainly includes static group
Logical covering detection and dynamic linear time temporal logic relationship detects two ways.Wherein, static combinational logic covering detection is for obtaining
Take the combinational logic relationship between each pin of programmable logic device to be measured；The detection of dynamic linear time temporal logic relationship is to be measured for obtaining
Temporal and logic relation between each pin of programmable logic device.
Obtaining the static combinational logic covering detection of the combination of module 20 and the to be measured of dynamic linear time temporal logic Relation acquisition may be programmed
Combinational logic relationship and temporal and logic relation between each pin of logical device, and according to the outer of programmable logic device to be measured
Enclose circuit feature, the comprehensive logic function for obtaining programmable logic device to be measured.
Programmable logic device detection device provided in this embodiment, when using static combinational logic covering detection and dynamic
The detection of sequence logical relation obtains the external characteristics of the programmable logic device in aero-engine control device, and according to programmable
The peripheral circuit feature of logical device, in conjunction with the logic function for obtaining programmable logic device.It is provided in this embodiment programmable
Logical device detection device, it can be achieved that the programmable logic device in aero-engine control device automatic detection, system ring
Fast between seasonable, control time precision height, waveform complexity height, measurement range is wide and detection accuracy is high.
Optionally, referring to Figure 10, programmable logic device detection device provided in this embodiment, detection module 10 includes group
Logical Relation acquisition unit 11 and temporal and logic relation acquiring unit 12, combinational logic Relation acquisition unit 11, for treating
Survey programmable logic device and carry out static combinational logic covering detection, obtain the input pin of programmable logic device to be measured with it is defeated
The combinational logic relationship of pin out；Temporal and logic relation acquiring unit 12, for carrying out dynamic to programmable logic device to be measured
Temporal and logic relation detection, obtains the input pin of programmable logic device to be measured and the temporal and logic relation of output pin.
Combinational logic Relation acquisition unit 11 is compiled in the way of 1 (data area 000-3FF) of single step increasing to be measured
Journey logical device carries out static combinational logic covering detection, obtains the input pin and output pin of programmable logic device to be measured
Combinational logic relationship.
Temporal and logic relation acquiring unit 12 carries out the detection of dynamic linear time temporal logic relationship to programmable logic device to be measured, leads to
It crosses and input is combined to all input pins of programmable logic device to be measured, then in all defeated of programmable logic device
Variation relation of all input pins when combining input is obtained in pin out, to take the input of programmable logic device to be measured
The temporal and logic relation of pin and output pin.
Programmable logic device detection device provided in this embodiment, when using static combinational logic covering detection and dynamic
The detection of sequence logical relation, the combinational logic relationship and timing for obtaining the input pin and output pin of surveying programmable logic device are patrolled
The relationship of collecting.Programmable logic device detection device provided in this embodiment is, it can be achieved that compiling in aero-engine control device
The automatic detection of journey logical device, system response time is fast, control time precision is high, waveform complexity is high, measurement range is wide
And detection accuracy is high.
Preferably, as shown in figure 11, the present embodiment provides a kind of programmable logic device detection device, combinational logic relationships
Acquiring unit 11 includes that combinational logic input subelement 111, Combinational logic output subelement 112 and combinational logic obtain subelement
113, combinational logic inputs subelement 111, using Logic coverage and passs for the input pin to programmable logic device to be measured
It counts up；Combinational logic output subelement 112, the height of the output pin for acquiring and recording programmable logic device to be measured
Level；Combinational logic obtains subelement 113, the height of the output pin for the programmable logic device to be measured to acquisition and record
Low level is analyzed and is handled, and the combinational logic of the input pin and output pin that obtain programmable logic device to be measured closes
System.
As shown in figure 4, programmable logic device detection system includes that combinational logic detection device and sequential logic detection are set
Standby, combinational logic detection device includes computer 200, A/D card 300 and D/A card 400, and A/D card 300 and D/A card 400 connect
It connects between computer 200 and programmable logic device to be measured 100, A/D card 300 is used for programmable logic device 100 to be measured
The data of output carry out analog-to-digital conversion, and data of the D/A card 400 for exporting to computer 200 are into digital-to-analogue conversion.Combinational logic inspection
Measurement equipment is core with computer 200, A/D card 300 and D/A card 400, with test cable by A/D card 300, D/A card 400 with can
The respective channel of the corresponding programmable logic device 100 to be measured of programmed logic device test jack is attached.When detecting, together
When the power supply of programmable logic device, clock signal input and the input of frequency quantity signal are provided.The output of combinational logic only with work as
Preceding input is related, therefore combinational logic input subelement 111 uses all input pins of programmable logic device to be measured and patrols
The method for collecting covering and incremental count.Wherein, the voltage mode of D/A card is as shown in Figure 5.
The real-time display input-output wave shape in the user interface of computer display screen of Combinational logic output subelement 112,
The level height of all output pins of programmable logic device to be measured is recorded with text document format simultaneously.
Combinational logic obtains the height of the output pin of the programmable logic device to be measured of 113 pairs of subelement acquisitions and record
Level is analyzed and is handled, the truth table of available combinational logic, to obtain the input of programmable logic device to be measured
The combinational logic relationship of pin and output pin.
Programmable logic device detection device provided in this embodiment, by acquiring and recording programmable logic device to be measured
Output pin low and high level；The low and high level of the output pin of the programmable logic device to be measured of acquisition and record is carried out
Analysis and processing, obtain the input pin of programmable logic device to be measured and the combinational logic relationship of output pin；To acquisition and
The low and high level of the output pin of the programmable logic device to be measured of record is analyzed and is handled, and obtains programmable logic to be measured
The input pin of device and the combinational logic relationship of output pin, i.e., the input pin and efferent duct of programmable logic device to be measured
The combinational logic relational expression of foot.To realize the automatic detection of the programmable logic device in aero-engine control device, this
The programmable logic device detection device that embodiment provides, system response time is fast, control time precision is high, waveform complexity
Height, measurement range is wide and detection accuracy is high.
Further, as shown in figure 12, the present embodiment provides a kind of programmable logic device detection device, sequential logic is closed
It is that acquiring unit 12 is single including sequential logic input subelement 121, Sequential logic output subelement 122 and sequential logic acquisition
Member 123, sequential logic inputs subelement 121, for clock signal to be added on the input pin of programmable logic device to be measured
And clock signal；Sequential logic output subelement 122, the output pin for Simultaneous Monitoring programmable logic device to be measured export
Output signal variation relation；Sequential logic obtains subelement 123, for according to the programmable logic device of Simultaneous Monitoring
The variation relation of the output signal of output pin output finds out the input pin and output pin of programmable logic device to be measured
Temporal and logic relation.
As shown in fig. 7, sequential logic detection device includes number I/O card 500, integrated data flow table module 600, controller
700, user interface 800 and cabinet 900, digital I/O card 500 are connected with programmable logic device 100 to be measured, for as to
Survey the data input/output interface of programmable logic device 100；Integrated data flow table module 600 is connected with number I/O card 500,
Controller is connected with integrated data flow table module 600 and user interface 800 respectively, for storing data；Digital I/O card 500, collection
It is arranged in cabinet 900 at data flow disk module 600, controller 700.The output of sequential logic is not only related with input, also with
The Last status of programmable logic device detection system is related, and therefore, sequential logic inputs subelement 121 to be measured programmable
Clock signal and clock signal are added on the input pin of logical device to form clock edge, the output of sequential logic is examined
It surveys.
The variation of output level is driven by clock edge in the output pin of programmable logic device to be measured, therefore sequential logic
Export subelement 122 for all programmable logic device to be measured input pin on each combination, to output level into
The acquisition of row data and display, are detected and are recorded to the timing of each combination, while utilizing oscillograph and logic analyser
Carry out record and the comparison of timing waveform.
The design key that sequential logic obtains subelement 123 is to match clock frequency, therefore compiles to be measured
Journey logical device first carries out sequential logic detection (collection period be 1ms~2s), then carry out again higher speed acquisition (such as 1~
12MHz sample frequency) function the design of sequential logic detection device, and according to the programmable logic device to be measured of Simultaneous Monitoring
Output pin output output signal variation relation, find out programmable logic device input pin and output pin when
Sequence logical relation.Match different clock frequencies, to the software and hardware composition of programmable logic device detection system, sample rate,
Storage capacity is different.
Programmable logic device detection device provided in this embodiment, passes through the input pipe in programmable logic device to be measured
Clock signal and clock signal are added on foot；The output signal of the output pin output of Simultaneous Monitoring programmable logic device to be measured
Variation relation；It is closed according to the variation of the output signal of the output pin of the programmable logic device to be measured of Simultaneous Monitoring output
System, finds out the input pin of programmable logic device and the temporal and logic relation of output pin, to realize aero-engine control
The automatic detection of programmable logic device in device processed, system response time is fast, control time precision is high, waveform complexity
Height, measurement range is wide and detection accuracy is high.
Preferably, see Figure 13, the present embodiment provides a kind of programmable logic device detection device, obtaining module 20 includes
Functional status acquiring unit 21, functional status acquiring unit 21, for combining static combinational logic covering detection and dynamic time sequence
The result that logical relation detects and the peripheral circuit feature according to programmable logic device to be measured, obtain programmable logic to be measured
The functional block diagram and state transition graph of device, obtain the logic function of programmable logic device to be measured.
In the present embodiment, functional status acquiring unit 21 combines static combinational logic covering detection and dynamic linear time temporal logic
Relationship detection, obtains the combinational logic relationship and temporal and logic relation between each pin of programmable logic device to be measured, that is, obtains
The input pin of programmable logic device to be measured and the logic level of output pin, analysis obtain programmable logic device to be measured
Combinational logic relational expression；And according to demand signals, timing is adjusted in real time by hundreds of groups of merging, show that output timing is patrolled
Volume, and according to the peripheral circuit feature of programmable logic device to be measured, obtain the functional block diagram of programmable logic device to be measured
And state transition graph is detection, the analysis of programmable logic device to grasp the logic function of programmable logic device to be measured
Support is provided with verifying.
Programmable logic device detection device provided in this embodiment, when in conjunction with static combinational logic covering detection and dynamic
The result that sequence logical relation detects and the peripheral circuit feature according to programmable logic device to be measured show that be measured may be programmed is patrolled
The functional block diagram and state transition graph for collecting device, obtain the logic function of programmable logic device to be measured, to realize that aviation is sent out
The automatic detection of programmable logic device in motivation control device.Programmable logic device detection side provided in this embodiment
Method, system response time is fast, control time precision is high, waveform complexity is high, measurement range is wide and detection accuracy is high.
Programmable logic device detection method provided in this embodiment and device are completed and check and accept and come into operation, performance
Index is met the requirements, and has filled up the blank of the programmable logic device detection on domestic air mail engine control system.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (4)
1. a kind of programmable logic device detection method, which is characterized in that comprising steps of
Static combinational logic covering detection and dynamic linear time temporal logic relationship detection is carried out to programmable logic device to be measured；
It is patrolled in conjunction with the result of static combinational logic covering detection and dynamic linear time temporal logic relationship detection and according to be measured may be programmed
The peripheral circuit feature for collecting device obtains the functional block diagram and state transition graph of programmable logic device to be measured, and acquisition is to be measured can
The logic function of programmed logic device；
It is described that static combinational logic covering detection and dynamic linear time temporal logic relationship detection is carried out to programmable logic device to be measured
Step includes:
Static combinational logic covering detection is carried out to the programmable logic device to be measured, obtains the programmable logic device to be measured
The input pin of part and the combinational logic relationship of output pin；
The detection of dynamic linear time temporal logic relationship is carried out to the programmable logic device to be measured, obtains the programmable logic device to be measured
The input pin of part and the temporal and logic relation of output pin；
It is described that the static combinational logic covering of programmable logic device progress to be measured is detected, it obtains to be measured may be programmed and patrols
The step of combinational logic relationship of the input pin of volume device and output pin includes:
Logic coverage and incremental count are used to the input pin of the programmable logic device to be measured；
Acquire and record the low and high level of the output pin of the programmable logic device to be measured；
The low and high level of the output pin of the programmable logic device to be measured of acquisition and record is analyzed and handled, is obtained
The combinational logic relationship of the input pin and output pin of the programmable logic device to be measured out.
2. programmable logic device detection method according to claim 1, which is characterized in that
It is described that the detection of dynamic linear time temporal logic relationship is carried out to programmable logic device to be measured, obtain the programmable logic device to be measured
The step of temporal and logic relation of the input pin of part and output pin includes:
Clock signal and clock signal are added on the input pin of the programmable logic device to be measured；
The variation relation of the output signal of the output pin output of programmable logic device to be measured described in Simultaneous Monitoring；
According to the variation relation of the output signal of the output pin of the programmable logic device to be measured of Simultaneous Monitoring output, look for
The temporal and logic relation of the input pin and output pin of the programmable logic device to be measured out.
3. a kind of programmable logic device detection device characterized by comprising
Detection module (10), for carrying out to programmable logic device to be measured, static combinational logic covering is detected and dynamic time sequence is patrolled
The relationship of collecting detection；
It obtaining module (20), the acquisition module (20) includes functional status acquiring unit (21),
The functional status acquiring unit (21), for being patrolled in conjunction with the static combinational logic covering detection and the dynamic time sequence
The result that the relationship of collecting detects and the peripheral circuit feature according to the programmable logic device to be measured show that described may be programmed is patrolled
The functional block diagram and state transition graph of device are collected, the logic function of the programmable logic device to be measured is obtained；
The detection module (10) includes combinational logic Relation acquisition unit (11) and temporal and logic relation acquiring unit (12),
The combinational logic Relation acquisition unit (11), for carrying out static combinational logic to the programmable logic device to be measured
Covering detection, obtains the input pin of the programmable logic device to be measured and the combinational logic relationship of output pin；
The temporal and logic relation acquiring unit (12), for carrying out dynamic linear time temporal logic to the programmable logic device to be measured
Relationship detection, obtains the input pin of the programmable logic device to be measured and the temporal and logic relation of output pin；
The combinational logic Relation acquisition unit (11) includes combinational logic input subelement (111), Combinational logic output list
First (112) and combinational logic obtain subelement (113),
The combinational logic inputs subelement (111), uses and patrols for the input pin to the programmable logic device to be measured
Collect covering and incremental count；
The Combinational logic output subelement (112), for acquiring and recording the efferent duct of the programmable logic device to be measured
The low and high level of foot；
The combinational logic obtains subelement (113), for the defeated of the programmable logic device to be measured to acquisition and record
The low and high level of pin is analyzed and is handled out, obtains the input pin and output pin of the programmable logic device to be measured
Combinational logic relationship.
4. programmable logic device detection device according to claim 3, which is characterized in that
The temporal and logic relation acquiring unit (12) includes sequential logic input subelement (121), Sequential logic output list
First (122) and sequential logic obtain subelement (123),
The sequential logic inputs subelement (121), for being added on the input pin of the programmable logic device to be measured
Clock signal and clock signal；
The Sequential logic output subelement (122), the output pin for programmable logic device to be measured described in Simultaneous Monitoring
The variation relation of the output signal of output；
The sequential logic obtains subelement (123), for according to the defeated of the programmable logic device to be measured of Simultaneous Monitoring
The variation relation of the output signal of pin output out, finds out the input pin and output pin of the programmable logic device to be measured
Temporal and logic relation.
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| CN111366841B (en) * | 2020-04-07 | 2022-06-21 | 华北水利水电大学 | FPGA programmable logic unit test equipment and use method |
| CN114967643B (en) * | 2022-05-06 | 2024-05-14 | 中国电子信息产业集团有限公司第六研究所 | Method and device for testing spaceflight launching field control system and storage medium |
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| US20020078412A1 (en) * | 2000-12-14 | 2002-06-20 | Yongjiang Wang | Built-in self test for a programmable logic device using linear feedback shift registers and hierarchical signature generation |
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| CN101339227A (en) * | 2008-08-12 | 2009-01-07 | 中国人民解放军信息工程大学 | Programmable logic device pin attribute rapid discrimination technology |
| CN103472386A (en) * | 2013-09-26 | 2013-12-25 | 威海北洋电气集团股份有限公司 | Chip testing device and method based on FPGA |
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Address after: 412002 Dong Jiaduan, Zhuzhou, Hunan Patentee after: China Hangfa South Industrial Co. Ltd. Address before: 412002 Dong Jiaduan, Zhuzhou, Hunan Patentee before: China Southern Airlines Industry (Group) Co., Ltd. |