CN116626473A - Testing method, device, equipment and medium for vehicle-gauge master control chip - Google Patents
Testing method, device, equipment and medium for vehicle-gauge master control chip Download PDFInfo
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Abstract
The invention discloses a method, a device, equipment and a medium for testing a vehicle-level master control chip. The method comprises the following steps: acquiring a vehicle-gauge-level main control chip to be tested, and combining each computing core with a matched hardware peripheral component set to obtain a set control circuit; respectively loading a preset target test function into each computing core in the vehicle-gauge main control chip for execution, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement computation, and the full-working-condition operation of the vehicle-gauge main control chip is realized; and in the full-working-condition operation process of the vehicle-gauge main control chip, detecting the operation state information of each control circuit in real time, and acquiring the test result of the vehicle-gauge main control chip according to the operation state information. By the technical scheme, the performance test of the vehicle-standard master control chip in the all-working condition state can be realized, and the comprehensiveness and accuracy of the test of the vehicle-standard master control chip are improved.
Description
Technical Field
The present invention relates to the field of chip testing, and in particular, to a method, an apparatus, a device, and a medium for testing a vehicle-level master control chip.
Background
The vehicle-gauge chip refers to a chip which has technical standards reaching the vehicle-gauge level and can be applied to automobile control. The gauge class is one of the standard classes of specifications suitable for automotive electronics. The vehicle-mounted chip is a chip applied to automobiles, and the chip has higher requirements on reliability, such as a working temperature range, working stability, reject ratio and the like, unlike consumer products and industrial products. The product grade difference is mainly realized through complex chip design and production flow control, so that the product grade difference is different in the aspects of working temperature range, stability and the like.
When the vehicle controller design in the prior art tests the vehicle-standard chip, the function used on the automobile is tested under the interference of certain external environment, and the functions of the chip used on the automobile and the functions used on the controller are mainly covered.
The prior art has the following defects: the prior art only tests the functions of the vehicle, and does not test the main control chip under the full working condition of the chip, because of the limitation of the test, the application range and the capability of the chip are limited, and the comprehensiveness and the accuracy of the test result of the vehicle-level main control chip are poor.
Disclosure of Invention
The invention provides a method, a device, equipment and a medium for testing a vehicle-standard master control chip, which can solve the problems of poor comprehensiveness and accuracy of a vehicle-standard master control chip test result obtained in the prior art.
In a first aspect, a method for testing a vehicle-level master control chip is provided, the method comprising:
acquiring a vehicle-gauge-level main control chip to be tested, wherein the vehicle-gauge-level main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core respectively; each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit;
respectively loading a preset target test function into each computing core in the vehicle-gauge main control chip for execution, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement computation, and the full-working-condition operation of the vehicle-gauge main control chip is realized;
and in the full-working-condition operation process of the vehicle-gauge main control chip, detecting the operation state information of each control circuit in real time, and acquiring the test result of the vehicle-gauge main control chip according to the operation state information.
In a second aspect, the present invention provides a testing device for a vehicle-gauge master control chip, the device comprising:
the system comprises a master control chip acquisition module, a test module and a test module, wherein the master control chip acquisition module is used for acquiring a vehicle-standard master control chip to be tested, and the vehicle-standard master control chip comprises a plurality of computing cores and a hardware peripheral assembly set corresponding to each computing core respectively; each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit;
the full-working-condition operation module is used for loading a preset target test function into each calculation core in the vehicle-gauge main control chip respectively to execute so that each calculation core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement calculation, and full-working-condition operation of the vehicle-gauge main control chip is realized;
the state information evaluation module is used for detecting the operation state information of each control circuit in real time in the whole working condition operation process of the vehicle-standard main control chip and acquiring the test result of the vehicle-standard main control chip according to the operation state information.
In a third aspect, the present invention provides an electronic device, including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,,
the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor, so that the at least one processor can execute the testing method of the vehicle-mounted main control chip according to any embodiment of the present invention.
In a fourth aspect, the present invention provides a computer readable storage medium, where the computer readable storage medium stores computer instructions, where the computer instructions are configured to cause a processor to implement a method for testing a vehicle-gauge master control chip according to any one of the embodiments of the present invention when executed.
According to the technical scheme, the vehicle-standard master control chip to be tested is obtained, the vehicle-standard master control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core, each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit, then a preset target test function is respectively loaded into each computing core in the vehicle-standard master control chip to be executed, so that each computing core invokes all hardware peripheral components in the corresponding hardware peripheral component set to implement calculation, full-condition operation of the vehicle-standard master control chip is achieved, finally, in the full-condition operation process of the vehicle-standard master control chip, operation state information of each control circuit is detected in real time, and according to the operation state information, a test result of the vehicle-standard master control chip is obtained, the problem that the integrity and accuracy of the vehicle-standard master control chip test result obtained in the prior art are poor is solved, performance test of the vehicle-standard master control chip under the full-condition state is achieved, and the integrity and accuracy of the vehicle-standard master control chip test is improved.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a testing method of a vehicle-level master control chip according to a first embodiment of the present invention;
fig. 2a is a flowchart of a testing method of a vehicle-level master control chip according to a second embodiment of the present invention;
fig. 2b is a functional verification method algorithm frame of a vehicle-level master control chip obtained by the method according to the second embodiment of the present invention;
FIG. 2c is a schematic signal diagram of an injection signal obtained by a method according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of a testing device for a vehicle-gauge-level master control chip according to a third embodiment of the present invention;
fig. 4 is a schematic structural diagram of an electronic device for implementing a testing method of a vehicle-mounted main control chip according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a flowchart of a testing method for a vehicle-mounted main control chip according to a first embodiment of the present invention, where the method may be performed by a testing device for a vehicle-mounted main control chip, the testing device for a vehicle-mounted main control chip may be implemented in hardware and/or software, and the testing device for a vehicle-mounted main control chip may be configured in a terminal or a server having a testing function for a vehicle-mounted main control chip. As shown in fig. 1, the method includes:
s110, acquiring a vehicle-mounted master control chip to be tested.
The vehicle-level main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core respectively; each computing core is combined with a matched set of hardware peripheral components to obtain a set control circuit.
Wherein, the car rule level main control chip can include: a control chip, a power chip, a sensor chip and the like; further, the vehicle-mounted master control chip comprises: the system comprises a processor, a system controller, a system configuration module, a fault manager and a chip internal function module; furthermore, the vehicle-mounted chip can be a domestic vehicle-mounted chip.
In this embodiment, the set of hardware peripheral components may include: the system comprises a synchronous peripheral interface device, a communication controller, a controller area network, a synchronous serial bus, a universal timer, a random access memory, an Ethernet connector, an instant messaging device, a real dynamic frequency converter, a read-only memory and the like.
Specifically, in this embodiment, the objective test function is an initial angle calculation function of the vehicle;
the vehicle-level master control chip comprises a first computing core, a second computing core and a third computing core; the first set of hardware peripheral components corresponding to the first computing core includes a random access memory, a synchronous peripheral interface, a communication controller, a controller area network, a synchronous serial bus, and a universal timer; the second hardware peripheral component set corresponding to the second computing core comprises a universal timer, a random access memory, an Ethernet connector and an instant messenger; the third set of hardware peripheral components corresponding to the third computing core includes a universal timer, a synchronous peripheral interface, a real dynamic frequency converter and a read-only memory; the first computing core is combined with the matched hardware peripheral component set to obtain a whole vehicle control circuit, the second computing core is combined with the matched hardware peripheral component set to obtain a motor control circuit, and the third computing core is combined with the matched hardware peripheral component set to obtain an engine control circuit.
The synchronous peripheral interface device can be used for realizing that the singlechip and various peripheral equipment are communicated in a serial mode so as to exchange information; the communication controller may be a communication interface device that controls data transmission in data communication data; the controller area network can be used for exchanging information among the vehicle-mounted electronic control devices to form an automobile electronic control network; the Ethernet connector can realize communication connection between the Ethernet and the automobile; the read-only memory is used for reading out pre-stored information.
And S120, respectively loading a preset target test function into each computing core in the vehicle-mounted main control chip for execution, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement computation, and the full-working-condition operation of the vehicle-mounted main control chip is realized.
The target test function can be a calculation function of the initial angular position of the motor controller.
Further, the full-working condition operation of the vehicle-gauge master control chip is as follows: the current vehicle-gauge-level main control chip operates in a full-load state, and the working state that all resources contained in the vehicle-gauge-level main control chip are called; in the embodiment, the performance test of all hardware and software resources contained in the vehicle-standard master control chip can be realized by realizing the full-working-condition operation of the vehicle-standard master control chip, so that the comprehensiveness and accuracy of the vehicle-standard master control chip test are improved.
In this embodiment, in a process of loading a preset target test function into each computing core in the vehicle-gauge main control chip to execute the target test function, the method further includes: and injecting a high-temperature test environment and/or a temperature impact test environment into each component included in the vehicle-mounted main control chip.
In the embodiment, the chip running condition of the vehicle-mounted main control chip in the interference environment can be tested by injecting the high-temperature test environment and/or the temperature impact test environment into the vehicle-mounted main control chip, so that the comprehensiveness and accuracy of the vehicle-mounted main control chip test are improved; specifically, the high temperature test environment may be a high temperature environment with a temperature of 60 ℃ and above 60 ℃.
And S130, detecting the running state information of each control circuit in real time in the whole-working-condition running process of the vehicle-standard master control chip, and acquiring a test result of the vehicle-standard master control chip according to the running state information.
Wherein the test result may include: and the calculation result of the target test function is correct, the test is successful, or the calculation result of the target test function is incorrect, and the test fails.
Specifically, after the test result of the vehicle-mounted master control chip is obtained according to the running state information, the method further comprises: performing data read-write test on the vehicle-mounted main control chip according to a preset read-write frequency, and recording a test result of the read-write test; and acquiring a read-write test result matched with the target main control chip according to the test result.
In this embodiment, specifically, periodic timing reading and writing is performed on independent data storage areas of each CPU (Central Processing Unit ) of the vehicle-mounted master control chip; for example, the data of four groups, namely, 0x00,0x5a,0xa5 and 0xFF, may be written once and read every second, and the correctness of the read data is judged, that is, whether the read data is the data of four groups, namely, 0x00,0x5a,0xa5 and 0xFF, is judged, the judgment result is obtained, and then the judgment result is transmitted to a recording part outside the controller, and it should be noted that the number of times of reading and writing should not be less than the number of times of reading and writing in a storage area specified by a manual. By the method, the data storage performance of each CPU of the vehicle-mounted main control chip can be tested, so that the comprehensiveness and accuracy of the vehicle-mounted main control chip test are improved.
According to the technical scheme, the vehicle-gauge main control chip to be tested is obtained, the vehicle-gauge main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core, each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit, then a preset target test function is respectively loaded into each computing core in the vehicle-gauge main control chip to be executed, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement calculation, full-condition operation of the vehicle-gauge main control chip is achieved, finally, in the full-condition operation process of the vehicle-gauge main control chip, operation state information of each control circuit is detected in real time, and according to the operation state information, a test result of the vehicle-gauge main control chip is obtained, performance test of the vehicle-gauge main control chip in the full-condition state is achieved, and the comprehensiveness and accuracy of the vehicle-gauge main control chip test are improved.
Example two
Fig. 2a is a flowchart of a testing method for a vehicle-mounted main control chip according to a second embodiment of the present invention, where the method is based on the above embodiment, and specifically in this embodiment, a method for loading a preset target test function into each computing core in the vehicle-mounted main control chip to execute the test function is supplemented.
As shown in fig. 2a, the method comprises:
s210, acquiring a vehicle-mounted main control chip to be tested, and executing S220 and S230.
The vehicle-level main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core respectively; each computing core is combined with a matched set of hardware peripheral components to obtain a set control circuit.
S220, respectively loading a preset target test function into each computing core in the vehicle-mounted main control chip for execution, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement computation, and the full-working-condition operation of the vehicle-mounted main control chip is realized.
S230, inputting a gear signal of an engine to a first computing core, inputting a vehicle speed signal and an Ethernet communication signal to a second computing core, and inputting a rotation change signal to a third computing core.
The target test function is a calculation function designed independently for verifying the chip function, and the main functions of the target test function are engine advance angle calculation and oil injection driving waveform calculation, vehicle speed signal acquisition of whole vehicle control, network data forwarding and high-low side driving setting, rotation change signal acquisition of motor signals and three-phase motor driving. The first computing core mainly examines the dispatching of the random access memory, the synchronous peripheral interface, the communication controller, the controller area network, the synchronous serial bus and the universal timer, the second computing core mainly examines the dispatching of the universal timer, the random access memory, the Ethernet connector and the instant messaging device, and the third computing core mainly examines the dispatching of the universal timer, the synchronous peripheral interface, the real dynamic frequency converter and the read-only memory; the general timer is complex and is divided into a plurality of functional modules, so that three computing cores are used. The speed signal is needed to be transmitted among the three calculation cores and stored in the random access memories corresponding to the CPUs, so that the stability and the data safety of bus transmission are ensured; further, for external signal injection, a gear signal of an engine needs to be injected into the first computing core, and whether an oil injection signal obtained by computing of the first computing core meets the requirement of a gear input signal is judged; further, a vehicle speed signal and an Ethernet communication signal are injected into the second computing core, the output signal obtained through calculation and forwarding data obtained from the first computing core and the third computing core are judged, and then a rotation change signal is injected into the third computing core, and the correctness of the generated three-phase driving signal is judged.
S240, in the whole-working-condition operation process of the vehicle-gauge main control chip, detecting the operation state information of each control circuit in real time, and acquiring a test result of the vehicle-gauge main control chip according to the operation state information.
Specifically, in the full operating mode operation process of the vehicle-gauge main control chip, the operation state information of each control circuit is detected in real time, and the method comprises the following steps:
detecting whether an oil injection signal output by a vehicle control circuit corresponding to a first calculation core is advance angle data meeting the preset gear input signal requirement or not in real time; detecting whether signals output by a motor control circuit corresponding to the second calculation core are vehicle speed and torque data meeting the preset threshold requirements or not in real time; and detecting whether the signal output by the engine control circuit corresponding to the second calculation core is the rotating speed data meeting the requirement of the preset accuracy in real time.
Specifically, in this embodiment, a gear signal of an engine is injected into a first computing core, and whether an oil injection signal obtained by computing by the first computing core meets advance angle data required by a gear input signal is determined; further, a vehicle speed signal and an Ethernet communication signal are injected into the second computing core, whether signals output by a motor control circuit corresponding to the second computing core are vehicle speed and torque data meeting the preset threshold requirement or not is detected, whether signals output by an engine control circuit corresponding to the second computing core are rotating speed data meeting the preset accuracy requirement or not is detected, then a rotation change signal is injected into the third computing core, and correctness of the generated three-phase driving signal is judged.
According to the technical scheme, the vehicle-gauge main control chip to be tested is obtained, the vehicle-gauge main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core, each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit, then a preset target test function is respectively loaded into each computing core in the vehicle-gauge main control chip to be executed, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement calculation, full-condition operation of the vehicle-gauge main control chip is achieved, finally, in the full-condition operation process of the vehicle-gauge main control chip, operation state information of each control circuit is detected in real time, and according to the operation state information, a test result of the vehicle-gauge main control chip is obtained, performance test of the vehicle-gauge main control chip in the full-condition state is achieved, and the comprehensiveness and accuracy of the vehicle-gauge main control chip test are improved.
DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION
In order to more clearly describe the technical solution provided by the embodiment of the present invention, this embodiment will simply introduce a specific implementation scenario obtained according to this embodiment.
And as shown in fig. 2b, the algorithm framework of the function verification method of the vehicle-mounted master control chip is provided.
The GTM shown in fig. 2b is a corresponding universal timer in this embodiment, the SPI is a corresponding synchronous peripheral interface in this embodiment, the CCU is a corresponding communication controller in this embodiment, the CAN is a corresponding controller area network in this embodiment, the I2C is a corresponding synchronous serial bus in this embodiment, the GPIO is a corresponding random access memory in this embodiment, the ETH is a corresponding ethernet connector in this embodiment, the RAM is a corresponding random access memory in this embodiment, the MSN is a corresponding instant messenger in this embodiment, the FADC is a corresponding real dynamic frequency converter in this embodiment, and the ROM is a corresponding read-only memory in this embodiment.
The target test function is a calculation function designed independently for verifying the chip function, and the main functions of the target test function are engine advance angle calculation and oil injection driving waveform calculation, vehicle speed signal acquisition of whole vehicle control, network data forwarding and high-low side driving setting, rotation change signal acquisition of motor signals and three-phase motor driving. The first computing core mainly examines the dispatching of the random access memory, the synchronous peripheral interface, the communication controller, the controller area network, the synchronous serial bus and the universal timer, the second computing core mainly examines the dispatching of the universal timer, the random access memory, the Ethernet connector and the instant messaging device, and the third computing core mainly examines the dispatching of the universal timer, the synchronous peripheral interface, the real dynamic frequency converter and the read-only memory; the general timer is complex and is divided into a plurality of functional modules, so that three computing cores are used. The speed signal is needed to be transmitted among the three calculation cores and stored in the random access memories corresponding to the CPUs, so that the stability and the data safety of bus transmission are ensured; further, for external signal injection, a gear signal of an engine needs to be injected into the first computing core, and whether an oil injection signal obtained by computing of the first computing core meets the requirement of a gear input signal is judged; further, a vehicle speed signal and an Ethernet communication signal are injected into the second computing core, the output signal obtained through calculation and forwarding data obtained from the first computing core and the third computing core are judged, and then a rotation change signal is injected into the third computing core, and the correctness of the generated three-phase driving signal is judged.
Exemplary, fig. 2c is a graph illustrating the injection signal calculated by the first calculation core after injecting the gear signal of the engine into the first calculation core in the above steps. Optionally, the second computing core is similar to the third computing core in working principle, and the difference is that the second computing core mainly performs data computation on a vehicle speed signal, an engine rotation speed signal, a motor rotation speed signal, a torque signal, a driving signal and a vehicle-mounted ethernet signal, and the point computing core mainly performs computation on a rotation signal and a three-phase motor driving signal.
Example III
Fig. 3 is a schematic structural diagram of a testing device for a vehicle-gauge-level master control chip according to a third embodiment of the present invention.
As shown in fig. 3, the apparatus includes:
the master control chip acquisition module 310 is configured to acquire a vehicle-gauge-level master control chip to be tested, where the vehicle-gauge-level master control chip includes a plurality of computing cores and a hardware peripheral component set corresponding to each computing core respectively; each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit;
the all-condition operation module 320 is configured to load a preset target test function into each computing core in the vehicle-level master control chip to execute the target test function, so that each computing core invokes all hardware peripheral components in the corresponding hardware peripheral component set to implement computation, thereby realizing all-condition operation of the vehicle-level master control chip;
the state information evaluation module 330 is configured to detect, in real time, operation state information of each control circuit during an all-condition operation process of the vehicle-gauge main control chip, and obtain a test result of the vehicle-gauge main control chip according to the operation state information.
According to the technical scheme, the vehicle-gauge main control chip to be tested is obtained, the vehicle-gauge main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core, each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit, then a preset target test function is respectively loaded into each computing core in the vehicle-gauge main control chip to be executed, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement calculation, full-condition operation of the vehicle-gauge main control chip is achieved, finally, in the full-condition operation process of the vehicle-gauge main control chip, operation state information of each control circuit is detected in real time, and according to the operation state information, a test result of the vehicle-gauge main control chip is obtained, performance test of the vehicle-gauge main control chip in the full-condition state is achieved, and the comprehensiveness and accuracy of the vehicle-gauge main control chip test are improved.
On the basis of the above embodiment, the testing device for the vehicle-gauge-level master control chip further includes:
the test environment creation module is used for injecting a high-temperature test environment and/or a temperature impact test environment into each component included in the vehicle-mounted main control chip in the process of loading a preset target test function into each computing core in the vehicle-mounted main control chip for execution.
Based on the above embodiment, the full-condition operation module 320 further includes:
a first signal input unit for inputting a gear signal of the engine to the first calculation core;
a second signal input unit for inputting a vehicle speed signal and an ethernet communication signal to a second calculation core;
and a third signal input unit for inputting the rotation signal to the third computing core.
Based on the above embodiment, the state information evaluation module 330 includes:
the first detection unit is used for detecting whether the oil injection signal output by the whole vehicle control circuit corresponding to the first calculation core is advance angle data meeting the preset gear input signal requirement or not in real time;
the second detection unit is used for detecting whether the signal output by the motor control circuit corresponding to the second calculation core is the speed and torque data meeting the preset threshold requirement or not in real time;
and the third detection unit is used for detecting whether the signal output by the engine control circuit corresponding to the second calculation core is the rotating speed data meeting the requirement of the preset accuracy in real time.
On the basis of the above embodiment, the testing device of the vehicle-gauge-level main control chip further comprises
The read-write test module is used for carrying out data read-write test on the vehicle-mounted main control chip according to a preset read-write frequency after obtaining the test result of the vehicle-mounted main control chip according to the running state information, and recording the test result of the read-write test; and acquiring a read-write test result matched with the target main control chip according to the test result.
The testing device of the vehicle-mounted master control chip provided by the embodiment of the invention can execute the testing method of the vehicle-mounted master control chip provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the executing method.
Example IV
Fig. 4 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 4, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the test method of the vehicle-level master control chip.
Accordingly, the method comprises the following steps:
acquiring a vehicle-gauge-level main control chip to be tested, wherein the vehicle-gauge-level main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core respectively; each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit;
respectively loading a preset target test function into each computing core in the vehicle-gauge main control chip for execution, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement computation, and the full-working-condition operation of the vehicle-gauge main control chip is realized;
and in the full-working-condition operation process of the vehicle-gauge main control chip, detecting the operation state information of each control circuit in real time, and acquiring the test result of the vehicle-gauge main control chip according to the operation state information.
In some embodiments, the method of testing a vehicle-level master control chip may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the above-described testing method of the vehicle-level main control chip may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the method of testing the vehicle-level master control chip in any other suitable manner (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
Claims (10)
1. The method for testing the vehicle-mounted master control chip is characterized by comprising the following steps of:
acquiring a vehicle-gauge-level main control chip to be tested, wherein the vehicle-gauge-level main control chip comprises a plurality of computing cores and a hardware peripheral component set corresponding to each computing core respectively; each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit;
respectively loading a preset target test function into each computing core in the vehicle-gauge main control chip for execution, so that each computing core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement computation, and the full-working-condition operation of the vehicle-gauge main control chip is realized;
and in the full-working-condition operation process of the vehicle-gauge main control chip, detecting the operation state information of each control circuit in real time, and acquiring the test result of the vehicle-gauge main control chip according to the operation state information.
2. The method of claim 1, wherein in the process of loading the preset objective test function into each computing core in the vehicle-level master control chip for execution, the method further comprises:
and injecting a high-temperature test environment and/or a temperature impact test environment into each component included in the vehicle-mounted main control chip.
3. The method of claim 1, wherein the objective test function is an initial angle calculation function of the vehicle;
the vehicle-level master control chip comprises a first computing core, a second computing core and a third computing core;
the first set of hardware peripheral components corresponding to the first computing core includes a random access memory, a synchronous peripheral interface, a communication controller, a controller area network, a synchronous serial bus, and a universal timer;
the second hardware peripheral component set corresponding to the second computing core comprises a universal timer, a random access memory, an Ethernet connector and an instant messenger;
the third set of hardware peripheral components corresponding to the third computing core includes a universal timer, a synchronous peripheral interface, a real dynamic frequency converter and a read-only memory;
the first computing core is combined with the matched hardware peripheral component set to obtain a whole vehicle control circuit, the second computing core is combined with the matched hardware peripheral component set to obtain a motor control circuit, and the third computing core is combined with the matched hardware peripheral component set to obtain an engine control circuit.
4. The method of claim 3, wherein the loading of the predetermined objective test function into each computing core in the vehicle-level master control chip is performed while the loading of the predetermined objective test function into each computing core in the vehicle-level master control chip is performed, further comprising:
inputting a gear signal of an engine to a first computing core;
inputting a vehicle speed signal and an Ethernet communication signal to the second computing core; and
and inputting a rotation signal to a third computing core.
5. The method of claim 4, wherein detecting the operating state information of each control circuit in real time during the full operating mode of the vehicle-level master control chip comprises:
detecting whether an oil injection signal output by a vehicle control circuit corresponding to a first calculation core is advance angle data meeting the preset gear input signal requirement or not in real time;
detecting whether signals output by a motor control circuit corresponding to the second calculation core are vehicle speed and torque data meeting the preset threshold requirements or not in real time;
and detecting whether the signal output by the engine control circuit corresponding to the second calculation core is the rotating speed data meeting the requirement of the preset accuracy in real time.
6. The method of claim 1, further comprising, after obtaining the test result of the vehicle-level master control chip according to the operation state information:
performing data read-write test on the vehicle-mounted main control chip according to a preset read-write frequency, and recording a test result of the read-write test;
and acquiring a read-write test result matched with the target main control chip according to the test result.
7. The utility model provides a car rule level main control chip's testing arrangement which characterized in that includes:
the system comprises a master control chip acquisition module, a test module and a test module, wherein the master control chip acquisition module is used for acquiring a vehicle-standard master control chip to be tested, and the vehicle-standard master control chip comprises a plurality of computing cores and a hardware peripheral assembly set corresponding to each computing core respectively; each computing core is combined with the matched hardware peripheral component set to obtain a set control circuit;
the full-working-condition operation module is used for loading a preset target test function into each calculation core in the vehicle-gauge main control chip respectively to execute so that each calculation core can call all hardware peripheral components in the corresponding hardware peripheral component set to implement calculation, and full-working-condition operation of the vehicle-gauge main control chip is realized;
the state information evaluation module is used for detecting the operation state information of each control circuit in real time in the whole working condition operation process of the vehicle-standard main control chip and acquiring the test result of the vehicle-standard main control chip according to the operation state information.
8. The utility model provides a car rule level main control chip's testing arrangement which characterized in that still includes:
the test environment creation module is used for injecting a high-temperature test environment and/or a temperature impact test environment into each component included in the vehicle-mounted main control chip in the process of loading a preset target test function into each computing core in the vehicle-mounted main control chip for execution.
9. An electronic device, the electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the method of testing the vehicle-level main control chip of any one of claims 1-6.
10. A computer readable storage medium storing computer instructions for causing a processor to execute the method for testing the vehicle-mounted master control chip according to any one of claims 1 to 6.
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| CN116908659A (en) * | 2023-09-12 | 2023-10-20 | 江苏祥和电子科技有限公司 | Reliability test method and system for vehicle-gauge-level packaging welding spots |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116908659A (en) * | 2023-09-12 | 2023-10-20 | 江苏祥和电子科技有限公司 | Reliability test method and system for vehicle-gauge-level packaging welding spots |
| CN116908659B (en) * | 2023-09-12 | 2023-11-28 | 江苏祥和电子科技有限公司 | Reliability test method and system for vehicle-gauge-level packaging welding spots |
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