CN116300800A - Signal verification method and device, vehicle and storage medium - Google Patents
Signal verification method and device, vehicle and storage medium Download PDFInfo
- Publication number
- CN116300800A CN116300800A CN202310147292.0A CN202310147292A CN116300800A CN 116300800 A CN116300800 A CN 116300800A CN 202310147292 A CN202310147292 A CN 202310147292A CN 116300800 A CN116300800 A CN 116300800A
- Authority
- CN
- China
- Prior art keywords
- verification
- result
- signal
- processing result
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012795 verification Methods 0.000 title claims abstract description 267
- 238000000034 method Methods 0.000 title claims abstract description 63
- 238000012545 processing Methods 0.000 claims abstract description 249
- 238000004422 calculation algorithm Methods 0.000 claims abstract description 50
- 238000004590 computer program Methods 0.000 claims description 16
- 230000015654 memory Effects 0.000 claims description 12
- 238000004806 packaging method and process Methods 0.000 claims 1
- 238000004891 communication Methods 0.000 abstract description 21
- 230000005540 biological transmission Effects 0.000 abstract description 11
- 230000008569 process Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 5
- 238000013524 data verification Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 238000004364 calculation method Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 230000003993 interaction Effects 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 125000004122 cyclic group Chemical group 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000010801 machine learning Methods 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000001953 sensory effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24065—Real time diagnostics
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Small-Scale Networks (AREA)
Abstract
The embodiment of the invention discloses a signal verification method, a signal verification device, a vehicle and a storage medium. The method comprises the following steps: determining a first processing result by the first ECU according to the signal to be transmitted, the type of the signal to be transmitted and a set verification algorithm; determining whether a second processing result is required to be determined according to the first processing result when the type identification indicates the first type through the SOC of the second ECU, and sending the determined second processing result to the MCU of the second ECU; transmitting a first processing result to the MCU when the type identifier indicates the second type through the SOC; and determining a target verification result by the MCU according to the received processing result. The signal sent by the first ECU is primarily processed through the SOC, and then the MCU is used for checking the signal, so that the problems of signal input and signal checking of data transmission signals only by the MCU are avoided, and the universality of signal checking of ECU communication is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of vehicle signal processing, in particular to a signal verification method and device, a vehicle and a storage medium.
Background
With the increasing abundance of automobile functions, communication between automobile electronic control units (Electronic Control Unit, ECU) is becoming more and more complex, especially in the context of functional safety development, if signal transmission is incorrect due to environmental or hardware factors, it will have a significant impact on implementation of functions and even safety operation of vehicles, so that verification and protection are required to be implemented for data transmission of key signals related to functional safety, so as to ensure correctness of ECU communication data transmission. The ECU usually needs a plurality of processing chips to cooperatively implement, and is generally in the form of a System On Chip (SOC) +micro-control unit (Micro Control Unit, MCU) architecture, where complex computation can be implemented by a SOC with strong performance, and functional logic and monitoring can be implemented by an MCU with high stability and functional safety.
Currently, an MCU in an ECU is generally responsible for signal input and signal verification of a data transmission signal so as to realize verification protection of the data transmission. However, the above scheme is only suitable for verification protection of ECU communication with less information interaction and simple function implementation, and is not suitable for complex vehicle communication systems which are more commonly used nowadays, so that the universality of signal verification of ECU communication is affected.
Disclosure of Invention
The embodiment of the invention provides a signal verification method, a signal verification device, a vehicle and a storage medium, so as to improve the universality of signal verification of ECU communication.
According to an aspect of an embodiment of the present invention, there is provided a signal verification method, including:
determining a first processing result by a first ECU according to a signal to be transmitted, the type of the signal to be transmitted and a set verification algorithm, and transmitting the first processing result and a type identifier to a second ECU, wherein the type comprises a first type and a second type;
determining whether a second processing result needs to be determined according to the first processing result when the type identifier indicates a first type through the SOC of the second ECU, and sending the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined;
transmitting the first processing result to the MCU when the type identifier indicates a second type through the SOC;
and determining a target verification result of the signal to be transmitted according to the received processing result by the MCU.
According to another aspect of an embodiment of the present invention, there is provided a signal verification apparatus, including:
the first determining module is used for determining a first processing result according to a signal to be sent, the type of the signal to be sent and a set check algorithm through the first ECU, and sending the first processing result and a type identifier to the second ECU, wherein the type comprises a first type and a second type;
The second determining module is used for determining whether a second processing result needs to be determined according to the first processing result when the type identifier indicates the first type through the SOC of the second ECU, and sending the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined;
the sending module is used for sending the first processing result to the MCU when the type identifier indicates a second type through the SOC;
and the verification module is used for determining a target verification result of the signal to be transmitted according to the received processing result through the MCU.
According to another aspect of an embodiment of the present invention, there is provided a vehicle including:
a first ECU;
a second ECU;
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the signal verification method according to any one of the embodiments of the present invention.
According to another aspect of the embodiments of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the signal verification method according to any one of the embodiments of the present invention when executed.
According to the technical scheme, a first ECU determines a first processing result according to a signal to be sent, the type of the signal to be sent and a set verification algorithm, and sends the first processing result and a type identifier to a second ECU, wherein the type comprises a first type and a second type; determining whether a second processing result needs to be determined according to the first processing result when the type identification indicates the first type through the SOC of the second ECU, and sending the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined; through the SOC, when the type identifier indicates the second type, a first processing result is sent to the MCU; and determining a target verification result of the signal to be transmitted according to the received processing result by the MCU. According to the technical scheme, the signal sent by the first ECU is primarily processed through the SOC of the second ECU, and then the verification processing of the signal is performed through the MCU of the second ECU, so that the problem that the MCU is only used for signal input and signal verification of data transmission signals is avoided, and the universality of the signal verification of ECU communication is improved. In addition, the SOC of the second ECU receives the input signal, so that the problem of increased cost caused by the additional addition of the MCU is avoided.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a signal verification method according to a first embodiment of the present invention;
fig. 2 is a flow chart of a signal checking method according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of a signal checking device according to a third embodiment of the present invention;
fig. 4 is a schematic structural diagram of a vehicle according to a fourth embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a schematic flow chart of a signal verification method according to an embodiment of the present invention, where the method is applicable to signal verification of ECU communications, and the method may be performed by a signal verification device, where the device may be implemented by software and/or hardware and is generally integrated in a vehicle.
As shown in fig. 1, a signal verification method provided in a first embodiment of the present invention includes the following steps:
s110, determining a first processing result through the first ECU according to the signal to be sent, the type of the signal to be sent and a set verification algorithm, and sending the first processing result and the type identifier to the second ECU.
In the present embodiment, the first ECU may be understood as an ECU that transmits the signal side. Accordingly, the second ECU may be understood as an ECU that receives and verifies the signal transmitted by the first ECU. The signal to be transmitted may be understood as a signal to be transmitted to the second ECU.
The types of signals to be transmitted may include a first type and a second type. The first type may be understood as the type in which the signal to be transmitted includes a signal to be checked and a non-check signal. The second type may be understood as the type in which the signal to be transmitted comprises a signal to be checked. The signal to be verified can be understood as a signal to be verified. A non-verified signal may be understood as a normal signal without verification.
The set calibration algorithm can be understood as a preset calibration algorithm for signal calibration; the setting check algorithm is not particularly limited here, and may be, for example, a cyclic redundancy check (Cyclic Redundancy Check, CRC) check algorithm, a parity check algorithm, or the like.
The first processing result may be understood as a result of the first ECU processing the signal to be transmitted. The type identifier may be understood as an identifier indicating the type of signal to be transmitted. The different types may correspond to different first processing result determination methods.
In an embodiment, the first ECU may first identify the signal to be transmitted to the second ECU (i.e., the signal to be transmitted), and determine the type of the signal to be transmitted. If the type of the signal to be transmitted is the first type, corresponding verification processing can be carried out on the signal to be verified in the signal to be transmitted through setting a verification algorithm so as to obtain a corresponding verification result; and performing verification processing on a verification result corresponding to the signal to be verified and a message formed by the signal to be transmitted through a set verification algorithm to obtain a corresponding verification result, and taking the obtained verification result and the message formed by the obtained verification result as a first processing result.
In an embodiment, if the type of the signal to be sent is the second type, since the signal to be sent of the second type only includes the signal to be checked, a corresponding check result can be obtained by directly performing corresponding check processing on the message composed of the signal to be sent through a set check algorithm, and the check result and the message composed of the check result are used as the first processing result.
S120, determining whether a second processing result needs to be determined according to the first processing result when the type identification indicates the first type through the SOC of the second ECU, and sending the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined.
In the present embodiment, the second processing result may be understood as a processing result determined based on the first processing result.
How to determine whether the second processing result needs to be determined according to the first processing result is not particularly limited herein; if the message formed by the verification result corresponding to the signal to be verified and the signal to be transmitted in the first processing result can be verified to obtain the corresponding verification result; comparing the obtained verification result with the verification result in the first processing result, and if the verification result is consistent with the verification result in the first processing result, determining a second processing result; if the result is inconsistent, the second processing result does not need to be determined, and the verification failure is also indicated. On the basis, after the second processing result is required to be determined, the signal to be checked and the checking result corresponding to the signal to be checked can be used as the second processing result, and the second processing result is sent to the MCU of the second ECU to be further checked.
S130, sending the first processing result to the MCU when the type identifier indicates a second type through the SOC.
In this embodiment, if the type of the signal to be sent is the second type, since the signal to be sent of the second type only includes the signal to be checked, the first processing result may be directly sent to the MCU through the SOC to be checked further.
S140, determining a target verification result of the signal to be transmitted according to the received processing result through the MCU.
In this embodiment, the received processing result may include a second processing result corresponding to the first type or a first processing result corresponding to the second type. Different processing results may correspond to different target verification result determination methods. The target verification result may be understood as a final verification result of the signal to be transmitted.
In an embodiment, if the received processing result is a second processing result corresponding to the first type, the to-be-verified signal in the second processing result may be verified by setting a verification algorithm to obtain a corresponding verification result, and then the obtained verification result is compared with the verification result corresponding to the to-be-verified signal in the second processing result, if the obtained verification result is consistent with the verification result corresponding to the to-be-verified signal in the second processing result, the target verification result may be determined to be verification success, and if the obtained verification result is inconsistent with the verification result, the target verification result may be determined to be verification failure.
In an embodiment, if the received processing result is a first processing result corresponding to the second type, the message composed of the signals to be sent in the first processing result may be checked by a set check algorithm to obtain a corresponding check result, and then the obtained check result is compared with the check result corresponding to the signals to be sent in the first processing result, if the obtained check result is consistent with the check result corresponding to the signals to be sent in the first processing result, the target check result may be determined to be successful, and if the obtained check result is inconsistent with the check result, the target check result may be determined to be failed.
According to the signal verification method provided by the embodiment of the invention, a first ECU determines a first processing result according to a signal to be transmitted, the type of the signal to be transmitted and a set verification algorithm, and sends the first processing result and a type identifier to a second ECU, wherein the type comprises a first type and a second type; determining whether a second processing result needs to be determined according to the first processing result when the type identification indicates the first type through the SOC of the second ECU, and sending the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined; through the SOC, when the type identifier indicates the second type, a first processing result is sent to the MCU; and determining a target verification result of the signal to be transmitted according to the received processing result by the MCU. According to the method, the signal sent by the first ECU is primarily processed through the SOC of the second ECU, and then the signal verification processing is performed through the MCU of the second ECU, so that the problem that the MCU is only used for signal input and signal verification of data transmission signals is avoided, and the universality of the signal verification of ECU communication is improved. In addition, the SOC of the second ECU receives the input signal, so that the problem of increased cost caused by the additional addition of the MCU is avoided.
Example two
Fig. 2 is a schematic flow chart of a signal verification method according to a second embodiment of the present invention, where the second embodiment is refined based on the above embodiments. In this embodiment, a process of determining the first processing result according to the signal to be transmitted, the type of the signal to be transmitted, and the set check algorithm is specifically described. It should be noted that technical details not described in detail in this embodiment may be found in any of the above embodiments.
As shown in fig. 2, the method includes:
as shown in fig. 2, a signal verification method provided in a second embodiment of the present invention includes the following steps:
s210, judging whether the type of the signal to be transmitted is the first type or not through the first ECU, if so, executing S220, and if not, executing S240.
In this embodiment, the signals to be transmitted, which are of the first type, include a signal to be checked and a non-check signal; the signals to be transmitted of the second type include signals to be checked.
In this embodiment, the first ECU may determine whether the signal to be sent includes a non-check signal in addition to the check signal, and if the signal to be sent includes the non-check signal, it may determine that the type of the signal to be sent is the first type, and then execute S220; if the non-check signal is not included, it may be determined that the type of the signal to be transmitted is the second type, and S240 is performed.
S220, checking the signal to be checked in the signal to be transmitted through a set checking algorithm to obtain a first sub-checking result.
In this embodiment, the first sub-verification result may be understood as a verification result obtained after the verification process is performed on the signal to be verified.
S230, performing verification processing on the first message through a set verification algorithm to obtain a second sub-verification result, taking the second sub-verification result and the first message as a first processing result, sending the first processing result and the type identifier to a second ECU, and continuing to execute S250.
In this embodiment, the first message may be understood as a message formed by grouping the first sub-check result and the signal to be sent. A packet is understood to be encapsulated as a data packet.
S240, performing verification processing on the second message through a set verification algorithm to obtain a third sub-verification result, taking the third sub-verification result and the second message as a first processing result, sending the first processing result and the type identifier to the second ECU, and continuing to execute S260.
In this embodiment, the second packet may be understood as a packet formed by grouping signals to be transmitted. The third sub-check result may be understood as a check result obtained by performing a check process on the second packet.
S250, determining whether the second processing result is required to be determined according to the first processing result through the SOC of the second ECU, and sending the determined second processing result to the MCU of the second ECU when the second processing result is required to be determined, and continuing to execute S270.
And S260, sending the first processing result to the MCU through the SOC, and continuing to execute S270.
S270, determining a target verification result of the signal to be transmitted according to the received processing result through the MCU.
The second embodiment of the present invention provides a process of determining a first processing result according to a signal to be sent, a type of the signal to be sent, and a set check algorithm. The method determines the first processing result by judging the type of the signal to be transmitted, and the different types correspond to different determining methods so as to realize the flexibility of determining the first processing result; the first processing result sent by the first ECU is primarily processed through the SOC of the second ECU, and the MCU of the second ECU is used for checking signals, so that the problem that the MCU is only used for signal input and signal checking of data transmission signals is avoided, and the universality of signal checking of ECU communication is improved.
Optionally, the first processing result includes a second sub-check result and a first message;
Determining whether a second processing result is required to be determined according to the first processing result comprises the following steps:
performing verification processing on the first message in the first processing result by setting a verification algorithm to obtain a fourth sub-verification result; if the fourth sub-verification result is consistent with the second sub-verification result in the first processing result, determining the second processing result; if the fourth sub-verification result is inconsistent with the second sub-verification result in the first processing result, the second processing result is not required to be determined, and verification fails.
In this embodiment, in the case where the type of the signal to be sent is the first type, the first processing result may include a second sub-check result and a first packet. The fourth sub-check result may be understood as a check result obtained by performing the check processing on the first packet.
In the case that the type of the signal to be sent is the first type, the process of determining whether the second processing result needs to be determined according to the first processing result may be that a verification algorithm is set to perform verification processing on the first message in the first processing result to obtain a fourth sub-verification result; comparing the fourth sub-check result with the second sub-check result in the first processing result, if the fourth sub-check result is consistent with the second sub-check result in the first processing result, the signal sent by the first ECU is not tampered or lost, and the second processing result is required to be determined; if the fourth sub-verification result is inconsistent with the second sub-verification result in the first processing result, the signal sent by the first ECU can be possibly tampered or lost, the second processing result is not required to be determined, and verification fails.
Optionally, after the second processing result is determined, the method further includes:
and determining the signal to be checked in the first message and the first sub-checking result as a second processing result.
Optionally, the received processing result is a first processing result corresponding to the second type, where the first processing result includes a second message and a third sub-verification result;
determining a target verification result of the signal to be transmitted according to the received processing result, including:
performing verification processing on the second message in the first processing result through a set verification algorithm to obtain a fifth sub-verification result; if the fifth sub-verification result is consistent with the third sub-verification result in the first processing result, determining that the target verification result is successful in verification; if the fifth sub-verification result is inconsistent with the third sub-verification result in the first processing result, determining that the target verification result is verification failure.
In this embodiment, the fifth sub-checking result may be understood as a checking result obtained by performing the checking process on the second packet.
In the case that the type of the signal to be sent is the second type, the process of determining the target verification result of the signal to be sent according to the received processing result may be that a verification algorithm is set to perform verification processing on the second message in the first processing result to obtain a fifth sub-verification result; if the fifth sub-verification result is consistent with the third sub-verification result in the first processing result, the signal sent by the first ECU is not tampered or lost, and the target verification result is determined to be successful in verification; if the fifth sub-check result is inconsistent with the third sub-check result in the first processing result, the signal sent by the first ECU can be possibly tampered or lost, and the target check result is determined to be failed in check.
Optionally, the received processing result is a second processing result, where the second processing result includes a signal to be checked and a first sub-checking result;
determining a target verification result of the signal to be transmitted according to the received processing result, including:
performing verification processing on the signal to be verified in the second processing result by setting a verification algorithm to obtain a sixth sub-verification result; comparing the sixth sub-verification result with the first sub-verification result in the second processing result, and if the sixth sub-verification result is consistent with the first sub-verification result in the second processing result, determining that the target verification result is successful in verification; if the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result, determining that the target verification result is verification failure.
In this embodiment, the sixth sub-verification result may be understood as a verification result obtained by performing verification processing on the signal to be verified in the second processing result.
In the case that the type of the signal to be sent is the first type, the process of determining the target verification result of the signal to be sent according to the received processing result may be that the signal to be verified in the second processing result is verified by setting a verification algorithm, so as to obtain a sixth sub-verification result; comparing the sixth sub-verification result with the first sub-verification result in the second processing result, and if the sixth sub-verification result is consistent with the first sub-verification result in the second processing result, determining that the target verification result is successful in verification; if the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result, determining that the target verification result is verification failure.
Optionally, after determining that the target verification result is verification failure, the method further includes:
detecting the verification times of the signal to be transmitted through a second ECU;
if the verification times do not reach the set threshold, a target instruction is sent to the first ECU through the second ECU, wherein the target instruction is an instruction for indicating to re-verify the signal to be sent.
In this embodiment, the set threshold is understood to be a preset number of times threshold, which is not limited herein, and may be, for example, 3 times, 4 times, or 5 times. A target instruction may be understood as an instruction indicating a re-check of the signal to be sent.
After determining that the target verification result is verification failure, detecting the verification times of the signal to be transmitted through the second ECU; if the verification times do not reach the set threshold value, a target instruction can be sent to the first ECU through the second ECU so as to instruct the first ECU to re-verify the signal to be sent.
The present invention is exemplified below.
The data verification is to ensure the integrity of the data in the transmission process, and a specified algorithm is adopted to calculate the original data to obtain a verification value. When the receiving party receives data, the same checking algorithm is adopted to calculate the original data, if the calculation result is consistent with the received checking value, the data is correctly checked, the frame of data can be used, if the calculation result is inconsistent with the received checking value, the frame of data is wrong in the transmission process, and the data can be discarded or the retransmission is requested. In this embodiment, the available checking algorithms include parity check, checksum, CRC and other checking algorithms, where the CRC has a fast calculation speed, a strong error detection capability, and is easy to be implemented by hardware circuits such as an encoder, and the error detection accuracy and speed cost have advantages in terms of a parity check mode, so that the CRC may be the preferred algorithm in the embodiment of the present invention.
According to the signal verification method adopted by the embodiment of the invention, the MCU and the SOC are used for carrying out signal verification together, and a signal nesting protection mechanism is adopted, so that the effectiveness of the signal input verification of the non-safety chip SOC is improved, and the functional safety requirement is met; and the protection of ECU communication is realized in a software mode, so that the waste problem of replacing or increasing the cost of the MCU chip is avoided.
Example III
Fig. 3 is a schematic structural diagram of a signal checking device according to a third embodiment of the present invention, where the device may be implemented by software and/or hardware. As shown in fig. 3, the apparatus includes:
a first determining module 310, configured to determine, by using a first ECU, a first processing result according to a signal to be sent, a type of the signal to be sent, and a set check algorithm, and send the first processing result and a type identifier to a second ECU, where the type includes a first type and a second type;
a second determining module 320, configured to determine, through the SOC of the second ECU, whether to determine a second processing result according to the first processing result when the type identifier indicates the first type, and send the determined second processing result to the MCU of the second ECU when the second processing result is determined;
A sending module 330, configured to send, through the SOC, the first processing result to the MCU when the type identifier indicates a second type;
and the verification module 340 is configured to determine, by using the MCU, a target verification result of the signal to be sent according to the received processing result.
In this embodiment, the device determines, by the first determining module 310, a first processing result according to the signal to be sent, the type of the signal to be sent, and the set check algorithm, and sends the first processing result and the type identifier to the second ECU, where the type includes a first type and a second type; determining, by the second determining module 320, whether a second processing result needs to be determined according to the first processing result when the type identifier indicates the first type, and transmitting the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined; through the transmitting module 330, transmitting the first processing result to the MCU when the type identifier indicates the second type through the SOC; and determining a target verification result of the signal to be transmitted according to the received processing result by the MCU through the verification module 340. The device preliminarily processes the signal sent by the first ECU through the SOC of the second ECU, and then performs signal verification processing through the MCU of the second ECU, so that the problem that the MCU is only responsible for signal input and signal verification of data transmission signals is avoided, and the universality of signal verification of ECU communication is improved. In addition, the SOC of the second ECU receives the input signal, so that the problem of increased cost caused by the additional addition of the MCU is avoided.
Optionally, the signal to be sent with the first type includes a signal to be checked and a non-check signal; the signals to be transmitted, the types of which are the second type, comprise signals to be checked;
the first determining module 310 includes:
the first verification unit is used for verifying the signal to be verified in the signal to be transmitted through a set verification algorithm to obtain a first sub-verification result if the type of the signal to be transmitted is a first type;
the second verification unit is used for performing verification processing on the first message through a set verification algorithm to obtain a second sub-verification result, and taking the second sub-verification result and the first message as a first processing result, wherein the first message is formed by grouping the first sub-verification result and the signal to be sent;
and the third checking unit is used for checking the second message by setting a checking algorithm to obtain a third sub-checking result if the type of the signal to be transmitted is the second type, and taking the third sub-checking result and the second message as the first processing result, wherein the second message is formed by grouping the signal to be transmitted.
Optionally, the first processing result includes a second sub-check result and a first message;
the second determining module 320 includes:
the fourth verification unit is used for performing verification processing on the first message in the first processing result through a set verification algorithm to obtain a fourth sub-verification result;
the first determining unit is used for determining a second processing result if the fourth sub-checking result is consistent with the second sub-checking result in the first processing result;
and the second determining unit is used for determining no second processing result if the fourth sub-checking result is inconsistent with the second sub-checking result in the first processing result, and checking fails.
Optionally, the apparatus further comprises:
and the third determining unit is used for determining the signal to be checked and the first sub-checking result in the first message as the second processing result after the second processing result is required to be determined.
Optionally, the received processing result is a first processing result corresponding to the second type, where the first processing result includes a second packet and a third sub-verification result;
the verification module 340 includes:
a fifth checking unit, configured to check the second packet in the first processing result by setting a checking algorithm to obtain a fifth sub-checking result;
A fourth determining unit, configured to determine that the target verification result is verification success if the fifth sub-verification result is consistent with a third sub-verification result in the first processing result;
and a fifth determining unit, configured to determine that the target verification result is verification failure if the fifth sub-verification result is inconsistent with a third sub-verification result in the first processing result.
Optionally, the received processing result is a second processing result, where the second processing result includes a signal to be checked and a first sub-checking result;
the verification module 340 includes:
the sixth verification unit is used for performing verification processing on the signal to be verified in the second processing result through a set verification algorithm to obtain a sixth sub-verification result;
a sixth determining unit, configured to determine that the target verification result is verification success if the sixth sub-verification result is consistent with the first sub-verification result in the second processing result;
and a seventh determining unit, configured to determine that the target verification result is verification failure if the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result.
Optionally, the apparatus further comprises:
The detection module is used for detecting the verification times of the signal to be sent through the second ECU after the target verification result is determined to be verification failure;
and the sending module is used for sending a target instruction to the first ECU through the second ECU if the verification times do not reach the set threshold value, wherein the target instruction is an instruction for indicating to re-verify the signal to be sent.
The signal checking device provided by the embodiment of the invention can execute the signal checking method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example IV
Fig. 4 is a schematic structural diagram of a vehicle according to a fourth embodiment of the present invention. As shown in fig. 4, the vehicle 10 includes at least one processor 11, and a memory (such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc.), a first ECU 20, and a second ECU 21 communicatively connected to the at least one processor 11, wherein the memories store computer programs executable by the at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer programs stored in the Read Only Memory (ROM) 12 or the computer programs loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the vehicle 10 may also be stored. The processor 11, the ROM 12, the RAM 13, the first ECU 20, and the second ECU 21 are connected to each other through the bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the vehicle 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the vehicle 10 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunications networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as signal verification methods.
In some embodiments, the signal verification method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the vehicle 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the signal verification method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the signal verification method in any other suitable way (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a vehicle having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or a trackball) by which a user can provide input to the vehicle. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (10)
1. A method of signal verification, the method comprising:
determining a first processing result according to a signal to be transmitted, the type of the signal to be transmitted and a set verification algorithm through a first electronic control unit ECU, and transmitting the first processing result and a type identifier to a second ECU, wherein the type comprises a first type and a second type;
determining whether a second processing result needs to be determined according to the first processing result when the type identification indicates a first type through a system-on-chip (SOC) of a second ECU, and sending the determined second processing result to a Micro Control Unit (MCU) of the second ECU when the second processing result needs to be determined;
Transmitting the first processing result to the MCU when the type identifier indicates a second type through the SOC;
and determining a target verification result of the signal to be transmitted according to the received processing result by the MCU.
2. The method of claim 1, wherein the type of signal to be transmitted that is the first type comprises a signal to be verified and a non-verified signal; the signals to be transmitted, the types of which are the second type, comprise signals to be checked;
determining a first processing result according to a signal to be sent, the type of the signal to be sent and a set check algorithm, wherein the determining comprises the following steps:
if the type of the signal to be transmitted is the first type, checking the signal to be checked in the signal to be transmitted by setting a checking algorithm to obtain a first sub-checking result;
performing verification processing on a first message through a set verification algorithm to obtain a second sub-verification result, and taking the second sub-verification result and the first message as a first processing result, wherein the first message is formed by packaging the first sub-verification result and the signal to be sent;
if the type of the signal to be sent is the second type, performing verification processing on the second message through a set verification algorithm to obtain a third sub-verification result, and taking the third sub-verification result and the second message as a first processing result, wherein the second message is formed by grouping the signal to be sent.
3. The method of claim 1, wherein the first processing result comprises a second sub-check result and a first message;
determining whether a second processing result needs to be determined according to the first processing result comprises the following steps:
performing verification processing on the first message in the first processing result through a set verification algorithm to obtain a fourth sub-verification result;
if the fourth sub-verification result is consistent with the second sub-verification result in the first processing result, determining a second processing result;
if the fourth sub-verification result is inconsistent with the second sub-verification result in the first processing result, the second processing result is not required to be determined, and verification fails.
4. A method according to claim 3, further comprising, after the second processing result is determined:
and determining the signal to be checked in the first message and the first sub-checking result as a second processing result.
5. The method of claim 1, wherein the received processing result is a first processing result corresponding to the second type, the first processing result including a second message and a third sub-check result;
determining a target verification result of the signal to be sent according to the received processing result, including:
Performing verification processing on the second message in the first processing result through a set verification algorithm to obtain a fifth sub-verification result;
if the fifth sub-verification result is consistent with the third sub-verification result in the first processing result, determining that the target verification result is successful in verification;
and if the fifth sub-verification result is inconsistent with the third sub-verification result in the first processing result, determining that the target verification result is verification failure.
6. The method of claim 1, wherein the received processing result is a second processing result, the second processing result comprising a signal to be verified and a first sub-verification result;
determining a target verification result of the signal to be sent according to the received processing result, including:
performing verification processing on the signal to be verified in the second processing result by setting a verification algorithm to obtain a sixth sub-verification result;
if the sixth sub-verification result is consistent with the first sub-verification result in the second processing result, determining that the target verification result is successful in verification;
and if the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result, determining that the target verification result is verification failure.
7. The method of claim 1, further comprising, after determining that the target verification result is a verification failure:
detecting the verification times of the signal to be sent through the second ECU;
and if the verification times do not reach the set threshold, sending a target instruction to the first ECU through the second ECU, wherein the target instruction is an instruction for indicating to re-verify the signal to be sent.
8. A signal verification apparatus, comprising:
the first determining module is used for determining a first processing result according to a signal to be sent, the type of the signal to be sent and a set verification algorithm through the first electronic control unit ECU, and sending the first processing result and a type identifier to the second ECU, wherein the type comprises a first type and a second type;
the second determining module is used for determining whether a second processing result needs to be determined according to the first processing result when the type identifier indicates a first type through the system-on-chip SOC of the second ECU, and sending the determined second processing result to the micro control unit MCU of the second ECU when the second processing result needs to be determined;
the sending module is used for sending the first processing result to the MCU when the type identifier indicates a second type through the SOC;
And the verification module is used for determining a target verification result of the signal to be transmitted according to the received processing result through the MCU.
9. A vehicle, characterized in that the vehicle comprises:
a first ECU;
a second ECU;
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the signal verification method of any one of claims 1-7.
10. A computer readable storage medium storing computer instructions for causing a processor to perform the signal verification method of any one of claims 1-7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310147292.0A CN116300800A (en) | 2023-02-21 | 2023-02-21 | Signal verification method and device, vehicle and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310147292.0A CN116300800A (en) | 2023-02-21 | 2023-02-21 | Signal verification method and device, vehicle and storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116300800A true CN116300800A (en) | 2023-06-23 |
Family
ID=86829800
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310147292.0A Pending CN116300800A (en) | 2023-02-21 | 2023-02-21 | Signal verification method and device, vehicle and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116300800A (en) |
-
2023
- 2023-02-21 CN CN202310147292.0A patent/CN116300800A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107306185B (en) | Method and device for avoiding manipulation of data transmission | |
| EP3799449A1 (en) | Method, apparatus, device, and medium for verifying vehicle information | |
| CN112380046B (en) | Calculation result verification method, system, device, equipment and storage medium | |
| WO2021134418A1 (en) | Data checking method and apparatus | |
| CN112713964B (en) | Data verification acceleration method and device, computer equipment and storage medium | |
| CN116300800A (en) | Signal verification method and device, vehicle and storage medium | |
| CN116626473A (en) | Testing method, device, equipment and medium for vehicle-gauge master control chip | |
| CN116974812A (en) | Method, device, equipment and storage medium for displaying information | |
| CN115914327B (en) | Control method, device, equipment and storage medium | |
| CN116192534A (en) | Train control data communication transmission method, device, equipment and storage medium | |
| CN116001705B (en) | Vehicle data monitoring method, device, equipment and storage medium | |
| CN115774837A (en) | Signal verification method, device, equipment, medium, program product and vehicle | |
| CN115202949A (en) | Chip signal monitoring device and method, computer equipment and storage medium | |
| CN117478455A (en) | Method, device, electronic equipment and medium for rapidly checking message information | |
| CN116137723B (en) | Method, device, equipment and storage medium for judging broken link triggering | |
| KR101623305B1 (en) | Apparatus, Method for check in data and System using the same | |
| CN110874275A (en) | Data verification method, system, electronic equipment and readable storage medium | |
| CN117499334B (en) | Intelligent vehicle communication method, terminal equipment and storage medium | |
| CN114202947B (en) | Internet of vehicles data transmission method and device and automatic driving vehicle | |
| CN109325496B (en) | Bullet screen checking method and device based on character removal, terminal and storage medium | |
| CN117055533A (en) | Vehicle-mounted system fault processing method, device, equipment and medium | |
| CN116633837A (en) | Vehicle logic channel communication test method and device, electronic equipment and storage medium | |
| CN116631489A (en) | Memory-based test method and device, electronic equipment and medium | |
| CN114238075A (en) | Method, device, equipment, medium and product for testing program component | |
| CN117741574A (en) | Radar message processing method and device, electronic equipment and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |