CN116133284A - Circuit board with embedded part and manufacturing method thereof - Google Patents

Circuit board with embedded part and manufacturing method thereof Download PDF

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Publication number
CN116133284A
CN116133284A CN202111343368.4A CN202111343368A CN116133284A CN 116133284 A CN116133284 A CN 116133284A CN 202111343368 A CN202111343368 A CN 202111343368A CN 116133284 A CN116133284 A CN 116133284A
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CN
China
Prior art keywords
layer
conductive
hole
circuit
embedded part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111343368.4A
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Chinese (zh)
Inventor
王艳飞
傅志杰
刘玮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Avary Holding Shenzhen Co Ltd
Original Assignee
Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Avary Holding Shenzhen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Hongqisheng Precision Electronics Qinhuangdao Co Ltd, Avary Holding Shenzhen Co Ltd filed Critical Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Priority to CN202111343368.4A priority Critical patent/CN116133284A/en
Publication of CN116133284A publication Critical patent/CN116133284A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4697Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

The application provides a manufacturing method of a circuit board with an embedded part, which comprises the following steps: providing a circuit substrate, wherein the circuit substrate comprises a first insulating layer, a first conductive circuit layer and a second conductive circuit layer; a first through hole is formed in the circuit substrate; forming a supporting layer on the second conductive circuit layer; reducing the temperature of the circuit substrate to shrink the circuit substrate and increasing the size of the first through hole to form a second through hole; placing an embedded part in the second through hole, wherein the size of the embedded part is equal to that of the first through hole; raising the temperature of the circuit substrate to expand the circuit substrate and reducing the size of the second through hole to form the first through hole; and removing the supporting layer to obtain the circuit board with the embedded part. The embedded precision of the embedded part can be improved. The application also provides a circuit board with the embedded part manufactured by the method.

Description

Circuit board with embedded part and manufacturing method thereof
Technical Field
The application relates to the technical field of embedded components of circuit boards, in particular to a circuit board with embedded parts and a manufacturing method thereof.
Background
In recent years, as electronic devices are being miniaturized and integrated, it is required to embed components inside a wiring board in the electronic devices to maximize the use of the internal space of the wiring board, so as to achieve miniaturization and integration of the wiring board. At present, in the embedding scheme of the element, a relatively large through hole is usually formed in the circuit board by laser, then the element is placed in the through hole, and a gap between the element and the inner wall of the through hole is filled by pressing adhesive. However, because the size of the through hole is larger, the element is easy to deviate when buried, and meanwhile, deviation is easy to occur when laser drilling is also easy to occur, so that the circuit board has poor electrical property. In addition, in the step of pressing the adhesive, the gap is not easy to be filled, and the reliability of the product is reduced. Meanwhile, in the step of bonding adhesive, the upper surface and the lower surface of the embedded part are required to be bonded respectively.
Disclosure of Invention
In view of the above, the present application provides a method for manufacturing a circuit board with embedded parts, which can solve at least one of the above problems.
In addition, the application also provides the circuit board with the embedded part manufactured by the manufacturing method.
An embodiment of the present application provides a method for manufacturing a circuit board with an embedded part, including the following steps:
providing a circuit substrate, wherein the circuit substrate comprises a first insulating layer, a first conductive circuit layer, a second conductive circuit layer and a third conductive circuit layer, wherein the first conductive circuit layer and the second conductive circuit layer are positioned on two opposite surfaces of the first insulating layer;
forming a first through hole in the circuit substrate, wherein part of the third conductive circuit layer is exposed to the first through hole to form a welding pad;
forming a supporting layer on the second conductive circuit layer;
reducing the temperature of the circuit substrate to enable the circuit substrate to shrink, and enabling the size of the first through hole to be increased to form a second through hole, wherein the projection of the first through hole on the supporting layer falls in the projection range of the second through hole on the supporting layer;
placing an embedded part on the supporting layer, and enabling the embedded part to be located in the second through hole, wherein the size of the embedded part is equal to that of the first through hole, and a gap exists between the embedded part and the inner wall of the second through hole;
raising the temperature of the circuit substrate to expand the circuit substrate, reducing the size of the second through hole to form the first through hole, and simultaneously electrically connecting the embedded part and the welding pad;
removing the support layer; and
and sequentially forming a second insulating layer and a fourth conductive circuit layer on the first conductive circuit layer, and sequentially forming a third insulating layer and a fifth conductive circuit layer on the second conductive circuit layer, thereby obtaining the circuit board with the embedded part.
An embodiment of the present application further provides a circuit board with an embedded part, including:
the circuit substrate comprises a first insulating layer, a first conductive circuit layer, a second conductive circuit layer and a third conductive circuit layer, wherein the first conductive circuit layer and the second conductive circuit layer are positioned on two opposite surfaces of the first insulating layer, the third conductive circuit layer is positioned in the first insulating layer, a first through hole is formed in the circuit substrate, and part of the third conductive circuit layer is exposed to the first through hole to form a welding pad;
the embedded part is positioned in the first through hole, the size of the embedded part is equal to that of the first through hole, and the embedded part is electrically connected with the welding pad;
a second insulating layer on the first conductive circuit layer,
a fourth conductive trace layer on the second insulating layer;
a third insulating layer located on the second conductive line layer; and
and the fifth conductive circuit layer is positioned on the third insulating layer.
According to the method, the expansion and contraction principle is utilized, the size of the first through hole is increased by reducing the temperature of the circuit substrate (namely under the low-temperature condition) to form the second through hole, the embedded part is placed in the second through hole, the size of the second through hole is reduced by increasing the temperature of the circuit substrate (namely under the normal-temperature condition) to form the first through hole, and the size of the first through hole is equal to the size of the embedded part, so that the embedded part is tightly jointed with the inner wall of the first through hole, the embedded precision of the embedded part is improved, and the deviation in drilling is reduced. Meanwhile, no gap exists between the inner wall of the first through hole and the embedded part, and press fit adhesive is not needed to fill the gap, so that the reliability of the circuit board with the embedded part is improved. In addition, the upper surface and the lower surface of the embedded part can be pressed simultaneously, the upper surface and the lower surface of the embedded part do not need to be pressed respectively, the pressing times are reduced, and therefore the production efficiency is improved.
Drawings
Fig. 1 is a cross-sectional view of a circuit substrate according to an embodiment of the present application.
Fig. 2 is a cross-sectional view of the circuit board shown in fig. 1 after a first through hole is formed therein.
Fig. 3 is a cross-sectional view of the second conductive trace layer shown in fig. 2 after a support layer is formed thereon.
Fig. 4 is a cross-sectional view of the first via hole shown in fig. 3 after forming a second via hole.
Fig. 5 is a cross-sectional view of the second through hole of fig. 4 after placement of the embedment.
Fig. 6 is a cross-sectional view of the second via hole shown in fig. 5 after forming a first via hole.
Fig. 7 is a cross-sectional view of the support layer shown in fig. 6, with the support layer removed.
Fig. 8 is a cross-sectional view of the first conductive trace layer shown in fig. 7, in which a second insulating layer and a first copper foil layer are sequentially laminated, and a third insulating layer and a second copper foil layer are laminated on the second conductive trace layer.
Fig. 9 is a cross-sectional view of a circuit board with embedded parts obtained by etching the first copper foil layer and the second copper foil layer shown in fig. 8, respectively.
Description of the main reference signs
Circuit board 100 with embedded parts
Circuit board 10
First insulating layer 101
First conductive trace layer 102
Second conductive line layer 103
Third conductive line layer 104
Pad 1041
First conductive part 11
Second conductive part 12
First through hole 13
Support layer 20
Second through hole 30
Built-in fitting 40
Body 401
Electrode 402
Gap 41
Second insulating layer 50
Third insulating layer 51
First copper foil layer 60
Second copper foil layer 61
Fourth conductive line layer 70
Fifth conductive line layer 71
The following detailed description will further illustrate the application in conjunction with the above-described figures.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In order to further describe the technical means and effects adopted by the present application to achieve the predetermined purpose, the following detailed description is made in connection with the accompanying drawings and preferred embodiments.
An embodiment of the present application provides a method for manufacturing a circuit board with an embedded part, including the following steps:
in step S11, referring to fig. 1, a circuit substrate 10 is provided.
In this embodiment, the circuit substrate 10 includes a first insulating layer 101, a first conductive circuit layer 102 and a second conductive circuit layer 103 on opposite surfaces of the first insulating layer 101, and at least one third conductive circuit layer 104 inside the first insulating layer 101. In this embodiment, the number of the third conductive trace layers 104 is two.
The material of the first insulating layer 101 may be one selected from epoxy resin (PP), polypropylene (BT) resin, polyphenylene oxide (Polyphenylene Oxide, PPO), polyimide (PI), polyethylene terephthalate (Polyethylene Terephthalate, PET), and polyethylene naphthalate (Polyethylene Naphthalate, PEN). In this embodiment, the material of the first insulating layer 101 is polyimide.
The circuit board 10 is provided with a first conductive portion 11 and a second conductive portion 12. The first conductive portion 11 is configured to electrically connect the first conductive trace layer 102 and one of the third conductive trace layers 104, and the second conductive portion 12 is configured to electrically connect the second conductive trace layer 103 and the other of the third conductive trace layers 104.
In step S12, referring to fig. 2, a first through hole 13 is formed in the circuit substrate 10.
In this embodiment, the first through hole 13 may be formed by laser drilling.
The first via 13 penetrates the first conductive line layer 102, the first insulating layer 101, the third conductive line layer 104, and the second conductive line layer 103. A portion of the third conductive trace layer 104 is exposed to the first via 13 to form a pad 1041.
In the present embodiment, the inner diameter d of the first through hole 13 is at normal temperature 1 May be 1000 μm.
In this embodiment, after the first through hole 13 is formed, the inner wall of the first through hole 13 may be further subjected to a photoresist removing and browning treatment. Wherein, the step of removing glue can improve the flatness of the inner wall of the first through hole 13. The browning step can improve the bonding force between the inner wall of the first through hole 13 and the subsequent buried member (refer to fig. 6).
In step S13, referring to fig. 3, a supporting layer 20 is formed on the second conductive trace layer 103.
Wherein the supporting layer 20 seals a side of the first via hole 13 adjacent to the second conductive trace layer 103.
In this embodiment, the support layer 20 may be a support film. In particular, the support film may be a polyethylene film.
In step S14, referring to fig. 4, the temperature of the circuit substrate 10 is reduced to shrink the circuit substrate 10, and the size of the first through hole 13 is increased to form the second through hole 30.
Specifically, the temperature of the circuit substrate 10 may be lowered from normal temperature to-15 ℃ to shrink the circuit substrate 10, and the size of the first through-hole 13 may be increased due to shrinkage of the circuit substrate 10, so that the first through-hole 13 becomes the second through-hole 30.
Wherein the second through hole 30 has an inner diameter larger than that of the first through hole 13. I.e. the projection of the first through hole 13 onto the support layer 20 falls within the projection range of the second through hole 30 onto the support layer 20.
In this embodiment, the second through hole 30 has an inner diameter d at-15deg.C 2 May be 1030 μm.
In step S15, referring to fig. 5, an embedded part 40 is disposed on the supporting layer 20, and the embedded part 40 is located in the second through hole 30.
In this embodiment, the embedded part 40 includes a body 401 and two electrodes 402 disposed at two ends of the body 401. Wherein, the two electrodes 402 are electrically connected to the body 401.
Wherein, a gap 41 exists between the embedded part 40 and the inner wall of the second through hole 30. Specifically, the gap 41 exists between both the electrodes 402 and the inner wall of the second through hole 30. Wherein, two of the electrodes 402 are spaced apart from the pad 1041.
In this embodiment, the end surface of the embedment 40 remote from the support layer 20 and the surface of the first conductive trace layer 102 remote from the support layer 20 are substantially flush.
Wherein the size of the embedded part 40 is equal to the size of the first through hole 13. In this embodiment, the embedded part 40 may be an electronic component. Specifically, the electronic component may be an active component or a passive component. In this embodiment, the electronic component is a capacitor.
In step S16, referring to fig. 6, the temperature of the circuit substrate 10 is raised to expand the circuit substrate 10, and the size of the second through hole 30 is reduced to form the first through hole 13.
Specifically, the temperature of the wiring substrate 10 may be raised from-15 ℃ to normal temperature to expand the wiring substrate 10 while the size of the second through-holes 30 is reduced due to the expansion of the wiring substrate 10, so that the second through-holes 30 become the first through-holes 13 again.
Since the size of the embedment 40 is equal to the size of the first through hole 13, the embedment 40 just contacts the inner wall of the first through hole 13. I.e. such that both electrodes 402 are just in contact with the pads 1041.
The electrode 402 is electrically connected to the pad 1041, so that the embedded part 40 is electrically connected to the third conductive line layer 104, and the embedded part 40 is electrically connected to the first conductive line layer 102 and the second conductive line layer 103.
In step S17, referring to fig. 7, the supporting layer 20 is removed.
In step S18, referring to fig. 8, a second insulating layer 50 and a first copper foil layer 60 are sequentially stacked on the first conductive trace layer 102, and a third insulating layer 51 and a second copper foil layer 61 are stacked on the second conductive trace layer 103 and laminated.
In this embodiment, before stacking the second insulating layer 50, a cleaning treatment may be further performed on a surface of the first conductive trace layer 102 away from the third conductive trace layer 104, so as to improve a bonding force between the second insulating layer 50 and the first conductive trace layer 102. Wherein the surface of the first conductive trace layer 102 may be cleaned by plasma.
In this embodiment, before stacking the third insulating layer 51, a cleaning treatment may be further performed on a surface of the second conductive trace layer 103 away from the third conductive trace layer 104 to improve a bonding force between the third insulating layer 51 and the second conductive trace layer 103. Wherein the surface of the second conductive trace layer 103 may be cleaned by plasma.
In this embodiment, the materials of the second insulating layer 50 and the third insulating layer 51 may be the same as the material of the first insulating layer 101, and specific reference may be made to the material of the first insulating layer 101, which is not described in detail herein.
In step S19, referring to fig. 9, the first copper foil layer 60 and the second copper foil layer 61 are etched to form a fourth conductive trace layer 70 and a fifth conductive trace layer 71, respectively, so as to obtain the circuit board 100 with embedded parts.
Referring to fig. 9, an embodiment of the present application further provides a circuit board 100 with an embedded part, where the circuit board 100 with an embedded part includes a circuit substrate 10, an embedded part 40, a second insulating layer 50, a fourth conductive circuit layer 70, a third insulating layer 51, and a fifth conductive circuit layer 71.
In this embodiment, the circuit substrate 10 includes a first insulating layer 101, a first conductive circuit layer 102 and a second conductive circuit layer 103 on opposite surfaces of the first insulating layer 101, and at least one third conductive circuit layer 104 inside the first insulating layer 101. In this embodiment, the number of the third conductive trace layers 104 is two.
The material of the first insulating layer 101 may be one selected from epoxy resin (PP), polypropylene (BT) resin, polyphenylene oxide (Polyphenylene Oxide, PPO), polyimide (PI), polyethylene terephthalate (Polyethylene Terephthalate, PET), and polyethylene naphthalate (Polyethylene Naphthalate, PEN). In this embodiment, the material of the first insulating layer 101 is polyimide.
The circuit board 10 is provided with a first conductive portion 11 and a second conductive portion 12. The first conductive portion 11 is configured to electrically connect the first conductive trace layer 102 and one of the third conductive trace layers 104, and the second conductive portion 12 is configured to electrically connect the second conductive trace layer 103 and the other of the third conductive trace layers 104.
The circuit substrate 10 is provided with a first through hole 13. The first via 13 penetrates the first conductive line layer 102, the first insulating layer 101, the third conductive line layer 104, and the second conductive line layer 103. A portion of the third conductive trace layer 104 is exposed to the first via 13 to form a pad 1041. In the present embodiment, the first through hole 13 has an inner diameter d 1 May be 1000 μm.
The embedment 40 is located in the first through hole 13, and the size of the embedment 40 is equal to the size of the first through hole 13. Wherein, one end surface of the embedded part 40 and the surface of the first conductive circuit layer 102 far away from the third conductive circuit layer 104 are flush, and the other end surface of the embedded part 40 and the surface of the second conductive circuit layer 103 far away from the third conductive circuit layer 104 are flush.
In this embodiment, the embedded part 40 includes a body 401 and two electrodes 402 disposed at two ends of the body 401. Wherein, the two electrodes 402 are electrically connected to the body 401.
In this embodiment, the embedded part 40 may be an electronic component. Specifically, the electronic component may be an active component or a passive component. In this embodiment, the electronic component is a capacitor.
Since the size of the embedment 40 is equal to the size of the first through hole 13, the embedment 40 just contacts the inner wall of the first through hole 13. I.e. such that both electrodes 402 are just in contact with the pads 1041.
The electrode 402 is electrically connected to the pad 1041, so that the embedded part 40 is electrically connected to the third conductive line layer 104, and the embedded part 40 is electrically connected to the first conductive line layer 102 and the second conductive line layer 103.
The second insulating layer 50 and the fourth conductive trace layer 70 are sequentially laminated on the first conductive trace layer 102. In this embodiment, the material of the second insulating layer 50 may be the same as that of the first insulating layer 101, and specific reference may be made to the material of the first insulating layer 101, which will not be described in detail herein.
The third insulating layer 51 and the fifth conductive trace layer 71 are sequentially laminated on the second conductive trace layer 103. In this embodiment, the material of the third insulating layer 51 may be the same as that of the first insulating layer 101, and specific reference may be made to the material of the first insulating layer 101, which is not described in detail herein.
The application utilizes the principle of thermal expansion and cold contraction, through reducing the temperature of the circuit substrate 10 (namely under the low-temperature condition), the size of the first through hole 13 is increased to form the second through hole 30, the embedded part 40 is placed in the second through hole 30, and then the size of the second through hole 30 is reduced to form the first through hole 13 by increasing the temperature of the circuit substrate 10 (namely under the normal-temperature condition), because the size of the first through hole 13 is equal to the size of the embedded part 40, the embedded part 40 is tightly jointed with the inner wall of the first through hole 13 at the moment, the embedded precision of the embedded part 40 is improved, and the offset during laser drilling is reduced. Meanwhile, since there is no gap between the inner wall of the first through hole 13 and the embedded part 40, there is no need to press adhesive to fill the gap, so that reliability of the circuit board 100 with embedded part is improved.
In addition, the upper surface and the lower surface of the embedded part 40 can be pressed simultaneously, the upper surface and the lower surface of the embedded part 40 do not need to be pressed respectively, the pressing times are reduced, and therefore the production efficiency is improved.
The above description is only one preferred embodiment of the present application, but is not limited to this embodiment during actual application.

Claims (10)

1. The manufacturing method of the circuit board with the embedded part is characterized by comprising the following steps of:
providing a circuit substrate, wherein the circuit substrate comprises a first insulating layer, a first conductive circuit layer, a second conductive circuit layer and a third conductive circuit layer, wherein the first conductive circuit layer and the second conductive circuit layer are positioned on two opposite surfaces of the first insulating layer;
forming a first through hole in the circuit substrate, wherein part of the third conductive circuit layer is exposed to the first through hole to form a welding pad;
forming a supporting layer on the second conductive circuit layer;
reducing the temperature of the circuit substrate to enable the circuit substrate to shrink, and enabling the size of the first through hole to be increased to form a second through hole, wherein the projection of the first through hole on the supporting layer falls in the projection range of the second through hole on the supporting layer;
placing an embedded part on the supporting layer, and enabling the embedded part to be located in the second through hole, wherein the size of the embedded part is equal to that of the first through hole, and a gap exists between the embedded part and the inner wall of the second through hole;
raising the temperature of the circuit substrate to expand the circuit substrate, reducing the size of the second through hole to form the first through hole, and simultaneously electrically connecting the embedded part and the welding pad;
removing the support layer; and
and sequentially forming a second insulating layer and a fourth conductive circuit layer on the first conductive circuit layer, and sequentially forming a third insulating layer and a fifth conductive circuit layer on the second conductive circuit layer, thereby obtaining the circuit board with the embedded part.
2. The method of claim 1, wherein the embedded component comprises a body and two electrodes disposed at two ends of the body, the electrodes contact the bonding pads in the first through hole, and the electrodes are electrically connected with the bonding pads.
3. The method of manufacturing a circuit board with embedded parts according to claim 1, wherein after the first through hole is formed in the circuit substrate, the method further comprises:
and removing the glue from the inner wall of the first through hole and carrying out browning treatment.
4. The method of manufacturing a circuit board with embedded parts according to claim 1, wherein before forming the second insulating layer and the third insulating layer, the method further comprises:
cleaning the first conductive circuit layer; and
and cleaning the second conductive circuit layer.
5. The method of claim 1, wherein the number of the third conductive trace layers is two, a first conductive portion and a second conductive portion are disposed in the trace substrate, the first conductive portion is used for electrically connecting the first conductive trace layer and one of the third conductive trace layers, and the second conductive portion is used for electrically connecting the second conductive trace layer and the other of the third conductive trace layers.
6. The method of manufacturing a circuit board with embedded parts according to claim 1, wherein the supporting layer is a supporting film, and the supporting film is a polyethylene film.
7. A circuit board with embedded parts, comprising:
the circuit substrate comprises a first insulating layer, a first conductive circuit layer, a second conductive circuit layer and a third conductive circuit layer, wherein the first conductive circuit layer and the second conductive circuit layer are positioned on two opposite surfaces of the first insulating layer, the third conductive circuit layer is positioned in the first insulating layer, a first through hole is formed in the circuit substrate, and part of the third conductive circuit layer is exposed to the first through hole to form a welding pad;
the embedded part is positioned in the first through hole, the size of the embedded part is equal to that of the first through hole, and the embedded part is electrically connected with the welding pad;
a second insulating layer on the first conductive circuit layer,
a fourth conductive trace layer on the second insulating layer;
a third insulating layer located on the second conductive line layer; and
and the fifth conductive circuit layer is positioned on the third insulating layer.
8. The circuit board with embedded part according to claim 7, wherein the embedded part comprises a body and two electrodes arranged at two ends of the body, the electrodes are in contact with the welding pads, and the electrodes are electrically connected with the welding pads.
9. The circuit board with embedded parts according to claim 7, wherein the number of the third conductive circuit layers is two, and a first conductive part and a second conductive part are arranged in the circuit substrate, wherein the first conductive part is used for electrically connecting the first conductive circuit layer and one of the third conductive circuit layers, and the second conductive part is used for electrically connecting the second conductive circuit layer and the other third conductive circuit layer.
10. The circuit board with embedded part according to claim 7, wherein one end face of the embedded part and the surface of the first conductive line layer away from the third conductive line layer are flush, and the other end face of the embedded part and the surface of the second conductive line layer away from the third conductive line layer are flush.
CN202111343368.4A 2021-11-13 2021-11-13 Circuit board with embedded part and manufacturing method thereof Pending CN116133284A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111343368.4A CN116133284A (en) 2021-11-13 2021-11-13 Circuit board with embedded part and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111343368.4A CN116133284A (en) 2021-11-13 2021-11-13 Circuit board with embedded part and manufacturing method thereof

Publications (1)

Publication Number Publication Date
CN116133284A true CN116133284A (en) 2023-05-16

Family

ID=86293667

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111343368.4A Pending CN116133284A (en) 2021-11-13 2021-11-13 Circuit board with embedded part and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN116133284A (en)

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