CN116094614A - Multi-channel radio frequency transceiver phase consistency test platform and method - Google Patents
Multi-channel radio frequency transceiver phase consistency test platform and method Download PDFInfo
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- CN116094614A CN116094614A CN202211050766.1A CN202211050766A CN116094614A CN 116094614 A CN116094614 A CN 116094614A CN 202211050766 A CN202211050766 A CN 202211050766A CN 116094614 A CN116094614 A CN 116094614A
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Abstract
The invention relates to a multi-channel radio frequency transceiver phase consistency test platform and a method, comprising a signal generator, a power divider, a transceiver, a baseband processing circuit and a multi-channel phase difference calculation module, wherein the phase consistency of a plurality of channels of a single transceiver can be tested, and the phase consistency of each channel of a plurality of parallel transceivers can also be tested; the number of transceivers in parallel depends on the clock and the driving capabilities of the logic signals; multi-channel phase consistency test for a single transceiver. The invention not only satisfies the common phase consistency test of a plurality of channels of a single transceiver, but also can carry out the phase consistency test of each channel of a plurality of parallel transceivers.
Description
Technical Field
The invention relates to a multi-channel radio frequency transceiver phase consistency test platform and a method, and belongs to the technical field of testing.
Background
For wide wireless communication systems, multiple-input multiple-output (MIMO) operation and RF beamforming have proven to be techniques that are advantageous for maximizing throughput and efficient spectrum utilization. The present integrated devices, such as multi-channel rf transceivers, have both multi-channel RX and TX capabilities, making it a simpler task to develop MIMO systems that include high performance, high linearity integrated transceivers and synthesizers.
Some systems may require more complex configurations than combining multiple devices. For devices that operate independently without any data timing adjustment mechanism, it is impractical to have multiple devices operating together while attempting to tune the individual channels of the individual devices. To successfully achieve this function, data is synchronized to and from multiple devices.
The multi-channel radio frequency transceiver may provide such a necessary synchronization mechanism to implement a multi-channel system. The device contains external control inputs and internal circuitry for synchronizing the baseband sampling clock and the data clock, thus supporting the use of multiple devices operating in parallel in a system design to achieve equivalent performance of one single device.
The multichannel radio frequency transceiver circuit uses a fractional-N synthesizer in the baseband PLL module to generate the sampling clock required by the system. The ADC sampling clock, DAC sampling clock, and baseband digital clock are generated by any reference clock that meets the reference clock input specification frequency range. For MIMO systems requiring more than two inputs and two output channels, multiple multi-channel radio frequency transceiver circuits and a common reference oscillator are required.
The multi-channel radio frequency transceiver circuit receives an external reference clock and can operate synchronously with other devices using a simple control logic. The sync_in logic pulse input may be used to adjust the data clocks of the various devices having a common reference source. Thereby achieving baseband PLL synchronization between different devices while maintaining a constant RF phase relationship between the devices throughout operation.
The multichannel radio frequency transceiver has the advantages of more synchronous channels for phase consistency test, higher reference clock requirement, huge transmission data volume, large number of required test equipment and high cost. The current phase measurement method uses an oscilloscope to simultaneously observe the clock signals of each chip to verify the data synchronization. If the synchronization is successful, the waveforms will coincide. The method needs to operate the instrument for multiple times, has higher requirement on the instrument, has larger environmental influence on the measurement result, can only test the local phase difference of the signals, and cannot test multiple paths of signals at the same time.
Disclosure of Invention
The invention solves the technical problems that: the platform and the method for testing the phase consistency of the multi-channel radio frequency transceiver not only meet the common phase consistency test of a plurality of channels of a single transceiver, but also can perform the phase consistency test of each channel of a plurality of parallel transceivers.
The solution of the invention is as follows:
a multi-channel RF transceiver phase consistency test platform comprises a signal generator, a power divider, a transceiver, a baseband processing circuit and a multi-channel phase difference calculation module,
the phase consistency of a plurality of channels of a single transceiver can be tested, and the phase consistency of each channel of a plurality of parallel transceivers can also be tested; the number of transceivers in parallel depends on the clock and the driving capabilities of the logic signals;
multichannel phase consistency test for single transceiver: the signal generator comprises a signal generator A and a signal generator B, wherein the signal generator A respectively inputs signals into each receiving channel of the transceiver through the power divider, the signal generator B provides local oscillation signals for the transceiver, and signal data received by each channel of the transceiver is transmitted to the multichannel phase difference calculation module;
phase consistency test for two and more N transceivers: the signal generator comprises a signal generator A, a signal generator B and a signal generator C, a synchronous control module is arranged in the transceiver, and the signal generator A is respectively connected to each receiving channel of the transceiver through a power divider; the signal generator B is divided into N paths through a power divider and is respectively connected to local oscillation receiving channels of the transceiver; the signal generator C divides the sent signal into N+1 paths through the power divider, wherein N paths of signals are input to a phase-locked loop of the transceiver, and the rest paths of signals are input to the baseband processing circuit and used as a system clock; the output of the baseband processing circuit is connected to the synchronous control module of each transceiver to realize the synchronization of a plurality of transceivers; the signal data received by the multiple channels of the N transceivers are transmitted to the multi-channel phase difference calculation module.
Further, the multi-channel phase difference calculation module is used for processing the I/Q data received by the multi-channel of the transceiver, calculating the phase difference between any two channels, and quantitatively reflecting the performance of the phase consistency of the multi-channel radio frequency transceiver.
Further, the signal generator B and the signal generator C share the same reference oscillator, so that both can send out synchronous signals.
Further, the multi-channel phase difference calculation module workflow includes the steps of:
step 1, importing I/Q data of each channel, converting a signal data file received by each channel at a receiving end of a transceiver into I data, importing the Q data into a multi-channel phase difference testing module, intercepting a signal at a certain moment to perform data sampling or intercepting a multi-moment signal periodically or aperiodically, and keeping the number of sampled data at each moment consistent;
step 2, I for channel N N /Q N Performing spectrum analysis on the data, and performing fast Fourier transform on the I/Q data set of each channel respectively;
step 3, obtaining the maximum difference value of the amplitude among the multiple channels according to the amplitude of each group of I/Q of each channel;
step 4, processing each group of I/Q data of each channel to obtain each two inter-channel associated I/Q data groups;
and step 5, calculating to obtain the phase difference value between every two channels according to the correlation I/Q data set value between every two channels.
Further, in step 3, the amplitude of each group of I/Q values of each channel is calculated, and the maximum value is taken as the amplitude abs1, abs2, …, abs n of each channel;
the maximum gain difference between the transceiver channels is obtained as:
Diff_Gain＝Max(abs1,abs2,...,absN)-Min(abs1,abs2,...,absN)。
further, in step 4, the method adopted for obtaining the associated I/Q data set between every two channels is as follows: for the associated I/Q data sets ddc _ ab for lane a and lane b,
ddc_ab＝(I a +j*Q a ).*(I b -j*Q b ) Wherein I a I data for lane a, I b I data for lane b, Q a Q is the Q data of channel a, Q b The Q data for lane b, j is complex.
Further, in step 5, the Phase difference between any two channels a and b is diff_phase,
a method for testing the phase consistency of a multi-channel radio frequency transceiver, which adopts the multi-channel radio frequency transceiver phase consistency testing platform as claimed in claim 1, and specifically comprises the following steps:
s1, connecting receiving channels of all transceivers to the same signal generator A through a power divider;
s2, connecting local oscillation receiving channels of all transceivers to the same signal generator B through a power divider;
s3, connecting clock inputs of all transceivers to the same signal generator C;
s4, powering up a multi-channel radio frequency transceiver phase consistency test platform, and configuring the same frequency for a phase-locked loop of each transceiver through a baseband processing circuit;
s5, carrying out standard register configuration to enable the standard register configuration to generate the same internal sampling clock and write the same internal sampling clock into each transceiver;
s6, opening the synchronization bit of each transceiver, and enabling a synchronization control module in the transceiver;
s7, the signal generator C is connected with a baseband processing circuit, and the baseband processing circuit provides a first rising edge pulse for the synchronous input end of each transceiver;
s8, each transceiver transmits the received clock signal data to a multi-channel phase difference calculation module, and the phase difference output by the multi-channel phase difference calculation module is used as a test comparison value;
s9, configuring a register to synchronize digital clock frequency dividers of all transceivers, so that phase-locked loops of all transceivers to be tested are synchronized;
s10, transmitting a second rising edge pulse to the synchronous input end of each transceiver, wherein the pulse is the same as the rising edge in S7;
s11, each transceiver transmits the received signal data to a multi-channel phase difference calculation module, and the phase difference output by the multi-channel phase difference calculation module is used as a test result value;
s12, comparing the test comparison phase difference with the test result phase difference, wherein the difference is a plurality of transceiver phase consistency indexes, so as to judge the synchronization effect.
Further, in S3, the lengths of the electrical paths connecting the transceivers are equal, so that clock phase deviation is avoided.
Further, in S7, the synchronization input signal pulse has a delay with respect to the clock input signal to ensure synchronization.
Compared with the prior art, the invention has the beneficial effects that:
the multi-channel phase difference calculation module can replace oscilloscope tests in the traditional scheme, does not limit the number of channels to be tested, not only meets the common phase consistency test of a plurality of channels of a single transceiver, but also can carry out the phase consistency test of each channel of a plurality of parallel transceivers.
Drawings
FIG. 1 is a schematic block diagram of a multi-channel RF transceiver phase consistency test platform according to an embodiment of the present invention;
FIG. 2 is a flowchart of a multi-channel phase difference test module according to an embodiment of the invention.
Detailed Description
The invention is further illustrated below with reference to examples.
The traditional phase measurement method uses an oscilloscope to simultaneously observe the clock signals of all chips to verify the data synchronization condition. If the synchronization is successful, the waveforms will coincide. The method needs to operate the instrument for multiple times, has higher requirement on the instrument, has larger environmental influence on the measurement result, can only test the local phase difference of the signals, and cannot test multiple paths of signals at the same time.
As shown in fig. 1, in order to solve the drawbacks of the existing testing method, the invention provides a multi-channel radio frequency transceiver phase consistency testing platform, which comprises a signal generator, a power divider, a transceiver, a baseband processing circuit and a multi-channel phase difference calculating module.
For the phase consistency test of two multi-channel transceivers to be tested, the signal generator A is respectively connected to each receiving channel of the transceivers to be tested through a power divider; the signal generator B is divided into N paths through a power divider and is respectively connected to local oscillation receiving channels of the transceiver to be tested; the signal generator C is divided into N+1 paths through a power divider, wherein N paths are connected to phase-locked loops of transceivers to be tested, and the other paths are connected to a baseband processing circuit; the output of the baseband processing circuit is connected to the synchronous control module of each transceiver to be tested; the signal data received by the channels of the N transceivers to be tested are transmitted to the multi-channel phase difference calculation module.
The phase consistency test platform for the multi-channel radio frequency transceiver can test the phase consistency of a plurality of channels of a single transceiver and also can test the phase consistency of each channel of a plurality of parallel transceivers. The number of transceivers in parallel depends only on the clock and the driving capabilities of the logic signals.
The signal generator A inputs baseband signals into each receiving channel of the transceiver to be tested through the power divider;
the signal generator B provides receiving local oscillation signals for all transceivers to be tested through the power divider;
the signal generator C is divided into N+1 paths of signals through the power divider, wherein N paths of signals are provided with the same frequency for the phase-locked loop of each transceiver to be tested, and the other paths of signals are input into the baseband processing circuit to serve as a system clock;
the signal generator B and the signal generator C described above must share the same reference oscillator.
The baseband processing circuit outputs synchronous control signals and is connected to each synchronous control module of the transceiver to be tested to realize the synchronization of a plurality of transceivers to be tested.
FIG. 2 is a flowchart of the implementation of the multi-channel phase difference calculation module, and as shown in the drawing, the multi-channel phase difference test flow includes the following steps:
in the implementation, the signal data file received by each channel of the receiving end of the transceiver is converted into I, Q data groups, and the I, Q data groups are led into the multi-channel phase difference testing module, so that the signal at a certain moment can be intercepted for data sampling, and the sampled data value is not lower than ten thousand. The method can also intercept multiple time signals periodically or intercept multiple time signals aperiodically, and the number of sampling data at each time is kept consistent.
in practice, a fast fourier transform is required for each channel's I/Q data set:
channel 1: FFT (I1+J.times.Q1)
Channel 2: FFT (I2+J.times.Q2)
…
Channel N: FFT (IN+J. QN)
in a specific implementation, it is preferable to calculate the magnitude of each group of I/Q values of each channel first, and then take the maximum value as the magnitude abs1, abs2, …, abs n of each channel. The maximum gain difference between the transceiver channels is obtained as:
Diff_Gain＝Max(abs1,abs2,...,absN)-Min(abs1,abs2,...,absN)
in a specific implementation, the following method is preferably adopted to obtain each two inter-channel associated I/Q data sets: for the associated I/Q data sets ddc _ ab for lane a and lane b,
ddc_ab＝(Ia+j*Qa).*(Ib-j*Qb)
in practice, the Phase difference between any two channels a and b is preferably Diff _ Phase,
in addition, the invention also provides a method for testing the phase consistency of a plurality of radio frequency transceivers, which adopts the multi-channel radio frequency transceiver phase consistency testing platform, and specifically comprises the following steps:
step 1, connecting the receiving channels of all the transceivers to be tested to the same signal generator A through the power divider.
And step 2, connecting local oscillation receiving channels of all transceivers to be tested to the same signal generator B through the power divider.
And step 3, connecting clock inputs of all transceivers to be tested to the same signal generator C. Further, the lengths of the electrical paths connecting the transceivers to be tested are equal, so that clock phase deviation is avoided.
And 4, powering up the multi-channel radio frequency transceiver phase consistency test platform, and configuring the same frequency for the phase-locked loop of each transceiver through the baseband processing circuit.
And 5, performing standard register configuration to enable the standard register configuration to generate the same internal sampling clock and write the same internal sampling clock into each transceiver to be tested.
And 6, carrying out standard register configuration, opening the synchronization bit of each transceiver, and enabling the multi-chip synchronization module.
And 7, the signal generator C is connected with a baseband processing circuit, and the baseband processing circuit provides a first rising edge pulse for the synchronous input end of each transceiver to be tested. The synchronization input signal pulses have a delay with respect to the clock input signal to ensure synchronization.
And 8, transmitting the received clock signal data to a multi-channel phase consistency calculation module by each transceiver to be tested, and calculating the phase difference of the multi-chip phase synchronous test as a test comparison value.
And 9, configuring a register to synchronize the digital clock frequency dividers of each transceiver to be tested. The phase-locked loops of the transceivers to be tested are finished synchronously.
Step 10, a second rising edge pulse is transmitted to the synchronization input of each transceiver under test, which pulse is identical to the rising edge described in step 7.
And 11, each transceiver to be tested transmits the received clock signal data to a multi-channel phase consistency calculation module, and calculates the phase difference of the multi-chip phase synchronous test as a test result value.
Step 12, comparing the test comparison phase difference with the test result phase difference, wherein the difference is a phase consistency index of the transceivers to be tested.
The multi-channel phase difference calculation module can replace oscilloscope test in the traditional scheme, does not limit the number of channels to be tested, not only meets the common phase consistency test of a plurality of channels of a single transceiver, but also can carry out the phase consistency test of each channel of a plurality of parallel transceivers.
Although the present invention has been described in terms of the preferred embodiments, it is not intended to be limited to the embodiments, and any person skilled in the art can make any possible variations and modifications to the technical solution of the present invention by using the methods and technical matters disclosed above without departing from the spirit and scope of the present invention, so any simple modifications, equivalent variations and modifications to the embodiments described above according to the technical matters of the present invention are within the scope of the technical matters of the present invention.
Claims (10)
1. A multi-channel RF transceiver phase consistency test platform is characterized by comprising a signal generator, a power divider, a transceiver, a baseband processing circuit and a multi-channel phase difference calculation module,
the multichannel phase difference calculation module is used for processing the I/Q data received by the multichannel of the transceiver, calculating to obtain the phase difference between any two channels, and quantitatively reflecting the performance of the phase consistency of the multichannel radio-frequency transceiver;
multichannel phase consistency test for single transceiver: the signal generator comprises a signal generator A and a signal generator B, wherein the signal generator A respectively inputs signals into each receiving channel of the transceiver through the power divider, the signal generator B provides local oscillation signals for the transceiver, and signal data received by each channel of the transceiver is transmitted to the multichannel phase difference calculation module;
phase consistency test for two and more N transceivers: the signal generator comprises a signal generator A, a signal generator B and a signal generator C, a synchronous control module is arranged in the transceiver, and the signal generator A is respectively connected to each receiving channel of the transceiver through a power divider; the signal generator B is divided into N paths through a power divider and is respectively connected to local oscillation receiving channels of the transceiver; the signal generator C divides the sent signal into N+1 paths through the power divider, wherein N paths of signals are input to a phase-locked loop of the transceiver, and the rest paths of signals are input to the baseband processing circuit and used as a system clock; the output of the baseband processing circuit is connected to the synchronous control module of each transceiver to realize the synchronization of a plurality of transceivers; the signal data received by the multiple channels of the N transceivers are transmitted to the multi-channel phase difference calculation module.
2. The multi-channel rf transceiver phase consistency test platform of claim 1, wherein the multi-channel rf transceiver phase consistency test platform is capable of testing the phase consistency of multiple channels of a single transceiver and also capable of testing the phase consistency of each channel of multiple parallel transceivers; the number of transceivers in parallel depends on the clock and the driving capabilities of the logic signals.
3. The platform of claim 1, wherein the signal generator B and the signal generator C share a common reference oscillator, so that they can send out synchronization signals.
4. The multi-channel rf transceiver phase consistency test platform of claim 1, wherein the multi-channel phase difference calculation module workflow comprises the steps of:
step 1, importing I/Q data of each channel, converting a signal data file received by each channel at a receiving end of a transceiver into I data, importing the Q data into a multi-channel phase difference testing module, intercepting a signal at a certain moment to perform data sampling or intercepting a multi-moment signal periodically or aperiodically, and keeping the number of sampled data at each moment consistent;
step 2, I for channel N N /Q N Performing spectrum analysis on the data, and performing fast Fourier transform on the I/Q data set of each channel respectively;
step 3, obtaining the maximum difference value of the amplitude among the multiple channels according to the amplitude of each group of I/Q of each channel;
step 4, processing each group of I/Q data of each channel to obtain each two inter-channel associated I/Q data groups;
and step 5, calculating to obtain the phase difference value between every two channels according to the correlation I/Q data set value between every two channels.
5. The platform of claim 4, wherein in step 3, the amplitude of each set of I/Q values of each channel is calculated, and the maximum value is taken as the amplitude abs1, abs2, …, abs n of each channel;
the maximum gain difference between the transceiver channels is obtained as:
Diff_Gain＝Max(abs1,abs2,...,absN)-Min(abs1,abs2,...,absN)。
6. the platform for testing the phase consistency of a multi-channel radio frequency transceiver according to claim 4, wherein in step 4, the method for obtaining the associated I/Q data set between every two channels is as follows: for the associated I/Q data sets ddc _ ab for lane a and lane b,
ddc_ab＝(I a +j*Q a ).*(I b -j*Q b ) Wherein I a I data for lane a, I b I data for lane b, Q a Q is the Q data of channel a, Q b The Q data for lane b, j is complex.
7. The platform of claim 4, wherein in step 5, the Phase difference between any two channels a and b is diff_phase,
8. A method for testing the phase consistency of a multi-channel radio frequency transceiver, which is characterized by adopting the multi-channel radio frequency transceiver phase consistency testing platform as claimed in claim 1, and specifically comprising the following steps:
s1, connecting receiving channels of all transceivers to the same signal generator A through a power divider;
s2, connecting local oscillation receiving channels of all transceivers to the same signal generator B through a power divider;
s3, connecting clock inputs of all transceivers to the same signal generator C;
s4, powering up a multi-channel radio frequency transceiver phase consistency test platform, and configuring the same frequency for a phase-locked loop of each transceiver through a baseband processing circuit;
s5, carrying out standard register configuration to enable the standard register configuration to generate the same internal sampling clock and write the same internal sampling clock into each transceiver;
s6, opening the synchronization bit of each transceiver, and enabling a synchronization control module in the transceiver;
s7, the signal generator C is connected with a baseband processing circuit, and the baseband processing circuit provides a first rising edge pulse for the synchronous input end of each transceiver;
s8, each transceiver transmits the received clock signal data to a multi-channel phase difference calculation module, and the phase difference output by the multi-channel phase difference calculation module is used as a test comparison value;
s9, configuring a register to synchronize digital clock frequency dividers of all transceivers, so that phase-locked loops of all transceivers to be tested are synchronized;
s10, transmitting a second rising edge pulse to the synchronous input end of each transceiver, wherein the pulse is the same as the rising edge in S7;
s11, each transceiver transmits the received signal data to a multi-channel phase difference calculation module, and the phase difference output by the multi-channel phase difference calculation module is used as a test result value;
s12, comparing the test comparison phase difference with the test result phase difference, wherein the difference is a plurality of transceiver phase consistency indexes, so as to judge the synchronization effect.
9. The method of claim 8, wherein in S3, the lengths of the electrical paths connecting the transceivers are equal to avoid clock phase bias.
10. The method of claim 8, wherein in S7, the synchronization input signal pulse has a delay with respect to the clock input signal to ensure synchronization.
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