CN115579438A - LED chip with inverted silver mirror and preparation method thereof - Google Patents
LED chip with inverted silver mirror and preparation method thereof Download PDFInfo
- Publication number
- CN115579438A CN115579438A CN202211576008.3A CN202211576008A CN115579438A CN 115579438 A CN115579438 A CN 115579438A CN 202211576008 A CN202211576008 A CN 202211576008A CN 115579438 A CN115579438 A CN 115579438A
- Authority
- CN
- China
- Prior art keywords
- layer
- type
- silver
- hole
- insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 title claims abstract description 107
- 229910052709 silver Inorganic materials 0.000 title claims abstract description 107
- 239000004332 silver Substances 0.000 title claims abstract description 107
- 238000002360 preparation method Methods 0.000 title abstract description 10
- 239000010410 layer Substances 0.000 claims abstract description 505
- 229910052751 metal Inorganic materials 0.000 claims abstract description 89
- 239000002184 metal Substances 0.000 claims abstract description 89
- 239000011241 protective layer Substances 0.000 claims abstract description 40
- 239000004065 semiconductor Substances 0.000 claims abstract description 39
- 230000000903 blocking effect Effects 0.000 claims abstract description 24
- 229910000679 solder Inorganic materials 0.000 claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 claims description 42
- 238000000034 method Methods 0.000 claims description 36
- 239000000758 substrate Substances 0.000 claims description 19
- 238000009413 insulation Methods 0.000 claims description 17
- 238000005530 etching Methods 0.000 claims description 14
- 238000003892 spreading Methods 0.000 claims description 9
- 230000007480 spreading Effects 0.000 claims description 9
- 230000004888 barrier function Effects 0.000 claims description 4
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 229910008433 SnCU Inorganic materials 0.000 claims description 2
- 230000008569 process Effects 0.000 description 26
- 238000001259 photo etching Methods 0.000 description 11
- 238000002310 reflectometry Methods 0.000 description 11
- 238000005566 electron beam evaporation Methods 0.000 description 7
- 238000001704 evaporation Methods 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 5
- 229910016570 AlCu Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- XZWYZXLIPXDOLR-UHFFFAOYSA-N metformin Chemical compound CN(C)C(=N)NC(N)=N XZWYZXLIPXDOLR-UHFFFAOYSA-N 0.000 description 2
- 229910007637 SnAg Inorganic materials 0.000 description 1
- 229910009815 Ti3O5 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000001795 light effect Effects 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/405—Reflective materials
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention relates to the technical field of semiconductor devices, in particular to a flip silver mirror light emitting diode chip and a preparation method thereof, wherein the chip comprises: the epitaxial layer sequentially comprises an N-type semiconductor layer, an active light emitting layer and a P-type semiconductor layer from bottom to top; the chip also comprises a current blocking layer, a current expanding layer, a first silver reflecting layer, a Bragg reflecting layer, a second silver reflecting layer, a metal protective layer, a first insulating protective layer, a series metal layer, a second insulating protective layer, a bonding pad layer and a solder ball; the Bragg reflection layer is provided with a Bragg reflection layer through hole, the second silver reflection layer is arranged on the Bragg reflection layer, the first silver reflection layer is arranged below the Bragg reflection layer through hole, and the orthographic projection area of the first silver reflection layer is larger than that of the Bragg reflection layer through hole. The structure of the first silver reflecting layer, the Bragg reflecting layer and the second silver reflecting layer is arranged, so that the brightness of the blue light LED chip is enhanced.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a flip silver mirror light-emitting diode chip and a preparation method thereof.
Background
In recent years, the technology of the light emitting diode is more mature, the application is gradually diversified, the applications of illumination, backlight display, direct display and the like are more and more, and the blue light emitting diode chip is required to be packaged into white light for illumination or backlight display.
The existing flip light-emitting diode chip adopts a mode of adding a Bragg reflector to metal Al to realize total reflection, but the reflectivity of the metal Al is gradually reduced along with the increase of the wavelength in a visible light wave band, so that the luminous efficiency is reduced after the blue light-emitting diode chip is packaged into white light, and a layer of SiO is prepared at the bottom of the Bragg reflector 2 Or SiN material is used for chemical wet etching to prevent plasma gas from damaging the current expanding layer below the Bragg reflecting layer and causing chip failure during chemical dry etching, but SiO is prepared at the bottom of the Bragg reflecting layer 2 Or the SiN material can cause the reflectivity of the Bragg reflection layer to be low, which leads to low brightness of the blue light-emitting diode chip.
Disclosure of Invention
In order to solve the technical problem, the invention provides a flip silver mirror light emitting diode chip and a preparation method thereof.
The invention adopts the following technical scheme: a flip-chip silver mirror light emitting diode chip, the chip comprising:
a substrate;
an epitaxial layer stacked on the substrate;
the current blocking layer, the current expanding layer, the first silver reflecting layer, the Bragg reflecting layer, the second silver reflecting layer, the metal protecting layer, the first insulating protecting layer, the series metal layer, the second insulating protecting layer, the pad layer and the solder balls are sequentially stacked on the epitaxial layer;
the Bragg reflection layer is provided with a Bragg reflection layer through hole, the first silver reflection layer is arranged below the Bragg reflection layer through hole, at least part of the second silver reflection layer penetrates through the Bragg reflection layer through hole to be abutted against the first silver reflection layer to form electric connection, and the orthographic projection area of the first silver reflection layer on the current expansion layer is larger than the bottom area of the Bragg reflection layer through hole.
Compared with the prior art, the invention has the beneficial effects that: the total reflection of 100% of the area of a light emitting region can be realized by arranging the structure of the first silver reflecting layer, the Bragg reflecting layer and the second silver reflecting layer, the reflecting area is increased, and the light emitting brightness of the corresponding blue light emitting diode is increased; the reflectivity of the metal silver is increased along with the increase of the wavelength in the visible light wave band, and the reflectivity of the metal Ag in the visible light wave band is greater than that of the metal Al, so that the luminous efficiency can be greatly improved after the metal silver LED chip is packaged into white light; and the forward projection area of the first silver reflecting layer is larger than the area of the through hole of the Bragg reflecting layer, so that the bottom of the Bragg reflecting layer does not need to prepare SiO for wet etching 2 Layer or SiN layer, can prevent to cause the damage to the electric current expanding layer when dry etching Bragg reflector to promote Bragg reflector's reflectivity, increased blue light emitting diode chip's luminance.
Preferably, the epitaxial layer includes N type semiconductor layer, active luminescent layer, P type semiconductor layer from bottom to top in proper order, be equipped with N type first insulation protection layer through-hole and P type first insulation protection layer through-hole on the first insulation protection layer, the series connection metal level includes N type series connection metal level and P type series connection metal level, N type series connection metal level sees through N type first insulation protection layer through-hole with N type semiconductor layer is contradicted in order to form electric connection, P type series connection metal level sees through P type first insulation protection layer through-hole with the metal protection layer is contradicted in order to form electric connection.
Preferably, be equipped with N type second insulation protection layer through-hole and P type second insulation protection layer through-hole on the second insulation protection layer, the pad layer includes N type pad layer and P type pad layer, N type pad layer sees through N type second insulation protection layer through-hole with N type series connection metal level is contradicted in order to form electric connection, P type pad layer sees through P type second insulation protection layer through-hole with P type series connection metal level is contradicted in order to form electric connection.
Preferably, the current blocking layer includes a plurality of current blocking sub-layers distributed at intervals on the P-type semiconductor layer, the first silver reflective layer includes a plurality of first silver reflective sub-layers distributed at intervals on the current spreading layer, the first silver reflective sub-layers are located right above the corresponding current blocking sub-layers, and an orthographic projection area of the first silver reflective sub-layers on the epitaxial layer is smaller than an orthographic projection area of the current blocking sub-layers on the epitaxial layer.
Preferably, the first silver reflecting layer and the second silver reflecting layer are formed by sequentially laminating an Ag layer or an Ag layer and one or more of an Ni layer, a Ti layer and a Pt layer.
Preferably, the thickness of the first and second silver reflective layers, ag, is between 1000-3000A, the thickness of the Ni layer is between 100-2000A, the thickness of the Ti layer is between 500-5000A, and the thickness of the Pt layer is between 100-3000A.
Preferably, the thickness of the Bragg reflection layer is between 1 and 5um, and the diameter of the through hole of the Bragg reflection layer is between 1 and 20um.
Preferably, the current blocking layer is SiO 2 Layer, siN layer, al 2 O 3 One or more of the layers are laminated.
Preferably, the pad layer is formed by stacking one or more of an Al layer, an AlCu layer, a Ti layer, a Pt layer, a Ni layer, an Au layer, a Sn layer, an SnAg layer and an SnCu layer.
The invention also provides a preparation method of the flip silver mirror light-emitting diode chip, which is used for preparing the flip silver mirror light-emitting diode chip in the technical scheme and comprises the following steps:
providing a substrate, and manufacturing an epitaxial layer on the substrate, wherein the epitaxial layer sequentially comprises an N-type semiconductor layer, an active light emitting layer and a P-type semiconductor layer from bottom to top;
etching the N-type semiconductor layer, the active light-emitting layer and the P-type semiconductor layer to expose the N-type semiconductor conducting step;
manufacturing a current blocking layer on the P-type semiconductor layer;
manufacturing a current expansion layer on the current blocking layer;
manufacturing a first silver reflecting layer on the current spreading layer;
manufacturing a Bragg reflection layer on the first silver reflection layer, and etching the Bragg reflection layer to form a Bragg reflection layer through hole;
manufacturing a second silver reflecting layer on the Bragg reflecting layer;
manufacturing a metal protective layer on the second silver reflecting layer;
manufacturing a first insulating protection layer on the metal protection layer, and etching the first insulating protection layer to form an N-type first insulating protection layer through hole and a P-type first insulating protection layer through hole;
manufacturing a series connection metal layer on the first insulation protection layer, wherein the series connection metal layer comprises an N-type series connection metal layer and a P-type series connection metal layer;
manufacturing a second insulating protection layer on the series connection metal layer, and etching the second insulating protection layer to form an N-type second insulating protection layer through hole and a P-type second insulating protection layer through hole;
manufacturing a pad layer on the second insulating protective layer, wherein the pad layer comprises an N-type pad layer and a P-type pad layer;
and manufacturing a solder ball on the bonding pad layer.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic cross-sectional view illustrating a first embodiment of the present invention;
FIG. 2 is a schematic top view of the first embodiment of the present invention;
FIG. 3 is an enlarged schematic view of detail A of FIG. 2;
FIG. 4 is an enlarged schematic view of detail B of FIG. 2;
fig. 5 is a flowchart of a method for manufacturing a silver mirror flip-chip light emitting diode chip according to a first embodiment of the invention.
Description of reference numerals:
11 substrates, 12 epitaxial layers, 121N type semiconductor layers, 122 active light emitting layers, 123P type semiconductor layers, 124N type semiconductor conducting steps, 13 current blocking layers, 14 current spreading layers, 15 first silver reflecting layers, 16 Bragg reflecting layers, 161 Bragg reflecting layer through holes, 17 second silver reflecting layers, 18 metal protective layers, 19 first insulating protective layers, 191N type first insulating protective layer through holes, 192P type first insulating protective layer through holes, 20 series metal layers, 201N type series metal layers, 202P type series metal layers, 21 second insulating protective layers, 211N type second insulating protective layer through holes, 212P type second insulating protective layer through holes, 22 bonding pad layers, 221N type bonding pad layers, 222P type bonding pad layers and 23 solder balls.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and intended to be illustrative of the embodiments of the present invention, and should not be construed as limiting the invention.
In the description of the embodiments of the present invention, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the embodiments of the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present invention, "a plurality" means two or more unless specifically limited otherwise.
In the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," "fixed," and the like are to be construed broadly, e.g., as being fixed or detachably connected, or integrated; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. Specific meanings of the above terms in the embodiments of the present invention can be understood by those of ordinary skill in the art according to specific situations.
Example one
Referring to fig. 1 to 4, a flip silver mirror light emitting diode chip includes: a substrate 11; an epitaxial layer 12 stacked on the substrate 11; a current blocking layer 13, a current spreading layer 14, a first silver reflecting layer 15, a bragg reflecting layer 16, a second silver reflecting layer 17, a metal protecting layer 18, a first insulating protecting layer 19, a series metal layer 20, a second insulating protecting layer 21, a pad layer 22 and solder balls 23 which are sequentially stacked on the epitaxial layer 12;
the bragg reflector 16 is provided with a bragg reflector through hole 161, the first silver reflector 15 is arranged below the bragg reflector through hole 161, at least part of the second silver reflector 17 penetrates through the bragg reflector through hole 161 to be abutted against the first silver reflector 15 to form electrical connection, and the orthographic projection area of the first silver reflector 15 on the current spreading layer 14 is larger than the bottom area of the bragg reflector through hole 161.
In this embodiment, by setting the structure of the first silver reflective layer 15, the bragg reflective layer 16 and the second silver reflective layer 17, total reflection in the area of the light emitting region of 100% can be achieved, the reflective area is increased, and the luminance of the corresponding blue light emitting diode is also increased; the reflectivity of the metal silver is increased along with the increase of the wavelength in the visible light wave band, and the reflectivity of the metal Ag in the visible light wave band is greater than that of the metal Al, so that the luminous efficiency can be greatly improved after the metal silver LED chip is packaged into white light; and the forward projection area of the first silver reflecting layer 15 is larger than the area of the Bragg reflecting layer through hole 161, so that the bottom of the Bragg reflecting layer 16 does not need to prepare SiO used for wet etching 2 Layer or SiN layer, can prevent to cause the damage to electric current expanding layer 14 when dry etching Bragg reflection layer 16 to promote Bragg reflection layer 16's reflectivity, increased blue light emitting diode chip's luminance.
In the embodiment, the epitaxial layer sequentially comprises an N-type semiconductor layer, an active light emitting layer and a P-type semiconductor layer from bottom to top; the first insulating protective layer 19 is provided with an N-type first insulating protective layer through hole 191 and a P-type first insulating protective layer through hole 192, the series metal layer 20 includes an N-type series metal layer 201 and a P-type series metal layer 202, the N-type series metal layer 201 is abutted against the N-type semiconductor layer 121 through the N-type first insulating protective layer through hole 191 to form an electrical connection, and the P-type series metal layer 202 is abutted against the metal protective layer 18 through the P-type first insulating protective layer through hole 192 to form an electrical connection; the second insulating protective layer 21 is provided with an N-type second insulating protective layer through hole 211 and a P-type second insulating protective layer through hole 212, the pad layer 22 includes an N-type pad layer 221 and a P-type pad layer 222, the N-type pad layer 221 abuts against the N-type series metal layer 201 through the N-type second insulating protective layer through hole 211 to form an electrical connection, and the P-type pad layer 222 abuts against the P-type series metal layer 202 through the P-type second insulating protective layer through hole 212 to form an electrical connection.
In this embodiment, the current blocking layer 13 includes 9 current blocking sub-layers spaced apart from each other on the P-type semiconductor layer 123, the first silver reflective layer 15 includes 9 first silver reflective sub-layers spaced apart from each other on the current spreading layer 14, and the first silver reflective sub-layer is located right above the corresponding current blocking sub-layer and has an orthographic projection area on the epitaxial layer 12 smaller than an orthographic projection area of the current blocking sub-layer on the epitaxial layer 12.
In this embodiment, the substrate 11 may be a sapphire substrate, the first silver reflective layer 15 and the second silver reflective layer 17 are formed by sequentially stacking an Ag layer, an Ni layer, a Ti layer, and a Pt layer, and the lowermost layer of the first silver reflective layer 15 and the second silver reflective layer 17 is an Ag layer, so that the reflectance of the first silver reflective layer 15 and the second silver reflective layer 17 can be ensured.
In this example, the Ag layer thickness of first silver reflective layer 15 and second silver reflective layer 17 was 2000 a, the Ni layer thickness was 1050 a, the Ti layer thickness was 3000 a, and the Pt layer thickness was 2550 a; the thickness of the Bragg reflection layer 16 is 3um; the bragg reflector via 161 has a diameter of 10um.
In this embodiment, the current blocking layer 13 is composed of a SiN layer; the current spreading layer 14 is an ITO layer; the metal protective layer 18 is composed of an AlCu layer; the series metal layer 20 is composed of a Cr layer; the pad layer 22 is composed of an Al layer; the first insulating protection layer 19 and the second insulating protection layer 21 are composed of SiN layers; the solder balls 23 are Sn layers.
Referring to fig. 5, the present invention provides a method for manufacturing a silver mirror flip-chip light emitting diode chip, where the method is used to manufacture the silver mirror flip-chip light emitting diode chip in the above embodiment, and the method includes the following steps:
s1, providing a substrate 11, manufacturing an epitaxial layer 12 on the substrate 11, wherein the epitaxial layer 12 sequentially comprises an N-type semiconductor layer 121, an active light emitting layer 122 and a P-type semiconductor layer 123 from bottom to top;
s2, etching the P-type semiconductor layer 123 to expose the N-type semiconductor conducting step 124;
s3, manufacturing a current barrier layer 13 on the P-type semiconductor layer 123;
s4, manufacturing a current expansion layer 14 on the current barrier layer 13;
s5, manufacturing a first silver reflecting layer 15 on the current expanding layer 14;
s6, manufacturing a Bragg reflection layer 16 on the first silver reflection layer 15, and etching the Bragg reflection layer 16 to form a Bragg reflection layer through hole 161;
s7, manufacturing a second silver reflecting layer 17 on the Bragg reflecting layer 16;
s8, manufacturing a metal protective layer 18 on the second silver reflecting layer 17;
s9, manufacturing a first insulating protection layer 19 on the metal protection layer 18, and etching the first insulating protection layer 19 to form an N-type first insulating protection layer through hole 191 and a P-type first insulating protection layer through hole 192;
s10, manufacturing a series connection metal layer 20 on the first insulation protective layer 19, wherein the series connection metal layer 20 comprises an N-type series connection metal layer 201 and a P-type series connection metal layer 202;
s11, manufacturing a second insulation protection layer 21 on the series metal layer 20, and etching the second insulation protection layer 21 to form an N-type second insulation protection layer through hole 211 and a P-type second insulation protection layer through hole 212;
s12, manufacturing a pad layer 22 on the second insulating protective layer 21, wherein the pad layer 22 comprises an N-type pad layer 221 and a P-type pad layer 222;
s13, manufacturing a solder ball 23 on the pad layer 22.
Specifically, the steps of the method for manufacturing a light emitting diode chip with a silver mirror flip chip shown in this embodiment include:
providing a substrate 11, and preparing an N-type semiconductor layer 121, an active light emitting layer 122 and a P-type semiconductor layer 123 on the substrate 11;
preparing an N-type semiconductor conductive step 124 by utilizing photoetching and inductively coupled plasma etching processes;
depositing a SiN layer on the basis of the steps of the equal three-dimensional chemical vapor deposition process, and removing part of the SiN layer by utilizing photoetching and chemical wet etching processes to form a current barrier layer 13;
plating an ITO film on the basis of the steps by utilizing a magnetron sputtering or electron beam evaporation process, and then removing part of the ITO film by utilizing a photoetching and chemical wet etching process to form a current expansion layer 14;
forming a pattern on the basis of the steps by utilizing a photoetching process, then evaporating and plating an Ag layer, a Ni layer, a Ti layer and a Pt layer metal layer by utilizing an electron beam evaporation process, and then removing redundant metal layers by utilizing a Lift-Off process to form a first silver reflecting layer 15;
evaporating 4-60 layers of SiO2 and Ti3O5 alternate laminated layers by using an electron beam evaporation process to form a Bragg reflection layer 16, and then preparing a Bragg reflection layer through hole 161 by using photoetching and inductively coupled plasma etching processes;
forming a pattern on the basis of the steps by utilizing a photoetching process, then evaporating and plating an Ag layer, a Ni layer, a Ti layer and a Pt layer metal layer by utilizing an electron beam evaporation process, and then removing redundant metal layers by utilizing a Lift-Off process to form a second silver reflecting layer 17;
forming a pattern on the basis of the steps by utilizing a photoetching process, then evaporating an AlCu layer by utilizing an electron beam evaporation process, and then removing redundant metal layers by utilizing a Lift-Off process to form a metal protection layer 18;
depositing a SiN layer on the basis of the steps by using an equal three-dimensional chemical vapor deposition process to form a first insulating protection layer 19, and removing part of the SiN layer by using a photoetching and chemical dry etching process to form an N-type first insulating protection layer through hole 191 and a P-type first insulating protection layer through hole 192;
forming a pattern on the basis of the steps by utilizing a photoetching process, then evaporating a Cr layer by utilizing an electron beam evaporation process, and then removing redundant metal layers by utilizing a Lift-Off process to form a series metal layer 20 comprising an N-type series metal layer 201 and a P-type series metal layer 202;
depositing a SiN layer on the basis of the steps by using an equal three-dimensional chemical vapor deposition process to form a second insulating protection layer 21, and removing part of the SiN layer by using photoetching and chemical dry etching processes to form an N-type second insulating protection layer through hole 211 and a P-type second insulating protection layer through hole 212;
forming a pattern on the basis of the steps by utilizing a photoetching process, then evaporating an Al layer by utilizing an electron beam evaporation worker, and then removing redundant metal layers by utilizing a Lift-Off process to form the pad layer 22, wherein the pad layer comprises an N-type pad layer 221 and a P-type pad layer 222;
the tin ball 23 is prepared by printing Sn metal by a screen printing process and then reflowing at high temperature.
The size and specification of the flip silver mirror light-emitting diode chip prepared by the preparation method of the embodiment are the same as those of the chip prepared by the comparison example, the luminous efficiency tested by a testing instrument is 236lm/W, which is improved by 1.29% compared with the comparison example, and the specific results are shown in Table 1.
Example two
The present embodiment is different from embodiment 1 in that: the thickness of the Bragg reflector layer in this example is 1 μm, and the diameter of the Bragg reflector layer via is 20 μm.
The size and specification of the flip silver mirror light-emitting diode chip prepared by the preparation method of the embodiment are the same as those of the chip prepared by the comparison example, the luminous efficiency tested by a testing instrument is 234lm/W, which is improved by 0.43% compared with the comparison example, and the specific results are shown in Table 1.
EXAMPLE III
The present embodiment is different from embodiment 1 in that: the thickness of the Bragg reflection layer in the embodiment is 4 μm, and the diameter of the through hole of the Bragg reflection layer is 15 μm.
The size specification of the flip silver mirror light-emitting diode chip prepared by the preparation method is the same as that of the chip prepared by the comparison example, the luminous efficiency tested by a testing instrument is 236.5lm/W, which is improved by 1.5% compared with the comparison example, and the specific results are shown in Table 1.
Example four
The difference between this embodiment and embodiment 1 is that the thickness of the bragg reflector layer in this embodiment is 5 μm, and the diameter of the bragg reflector layer through hole is 5 μm.
The size and specification of the flip silver mirror light-emitting diode chip prepared by the preparation method are the same as those of the chip prepared by the comparison example, the luminous efficiency tested by a testing instrument is 238lm/W, the luminous efficiency is improved by 2.15% compared with that of the comparison example, and the specific results are shown in Table 1.
Comparative example
The flip light emitting diode chip prepared by the prior art in the comparison example comprises a substrate, an epitaxial layer arranged on the substrate, and a current blocking layer, a current expanding layer, a protective layer, a Bragg reflecting layer, a metal protective layer, a series metal layer, an insulating protective layer, a bonding pad layer and a solder ball which are sequentially deposited on the epitaxial layer. Wherein the protective layer is SiO 2 A layer or SiN layer, and the metal reflective layer is an Al layer. Testing the light efficiency of the chip by a testing instrumentIs 233lm/W.
Table 1: comparison of partial parameters and comparison table of corresponding light effect results of each embodiment and comparison example
As can be seen from table 1, the structure of the first silver reflective layer 15, the bragg reflective layer 16 and the second silver reflective layer 17 is provided to replace the SiN protective layer, the bragg reflective layer and the metal Al reflective layer in the comparative example, and the thickness of the bragg reflective layer 16 and the diameter of the bragg reflective layer through hole 161 are adjusted in each embodiment, so that the light efficiency of each embodiment of the present invention is better than that of the comparative example.
In summary, the flip silver mirror light emitting diode chip manufactured by the above method has a structure of arranging the first silver reflective layer 15, the bragg reflective layer 16 and the second silver reflective layer 17, so that total reflection in 100% of the area of the light emitting region can be realized, the reflective area is increased, and the light emitting brightness of the corresponding blue light emitting diode is increased; the reflectivity of the metal silver is increased along with the increase of the wavelength in the visible light wave band, and the reflectivity of the metal Ag in the visible light wave band is greater than that of the metal Al, so that the luminous efficiency can be greatly improved after the metal silver LED chip is packaged into white light; and the forward projection area of the first silver reflecting layer 15 is larger than the area of the Bragg reflecting layer through hole 161, so that the bottom of the Bragg reflecting layer 16 does not need to prepare SiO for wet etching 2 The SiN layer can prevent damage to the current expansion layer 14 when the bragg reflection layer 16 is etched by a dry method, so that the reflectivity of the bragg reflection layer 16 is improved, and the brightness of the blue light emitting diode chip is increased.
The above additional technical features can be freely combined and used in superposition by those skilled in the art without conflict.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A flip-chip silver mirror light emitting diode chip, the chip comprising:
a substrate;
an epitaxial layer stacked on the substrate;
the current blocking layer, the current expanding layer, the first silver reflecting layer, the Bragg reflecting layer, the second silver reflecting layer, the metal protecting layer, the first insulating protecting layer, the series metal layer, the second insulating protecting layer, the bonding pad layer and the solder ball are sequentially laminated on the epitaxial layer;
the Bragg reflection layer is provided with a Bragg reflection layer through hole, the first silver reflection layer is arranged below the Bragg reflection layer through hole, the second silver reflection layer at least partially penetrates through the Bragg reflection layer through hole to be abutted against the first silver reflection layer to form electrical connection, and the orthographic projection area of the first silver reflection layer on the current expansion layer is larger than the bottom area of the Bragg reflection layer through hole.
2. The LED chip as claimed in claim 1, wherein the epitaxial layer comprises, in order from bottom to top, an N-type semiconductor layer, an active light emitting layer, and a P-type semiconductor layer, the first insulating layer has an N-type first insulating layer through hole and a P-type first insulating layer through hole, the series metal layer comprises an N-type series metal layer and a P-type series metal layer, the N-type series metal layer contacts the N-type semiconductor layer through the N-type first insulating layer through hole to form an electrical connection, and the P-type series metal layer contacts the metal protective layer through the P-type first insulating layer through hole to form an electrical connection.
3. The led chip of claim 2, wherein the second insulating protective layer has an N-type second insulating protective layer via hole and a P-type second insulating protective layer via hole, the pad layer comprises an N-type pad layer and a P-type pad layer, the N-type pad layer contacts the N-type series metal layer through the N-type second insulating protective layer via hole to form an electrical connection, and the P-type pad layer contacts the P-type series metal layer through the P-type second insulating protective layer via hole to form an electrical connection.
4. The led chip as claimed in claim 2, wherein the current blocking layer includes a plurality of current blocking sub-layers spaced apart from each other on the P-type semiconductor layer, the first silver reflective layer includes a plurality of first silver reflective sub-layers spaced apart from each other on the current spreading layer, the first silver reflective sub-layers are located right above the corresponding current blocking sub-layers and have an area of orthographic projection on the epitaxial layer smaller than an area of orthographic projection on the epitaxial layer of the current blocking sub-layers.
5. The flip-chip silver mirror light emitting diode chip of any of claims 1 to 4, wherein the first silver reflective layer and the second silver reflective layer are each composed of a layer of Ag or a layer of Ag sequentially stacked with one or more of a layer of Ni, a layer of Ti, and a layer of Pt.
6. The flip-chip silver mirror light emitting diode chip of claim 5, wherein the first and second silver reflective layers have an Ag layer thickness between 1000-3000A, an Ni layer thickness between 100-2000A, a Ti layer thickness between 500-5000A, and a Pt layer thickness between 100-3000A.
7. The silver mirror flip chip led chip of any one of claims 1 to 4, wherein the thickness of the bragg reflector layer is between 1 to 5um, and the diameter of the bragg reflector layer through hole is between 1 to 20um.
8. The silver mirror flip chip led chip of any one of claims 1-4, wherein said current blocking layer is SiO 2 Layer, siN layer, al 2 O 3 One or more of the layers are stacked.
9. The LED chip as claimed in claim 1, wherein the pad layer is formed by stacking one or more layers selected from Al layer, alCu layer, ti layer, pt layer, ni layer, au layer, sn layer, snAg layer, and SnCu layer.
10. A method for manufacturing a silver mirror-flipped light-emitting diode chip, wherein the method is used for manufacturing the silver mirror-flipped light-emitting diode chip as claimed in any one of claims 1 to 9, and the method comprises:
providing a substrate, and manufacturing an epitaxial layer on the substrate, wherein the epitaxial layer sequentially comprises an N-type semiconductor layer, an active light emitting layer and a P-type semiconductor layer from bottom to top;
etching the N-type semiconductor layer, the active light-emitting layer and the P-type semiconductor layer to expose the N-type semiconductor conducting step;
manufacturing a current blocking layer on the P-type semiconductor layer;
manufacturing a current expansion layer on the current barrier layer;
manufacturing a first silver reflecting layer on the current spreading layer;
manufacturing a Bragg reflection layer on the first silver reflection layer, and etching the Bragg reflection layer to form a Bragg reflection layer through hole;
manufacturing a second silver reflecting layer on the Bragg reflecting layer;
manufacturing a metal protective layer on the second silver reflecting layer;
manufacturing a first insulating protection layer on the metal protection layer, and etching the first insulating protection layer to form an N-type first insulating protection layer through hole and a P-type first insulating protection layer through hole;
manufacturing a series connection metal layer on the first insulation protection layer, wherein the series connection metal layer comprises an N-type series connection metal layer and a P-type series connection metal layer;
manufacturing a second insulating protection layer on the series connection metal layer, and etching the second insulating protection layer to form an N-type second insulating protection layer through hole and a P-type second insulating protection layer through hole;
manufacturing a pad layer on the second insulating protective layer, wherein the pad layer comprises an N-type pad layer and a P-type pad layer;
and manufacturing a solder ball on the bonding pad layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211576008.3A CN115579438A (en) | 2022-12-09 | 2022-12-09 | LED chip with inverted silver mirror and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211576008.3A CN115579438A (en) | 2022-12-09 | 2022-12-09 | LED chip with inverted silver mirror and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115579438A true CN115579438A (en) | 2023-01-06 |
Family
ID=84589973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211576008.3A Pending CN115579438A (en) | 2022-12-09 | 2022-12-09 | LED chip with inverted silver mirror and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115579438A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115863514A (en) * | 2023-03-03 | 2023-03-28 | 江西兆驰半导体有限公司 | Vertical LED chip and preparation method thereof |
| CN116581225A (en) * | 2023-07-13 | 2023-08-11 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN116613259A (en) * | 2023-07-20 | 2023-08-18 | 江西兆驰半导体有限公司 | Flip LED chip and preparation method |
| CN116646435A (en) * | 2023-07-26 | 2023-08-25 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN117393680A (en) * | 2023-12-12 | 2024-01-12 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN117712245A (en) * | 2024-02-05 | 2024-03-15 | 江西兆驰半导体有限公司 | Flip LED chip and preparation method thereof |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160329461A1 (en) * | 2015-02-17 | 2016-11-10 | Genesis Photonics Inc. | Light emitting diode |
| US20170025571A1 (en) * | 2015-05-22 | 2017-01-26 | Seoul Viosys Co., Ltd. | Light emitting diode with high efficiency |
| US20170047484A1 (en) * | 2015-08-13 | 2017-02-16 | Lextar Electronics Corporation | Semiconductor light emitting structure |
| CN109713103A (en) * | 2018-12-28 | 2019-05-03 | 映瑞光电科技(上海)有限公司 | A kind of LED chip |
| US20200127167A1 (en) * | 2018-10-23 | 2020-04-23 | Seoul Viosys Co., Ltd. | Flip chip type light emitting diode chip |
| US20210359188A1 (en) * | 2019-01-31 | 2021-11-18 | Seoul Viosys Co., Ltd. | Light emitting diode |
| CN114709307A (en) * | 2022-03-16 | 2022-07-05 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN114709311A (en) * | 2022-03-21 | 2022-07-05 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN114709304A (en) * | 2022-03-04 | 2022-07-05 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
-
2022
- 2022-12-09 CN CN202211576008.3A patent/CN115579438A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160329461A1 (en) * | 2015-02-17 | 2016-11-10 | Genesis Photonics Inc. | Light emitting diode |
| US20170025571A1 (en) * | 2015-05-22 | 2017-01-26 | Seoul Viosys Co., Ltd. | Light emitting diode with high efficiency |
| US20170047484A1 (en) * | 2015-08-13 | 2017-02-16 | Lextar Electronics Corporation | Semiconductor light emitting structure |
| US20200127167A1 (en) * | 2018-10-23 | 2020-04-23 | Seoul Viosys Co., Ltd. | Flip chip type light emitting diode chip |
| CN109713103A (en) * | 2018-12-28 | 2019-05-03 | 映瑞光电科技(上海)有限公司 | A kind of LED chip |
| US20210359188A1 (en) * | 2019-01-31 | 2021-11-18 | Seoul Viosys Co., Ltd. | Light emitting diode |
| CN114709304A (en) * | 2022-03-04 | 2022-07-05 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN114709307A (en) * | 2022-03-16 | 2022-07-05 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN114709311A (en) * | 2022-03-21 | 2022-07-05 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115863514A (en) * | 2023-03-03 | 2023-03-28 | 江西兆驰半导体有限公司 | Vertical LED chip and preparation method thereof |
| CN116581225A (en) * | 2023-07-13 | 2023-08-11 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN116581225B (en) * | 2023-07-13 | 2023-10-17 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN116613259A (en) * | 2023-07-20 | 2023-08-18 | 江西兆驰半导体有限公司 | Flip LED chip and preparation method |
| CN116646435A (en) * | 2023-07-26 | 2023-08-25 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN116646435B (en) * | 2023-07-26 | 2023-09-19 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN117393680A (en) * | 2023-12-12 | 2024-01-12 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN117393680B (en) * | 2023-12-12 | 2024-04-12 | 江西兆驰半导体有限公司 | Flip light-emitting diode chip and preparation method thereof |
| CN117712245A (en) * | 2024-02-05 | 2024-03-15 | 江西兆驰半导体有限公司 | Flip LED chip and preparation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN115579438A (en) | LED chip with inverted silver mirror and preparation method thereof | |
| US10580934B2 (en) | Micro light emitting diode and manufacturing method thereof | |
| CN112164742B (en) | Light-emitting diode | |
| KR101072212B1 (en) | Light emitting device and method for fabricating the same | |
| JP2005183911A (en) | Nitride semiconductor light-emitting element and method of manufacturing the same | |
| WO2022140898A1 (en) | High-voltage flip-chip light-emitting diode chip and preparation method therefor | |
| CN113903836B (en) | Flip-chip light emitting diode and light emitting device | |
| CN116646435B (en) | Flip light-emitting diode chip and preparation method thereof | |
| JP2013045846A (en) | Nitride semiconductor light-emitting element, nitride semiconductor light-emitting device and nitride semiconductor light-emitting element manufacturing method | |
| CN114709311A (en) | Flip light-emitting diode chip and preparation method thereof | |
| CN114709307A (en) | Flip light-emitting diode chip and preparation method thereof | |
| CN105322082B (en) | Light-emitting diode chip for backlight unit and light emitting device | |
| CN114864777A (en) | LED chip and preparation method thereof | |
| CN113410359B (en) | Light emitting diode chip, light emitting device and display device | |
| FI122622B (en) | Light-emitting semiconductor device and method of manufacture | |
| CN114335279A (en) | Flip high-voltage light-emitting diode chip and preparation method thereof | |
| CN116581225B (en) | Flip light-emitting diode chip and preparation method thereof | |
| CN116885072A (en) | Light emitting diode and light emitting module | |
| CN116825923A (en) | Flip light-emitting diode chip and preparation method thereof | |
| KR20140135602A (en) | Semiconductor light emimitting device | |
| CN115939286A (en) | Flip Ag mirror light emitting diode chip and preparation method thereof | |
| CN115050878A (en) | Flip LED chip and preparation method thereof | |
| CN113437197A (en) | Flip LED chip and manufacturing method thereof | |
| CN113363373A (en) | Semiconductor light-emitting element and light-emitting device | |
| CN215869439U (en) | LED chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20230106 |
|
| RJ01 | Rejection of invention patent application after publication |