CN115394730A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN115394730A
CN115394730A CN202210540168.6A CN202210540168A CN115394730A CN 115394730 A CN115394730 A CN 115394730A CN 202210540168 A CN202210540168 A CN 202210540168A CN 115394730 A CN115394730 A CN 115394730A
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China
Prior art keywords
semiconductor device
circuit pattern
metal block
view
front surface
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Pending
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CN202210540168.6A
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English (en)
Inventor
西田祐平
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Publication of CN115394730A publication Critical patent/CN115394730A/zh
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Abstract

本发明提供半导体装置，其抑制配置有电阻元件的绝缘电路基板的散热性的降低。半导体装置具有：电阻元件(7)和绝缘电路基板(2)，电阻元件(7)包括金属块(7a)、设置于金属块(7a)上的树脂层(7b)以及设置于树脂层(7b)上的电阻膜(7c)，绝缘电路基板(2)包括绝缘板(3)和电路图案(4a)，电路图案(4a)设置于绝缘板(3)上且在正面具备接合电阻元件(7)的金属块(7a)的背面的接合区域，电路图案在俯视时面积比电阻元件(7)的正面的面积宽阔。此时，金属块(7a)的厚度比电路图案(4a)的厚度厚。由此，金属块(7a)能够将来自电阻元件(7)的电阻膜(7c)的热适当地传导至电路图案(4a)。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
半导体装置包含半导体芯片，被用作电力转换装置。半导体芯片例如包括IGBT(Insulated Gate Bipolar Transistor：绝缘栅双极型晶体管)、功率MOSFET(Metal OxideSemiconductor Field Effect Transistor：金属氧化物半导体场效应晶体管)。这样的半导体装置在壳体内至少包含半导体芯片、外部连接端子、以及配置该半导体芯片和该外部连接端子的绝缘电路基板。在壳体内，各部件被封装部件封装。绝缘电路基板包括绝缘板、设置于该绝缘板的正面的电路图案以及设置于该绝缘板的背面的金属板。在电路图案的正面通过焊料接合半导体芯片和外部连接端子。另外，在半导体装置的背面露出绝缘电路基板的金属板的背面(例如，参照专利文献1)。
在这样的半导体装置中，为了测量电极间的电位，电阻元件配置于电路图案上，构成包含电阻元件的电路。电阻元件例如是分流电阻。分流电阻包括树脂层以及形成于树脂层上的电阻膜和电极。另外，为了散热，分流电阻的树脂层形成于金属块上。
现有技术文献
专利文献
专利文献1：日本特开2021-019064号公报
发明内容
技术问题
但是，即使分流电阻仅包含金属块，也无法将发热的分流电阻充分地冷却。如果来自分流电阻的热传导至其周围，则半导体装置整体的散热性降低，进而半导体装置的可靠性会降低。
本发明是鉴于这样的问题而完成的，其目的在于提供一种能够抑制配置有电阻元件的绝缘电路基板的散热性降低的半导体装置。
技术方案
根据本发明的一个观点，提供一种半导体装置，其具有：电阻元件和绝缘电路基板，所述电阻元件包括金属块、设置于所述金属块上的树脂层以及设置于所述树脂层上的电阻膜，所述绝缘电路基板包括绝缘板和电路图案，所述电路图案设置于所述绝缘板上，并在电路图案的正面具备与所述电阻元件的所述金属块的背面接合的接合区域，且俯视时电路图案的面积比所述电阻元件的正面的面积宽阔，所述金属块的厚度比所述电路图案的厚度厚。
发明效果
根据公开的技术，能够抑制配置有电阻元件的绝缘电路基板的散热性的降低，能够提供抑制了可靠性降低的半导体装置。
附图说明
图1是第一实施方式的半导体装置的俯视图。
图2是第一实施方式的半导体装置的截面图。
图3是第二实施方式的半导体装置的主要部分俯视图。
图4是第二实施方式的半导体装置的主要部分截面图。
图5是第二实施方式的变形例2-1的半导体装置的主要部分俯视图。
图6是第二实施方式的变形例2-1的半导体装置的主要部分截面图。
图7是第二实施方式的变形例2-2的半导体装置的主要部分俯视图。
图8是第二实施方式的变形例2-3的半导体装置的主要部分俯视图。
图9是第二实施方式的变形例2-3的半导体装置的主要部分截面图。
图10是第二实施方式的变形例2-4的半导体装置的主要部分俯视图。
图11是第二实施方式的变形例2-4的半导体装置的主要部分截面图。
图12是第二实施方式的变形例2-5的半导体装置的主要部分俯视图。
图13是第二实施方式的变形例2-5的半导体装置的主要部分截面图。
图14是第三实施方式的半导体装置的主要部分俯视图。
图15是第三实施方式的半导体装置的主要部分截面图。
图16是第四实施方式的半导体装置的主要部分俯视图。
图17是第四实施方式的半导体装置的主要部分截面图。
图18是第五实施方式的半导体装置的主要部分截面图。
图19是第六实施方式的半导体装置的主要部分俯视图。
图20是第六实施方式的半导体装置的主要部分截面图。
符号说明
1、1a～1e 半导体装置
2 绝缘电路基板
3 绝缘板
4、4a～4h 电路图案
4a1 接合区域
5 金属板
6 半导体芯片
7 电阻元件
7a 金属块
7b 树脂层
7c 电阻膜
7d1、7d2 主电流电极
7d3、7d4 测量电极
7e 接合部件
7f、8b 缓和层
8d、8e 主电流端子
8f、8g 电流感测端子
8h 控制端子
9a～9g 键合线
10a、10a1～10a4、11、12 凹部
20 壳体
21 封装部件
具体实施方式
以下，参照附图对实施方式进行说明。应予说明，在以下的说明中，“正面”和“上表面”表示在图的半导体装置1中朝向上侧(+Z方向)的X-Y面。同样地，“上”在图的半导体装置1中表示上侧(+Z方向)的方向。“背面”和“下表面”表示在图的半导体装置1中朝向下侧(-Z方向)的X-Y面。同样地，“下”在图的半导体装置1中表示下侧(-Z方向)的方向。根据需要，在其他附图中也意味着相同的方向性。“正面”、“上表面”、“上”、“背面”、“下表面”、“下”、“侧面”只不过是用于确定相对的位置关系的方便的表示，并不限定本发明的技术思想。例如，“上”和“下”不一定意味着相对于地面的铅垂方向。即，“上”和“下”的方向并不限于重力方向。另外，在以下的说明中，“主要成分”表示含有80体积％以上的情况。
[第一实施方式]
使用图1和图2对第一实施方式的半导体装置进行说明。图1是第一实施方式的半导体装置的俯视图，图2是第一实施方式的半导体装置的截面图。应予说明，图2是图1的单点划线的X-X处的截面图。
半导体装置1具备绝缘电路基板2、搭载于绝缘电路基板2的半导体芯片6和电阻元件7、搭载于绝缘电路基板2的主电流端子8d、8e及电流感测端子8f、8g。半导体装置1的这些部件收纳于壳体20，壳体20内通过封装部件21被封装。
绝缘电路基板2在俯视时为矩形状。绝缘电路基板2包括绝缘板3、设置于绝缘板3的正面的多个电路图案4a～4h、以及设置于绝缘板3的背面的金属板5。绝缘板3和金属板5在俯视时为矩形状。另外，绝缘板3和金属板5的角部也可以倒角成R形状或C形状。金属板5的尺寸在俯视时比绝缘板3的尺寸小，形成于绝缘板3的内侧。绝缘板3具备绝缘性，由导热性良好的陶瓷构成。陶瓷例如由以氧化铝、氮化铝、氮化硅为主要成分的材料构成。另外，绝缘板3的厚度为0.5mm以上且2.0mm以下。
多个电路图案4a～4h由导电性优异的金属构成。这样的金属例如可以是银、铜、镍或至少包含它们中的一种的合金。在本实施方式中，多个电路图案4a～4h以铜或铜合金为主要成分而构成。另外，多个电路图案4a～4h的厚度T2可以为0.2mm以上且1.5mm以下，在本实施方式中为0.3mm。为了提高耐腐蚀性，也可以对多个电路图案4a～4h的表面进行镀覆处理。此时，使用的镀覆材料例如为镍、镍-磷合金、镍-硼合金。对于绝缘板3，在绝缘板3的正面形成金属层，并对该金属层进行例如蚀刻、切削加工、激光加工的处理而得到多个电路图案4a～4h。或者，也可以使预先从金属层切出的多个电路图案4a～4h压接于绝缘板3的正面。另外，对多个电路图案4a～4h各自的角部实施R倒角加工。应予说明，图1和图2所示的多个电路图案4a～4h是一个例子。也可以根据需要适当选择电路图案4a～4h的个数、形状、大小等。应予说明，以下在不区分电路图案4a～4h的情况下，有时表述为电路图案4。
金属板5由导热性优异的金属构成。这样的金属例如是铝、铁、银、铜或至少包含它们中的一种的合金。另外，也可以对金属板5的角部实施R倒角加工。金属板5的厚度为0.2mm以上且0.4mm以下。为了提高耐腐蚀性，也可以对金属板5的表面进行镀覆处理。此时，使用的镀覆材料例如为镍、镍-磷合金、镍-硼合金。
作为这样的绝缘电路基板2，例如能够使用DCB(Direct Copper Bonding：直接铜键合)基板、AMB(Active MetalBrazed：活性金属钎焊)基板。另外，在半导体装置1的绝缘电路基板2的金属板5的背面设置有导热性部件。在该背面隔着导热性部件安装有散热单元(省略图示)。由此，能够进一步提高半导体装置1的散热性。该导热性部件是热界面材料(TIM：Thermal Interface Material)。TIM包括导热性的润滑脂、弹性体片、RTV(RoomTemperature Vulcanization：矽利康)橡胶、凝胶、相变材料等各种材料的总称。
半导体芯片6是由硅或者碳化硅构成的开关元件或二极管元件。半导体芯片6为平板状，在俯视时呈矩形状。在半导体芯片6为开关元件的情况下，例如为IGBT、功率MOSFET。在半导体芯片6为IGBT的情况下，在背面具备俯视时呈矩形状的作为主电极的集电极，在正面，在一个端部的中央部具备俯视时呈矩形状的作为主电极的栅极，在除了栅极以外的区域具备发射极作为主电极。在半导体芯片6为功率MOSFET的情况下，在背面具备俯视时呈矩形状的作为主电极的漏极，在正面，在一个端部的中央部具备俯视时呈矩形状的作为主电极的栅极，在除了栅极以外的区域具备作为主电极的源极。
另外，在半导体芯片6是二极管元件的情况下，例如是SBD(Schottky BarrierDiode：肖特基势垒二极管)、PiN(P-intrinsic-N(正-本征-负))二极管等FWD(FreeWheeling Diode：续流二极管)。这样的半导体芯片6在背面具备俯视时呈矩形状的作为主电极的阴极电极，在正面具备俯视时呈矩形状的作为主电极的阳极电极。
电阻元件7是分流电阻。电阻元件7在俯视时呈矩形状，其一边为9.0mm以上且12mm以下。另外，电阻元件7的高度(侧视时，从背面到正面为止的长度)为0.5mm以上且0.7mm以下。电阻元件7接合于电路图案4a的正面的接合区域4a1。接合区域4a1的外周可以与电阻元件7(后述的金属块7a)的背面的外周对应。即，接合区域4a1在俯视时呈矩形状，并且可以是与电阻元件7相同的面积。电路图案4a的正面在俯视时需要比接合区域4a1宽阔。在俯视时，电路图案4a的外形可以呈比接合区域4a1大一周的矩形状。电阻元件7具备金属块7a、树脂层7b、电阻膜7c、主电流电极7d1、7d2和测量电极7d3、7d4。
金属块7a呈立方体状(块状)，正面和背面为相同的外形和面积。金属块7a在俯视时呈矩形状，其一边为9.0mm以上且12mm以下。另外，金属块7a的厚度T1可以为0.3mm以上且1.0mm以下，在本实施方式中为0.5mm。即，金属块7a的厚度T1相对于电路图案4a的厚度T2优选为1.2倍以上且5.0倍以下，更优选为1.5倍以上且3.0倍以下。
另外，金属块7a(电阻元件7)的背面如上所述接合于电路图案4a的接合区域4a1。此时，电路图案4a的外周部可以比接合区域4a1的外周部向外侧扩展金属块7a的厚度(0.5mm)以上。进一步优选电路图案4a的外周部比接合区域4a1的外周部向外侧扩展金属块7a的厚度的2倍(1.0mm)以上。
金属块7a由导电性优异的金属构成。这样的金属例如是银、铜、镍或至少包含它们中的一种的合金。在此，金属块7a以铜或铜合金作为主要成分而构成。为了提高耐腐蚀性，也可以对金属块7a的表面进行镀覆处理。此时，使用的镀覆材料例如为镍、镍-磷合金、镍-硼合金。
树脂层7b形成于金属块7a的正面整面。树脂层7b由具备绝缘性、耐热性的树脂构成。这样的树脂例如是环氧树脂、酚醛树脂、有机硅树脂、聚酰亚胺树脂。树脂层7b的厚度为0.1mm以上且0.15mm以下。
电阻膜7c在俯视时形成于树脂层7b的正面的中央部。电阻膜7c的一边位于树脂层7b的一端侧。在电阻膜7c的与一边对置的另一边形成有凹部。也就是说，在电阻膜7c的另一边的两端分别设置有凸部。另外，电阻膜7c由金属薄膜构成。金属薄膜例如以银、铜、镍、金或至少包含它们中的一种的合金为主要成分而构成。由这样的金属薄膜构成的电阻膜7c例如通过蒸镀、溅射或者等离子体CVD(Chemical Vaper Deposition：化学气相沉积)对于树脂层7b而生成。电阻膜7c的厚度为0.05mm以上且0.07mm以下。
主电流电极7d1、7d2和测量电极7d3、7d4由导电性优异的金属构成。这样的金属例如以银、铜、镍或至少包含它们中的一种的合金为主要成分而构成。在此，主电流电极7d1、7d2和测量电极7d3、7d4以铜或者铜合金为主要成分而构成。为了提高耐腐蚀性，也可以对主电流电极7d1、7d2和测量电极7d3、7d4的表面进行镀覆处理。此时，使用的镀覆材料例如为镍、镍-磷合金、镍-硼合金。
另外，主电流电极7d1、7d2分别形成长条形的图案。主电流电极7d1、7d2在树脂层7b的正面分别形成于电阻膜7c的侧部。此时，主电流电极7d1、7d2与电阻膜7c的侧部接触。也就是说，主电流电极7d1、7d2位于树脂层7b的外周部。
测量电极7d3、7d4分别形成矩形状的图案。测量电极7d3、7d4与主电流电极7d1、7d2分别平行，并相对于树脂层7b的正面的电阻膜7c形成于主电流电极7d1、7d2的相反侧。此时，测量电极7d3、7d4与电阻膜7c的2个凸部接触。也就是说，测量电极7d3、7d4也位于树脂层7b的外周部。
另外，半导体芯片6和电阻元件7的背面通过接合部件7e(图2)分别与电路图案4b、4a接合。接合部件7e使用金属烧结体或焊料。用于金属烧结体的金属微粒粉体例如以银、铜或至少包含它们中的任一种的合金为主要成分。另外，焊料例如使用无铅焊料。无铅焊料例如以由锡-银-铜构成的合金、由锡-锌-铋构成的合金、由锡-铜构成的合金、由锡-银-铟-铋构成的合金中的至少任一合金为主要成分。进而，焊料中也可以含有添加物。添加物例如为镍、锗、钴或硅。通过含有添加物，焊料的润湿性、光泽、结合强度提高，能够实现可靠性的提高。在本实施方式中，举出接合部件7e为焊料的情况。应予说明，将电阻元件7和电路图案4a接合的接合部件7e的厚度为0.05mm以上且0.20mm以下，在本实施方式中为0.10mm。
主电流端子8d、8e和电流感测端子8f、8g由导电性优异的金属构成。这样的金属例如以银、铜、镍或至少包含它们中的一种的合金为主要成分而构成。在此，主电流端子8d、8e和电流感测端子8f、8g以铜或者铜合金为主要成分而构成。为了提高耐腐蚀性，也可以对主电流端子8d、8e和电流感测端子8f、8g的表面进行镀覆处理。此时，使用的镀覆材料例如为镍、镍-磷合金、镍-硼合金。另外，主电流端子8d、8e和电流感测端子8f、8g可以呈棒状。主电流端子8d、8e和电流感测端子8f、8g通过已述的接合部件与电路图案4d、4e、4f、4g接合。另外，主电流端子8d、8e和电流感测端子8f、8g与电路图案4d、4e、4f、4g的接合也可以使用超声波或者激光直接接合。
键合线9a、9b将电阻元件7的主电流电极7d1、7d2与电路图案4d、4c之间电连接且机械连接。键合线9e、9f将电阻元件7的测量电极7d3、7d4与电路图案4f、4g之间分别电连接且机械连接。另外，键合线9c将电路图案4e、4b之间电连接且机械连接，键合线9d将半导体芯片6的正面的主电极与电路图案4c之间电连接且机械连接。键合线9g将半导体芯片6的控制电极与电路图案4h之间电连接且机械连接。这样的键合线9a～9g由导电性优异的材质构成。作为该材质，例如以金、银、铜、铝或至少包含它们中的一种的合金为主要成分而构成。另外，键合线9e～9g的直径例如为110μm以上且200μm以下。或者，键合线9a～9d的直径例如为350μm以上且500μm以下。
壳体20收纳绝缘电路基板2的正面的多个电路图案4、半导体芯片6、电阻元件7、主电流端子8d、8e和电流感测端子8f、8g的一个端部、以及键合线9a～9g。主电流端子8d、8e和电流感测端子8f、8g的另一个端部可以从壳体20的正面向上方(+Z方向)延伸。壳体20由树脂构成。这样的树脂以热塑性树脂为主要成分而构成。热塑性树脂例如是聚苯硫醚树脂、聚对苯二甲酸丁二醇酯树脂、聚丁二酸丁二醇酯树脂、聚酰胺树脂或丙烯腈丁二烯苯乙烯树脂。
封装部件21可以对壳体20的内侧进行封装。即，封装部件21对绝缘电路基板2的正面的电路图案4、半导体芯片6、电阻元件7、主电流端子8d、8e和电流感测端子8f、8g的一个端部、以及键合线9a～9g进行封装。封装部件21例如包含热固性树脂和热固性树脂中含有的填充剂。热固性树脂例如是环氧树脂、酚醛树脂或马来酰亚胺树脂。作为这样的封装部件的一例，有含有填充剂的环氧树脂。填充剂使用无机物。作为无机物的例子，有氧化硅、氧化铝、氮化硼或氮化铝。封装部件21除了上述的材料以外，还可以是硅凝胶。
在半导体装置1中，半导体芯片6的背面的主电极经由电路图案4e、键合线9c和电路图案4b与作为P端子的主电流端子8e电连接。另外，半导体芯片6的正面的主电极经由键合线9d、电路图案4c、键合线9b、电阻元件7、键合线9a和电路图案4d，与作为N端子的主电流端子8d电连接。半导体芯片6的控制电极经由键合线9g和电路图案4h与控制端子8h电连接。因此，在半导体装置1中，如果在预定的时刻向控制端子8h输入控制信号，则根据控制信号，从半导体芯片6的正面的主电极输出电流。从半导体芯片6输出的电流被输入到电阻元件7的主电流电极7d2，使电阻膜7c通电而从主电流电极7d1输出。此时，在电阻膜7c中通电的电流从测量电极7d4、7d3经由键合线9f、9e和电路图案4g、4f从电流感测端子8g、8f输出。基于该电流，能够测量电位。
如果从半导体芯片6输出的电流对电阻元件7的电阻膜7c进行通电，则电阻膜7c发热。此时，电阻元件7所包含的金属块7a的厚度构成为比电路图案4厚得多。因此，电阻元件7能够将电阻膜7c的发热从金属块7a适当地传导至电路图案4a，并从电路图案4a经由绝缘板3和金属板5向外部散热。
上述半导体装置1具有电阻元件7和绝缘电路基板2，电阻元件7包括金属块7a、设置于金属块7a上的树脂层7b和设置于树脂层7b上的电阻膜7c，绝缘电路基板2包括绝缘板3和电路图案4a，电路图案4a设置于绝缘板3上，并在正面具备与电阻元件7的金属块7a的背面接合的接合区域4a1，俯视时电路图案4a的面积比电阻元件7的正面的面积宽阔。此时，金属块7a的厚度比电路图案4a的厚度厚。由此，金属块7a能够将来自电阻元件7的电阻膜7c的热适当地传导至电路图案4a。因此，电阻元件7的散热性提高，能够抑制绝缘电路基板2的散热性的降低。其结果是，能够抑制半导体装置1的可靠性的降低。
[第二实施方式]
使用图3和图4对第二实施方式的半导体装置进行说明。图3是第二实施方式的半导体装置的主要部分俯视图，图4是第二实施方式的半导体装置的主要部分截面图。应予说明，图3放大示出半导体装置1a的电阻元件7的周边的俯视图。图4放大示出图3的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在第二实施方式中，主要对相对于第一实施方式的半导体装置1的变化点进行说明。另外，对与第一实施方式的半导体装置1相同的构成标注相同的符号，并省略或简单地对它们进行说明。
第二实施方式的半导体装置1a在第一实施方式的半导体装置1的电路图案4a的与配置有电阻元件7的接合区域4a1的四个角对应的区域中的至少任意一个区域形成有凹坑状的凹部。与接合区域4a1的四个角对应的区域是指接合区域4a1的各个角部的外侧附近的区域。在图3和图4中，作为优选的情况，示出了在与接合区域4a1的全部四个角对应的区域分别形成有凹部10a1～10a4的情况。应予说明，凹部10a1～10a4在俯视时可以是圆形状、椭圆形状、矩形状。另外，凹部10a1～10a4的直径为电路图案4a的强度不降低的长度，可以是电路图案4a的外周部与接合区域4a1(电阻元件7)的外周部之间的间隙的50％以上且85％以下。凹部10a1～10a4的深度可以不贯通电路图案4a，而是电路图案4a的厚度T2的50％以上且70％以下。另外，凹部10a1～10a4对于电路图案4a例如通过蚀刻、切削加工、激光加工而形成。
在第一实施方式的半导体装置1中，如上所述，通过使金属块7a的厚度比电路图案4a的厚度厚，从而能够提高电阻元件7的散热性。如果电阻元件7的散热性提高，则对于电路图案4a传导的热也增加。如果对这样的半导体装置1进行温度循环，则根据温度的上升、下降，电路图案4a的温度也变化。特别是，因为从金属块7a向电路图案4a传导热，所以电路图案4a中的温度差也变大，电路图案4a的膨胀、收缩也变大。由于电路图案4a膨胀、收缩，有时绝缘板3因电路图案4a与绝缘板3之间的热膨胀系数之差而无法追随电路图案4a的膨胀、收缩。因此，有时在电路图案4a的角部的下方的绝缘板3产生较大的应力而产生裂纹。此时，容易从电路图案4a的背面侧的各角部朝向绝缘板3的内侧产生裂纹。特别是，在电路图案4a的外周部与接合区域4a1的外周部之间的间隙小的情况下，对绝缘板3产生显著的损伤。应予说明，电路图案4a的外周部与接合区域4a1的外周部之间的间隙越宽，越能够缓和从电路图案4a的背面侧的角部对绝缘板3的应力。
因此，在第二实施方式的半导体装置1a中，在俯视时，在与接合区域4a1的四个角对应的区域形成有凹部10a1～10a4。在电路图案4a的外周部与接合区域4a1的外周部之间产生间隙。例如，在该间隙且接合区域4a1的四个角的外侧形成有凹部10a1～10a4。进而，如图3所示，在俯视时，可以在接合区域4a1的四个角的外侧且电路图案4a的四个角的内侧形成有凹部10a1～10a4。
也就是说，与接合区域4a1的四个角对应的区域的体积比第一实施方式的电路图案4a的四个角的体积减小。因此，即使因针对半导体装置1a的温度循环而产生电路图案4a的膨胀、收缩，电路图案4a也因四个角的体积减少而难以从绝缘板3被拉伸。另外，通过在应力特别容易集中的电路图案4a的四个角存在凹部10a1～10a4，能够缓和针对电路图案4a的角部的下方的绝缘板3的应力，从而抑制裂纹的产生。
在上述半导体装置1a中，能够释放来自电阻元件7的热，能够抑制绝缘电路基板2的散热性的降低。进而，也缓和在电路图案4a的角部之下的绝缘板3产生的应力，抑制裂纹的产生。其结果是，能够防止绝缘电路基板2的损伤的产生，即抑制散热性的降低，还能够抑制半导体装置1a的可靠性的降低。
以下，将形成于电路图案4a的凹部的各种形态作为变形例进行说明。
(变形例2-1)
使用图5和图6对变形例2-1的半导体装置1a进行说明。图5是第二实施方式的变形例2-1的半导体装置的主要部分俯视图，图6是第二实施方式的变形例2-1的半导体装置的主要部分截面图。应予说明，图5是放大示出半导体装置1a的电阻元件7的周边的俯视图。图6是放大示出图5的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在变形例2-1中，主要对相对于第二实施方式的半导体装置1a的变化点进行说明。另外，对与第二实施方式的半导体装置1a相同的构成标注相同的符号，并省略或简单地对它们进行说明。
关于变形例2-1的半导体装置1a而言，是凹部10a1～10a4以在俯视时一部分与接合区域4a1的四个角重叠的方式形成的情况。例如，只要在俯视时凹部以一部分与接合区域4a1的四个角的至少一个角部重叠的方式形成于电路图案4a即可。在图5和图6中，作为优选的情况，示出了在电阻元件7的四个角之下分别形成有凹部10a1～10a4的情况。因此，由电阻元件7的外周部产生的应力被缓和。另外，在这种情况下，作为焊料的接合部件7e也填充于凹部10a1～10a4内。
在变形例2-1的半导体装置1a中，能够释放来自电阻元件7的热，能够抑制绝缘电路基板2的散热性的降低。进而，也缓和在电路图案4a的角部之下的绝缘板3产生的应力而抑制裂纹的产生。其结果是，能够防止绝缘电路基板2的损伤的产生。另外，接合部件7e也填充于凹部10a1～10a4内，防止接合部件7e的润湿扩展。由此，电阻元件7对于电路图案4a的接合强度也提高。其结果是，也能够抑制半导体装置1a的可靠性的降低。
(变形例2-2)
使用图7对变形例2-2的半导体装置1a进行说明。图7是第二实施方式的变形例2-2的半导体装置的主要部分俯视图。应予说明，图7放大示出半导体装置1a的电阻元件7的周边的俯视图。另外，变形例2-2的图7中的单点划线X-X处的截面图能够参照图4。应予说明，在变形例2-2中，主要对相对于第二实施方式的半导体装置1a的变化点进行说明。另外，对与第二实施方式的半导体装置1a相同的构成标注相同的符号，并省略或简单地对它们进行说明。
在变形例2-2的半导体装置1a中，在图3的电路图案4a中，沿着电路图案4a的各边在凹部10a1～10a4之间形成有多个凹部10a。如在图3和图4中说明的那样，伴随着温度变化，由电路图案4a的角部之下的绝缘板3产生较大的应力。另外，此时，有时在电阻元件7的外周部之下的绝缘板3也产生应力。
于是，在变形例2-2的半导体装置1a中，除了电路图案4a的四个角的凹部10a1～10a4以外，还沿着电阻元件7的各边形成有凹部10a。因此，与图3和图4的半导体装置1a相比，能够更可靠地缓和在绝缘板3产生的应力，更可靠地抑制裂纹的产生。
应予说明，在变形例2-2中，也可以如变形例2-1那样，将凹部10a1～10a4和凹部10a以在俯视时与电阻元件7(接合区域4a1)的外周部的一部分重叠的方式形成于电路图案4a。由此，与变形例2-1的情况相比，能够缓和在电阻元件7的外周部之下的绝缘板3产生的应力。
(变形例2-3)
使用图8和图9对变形例2-3的半导体装置1a进行说明。图8是第二实施方式的变形例2-3的半导体装置的主要部分俯视图，图9是第二实施方式的变形例2-3的半导体装置的主要部分截面图。应予说明，图8放大示出半导体装置1a的电阻元件7的周边的俯视图。另外，在图8中，用虚线表示电阻元件7(接合区域4a1)的位置。图9放大示出图8的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在变形例2-3中，主要对相对于第二实施方式的半导体装置1a的变化点进行说明。另外，对与第二实施方式的半导体装置1a的部件相同的构成标注相同的符号，并省略或简单地对它们进行说明。
在变形例2-3的半导体装置1a中，相对于图7的电路图案4a，还在电路图案4a的搭载电阻元件7的接合区域4a1形成有多个凹部10a。也就是说，在变形例2-3中，在电路图案4a的外周部的内侧的整个面形成有多个凹部10a。因此，电阻元件7(接合区域4a1)之下的区域所包含的凹部10a被接合部件7e填充。应予说明，在变形例2-3中，也可以如变形例2-1那样，在俯视时以与电阻元件7(接合区域4a1)的外周部的一部分重叠的方式在电路图案4a形成凹部10a。另外，这样形成的多个凹部10a的体积的总和可以是金属块7a的体积的0.8倍以上且1.2倍以下，优选可以是0.9倍以上且1.1倍以下。
如上所述，在第一实施方式的情况下，由于在电路图案4a搭载金属块7a(电阻元件7)，有时在电路图案4a的角部之下的绝缘板3产生裂纹。在变形例2-3中，通过在电路图案4a使凹部10a的体积的总和与金属块7a的体积大致相同，从而实质上成为与搭载金属块7a之前大致相同的状态。因此，在温度循环中能够抑制电路图案4a的膨胀、收缩，能够缓和在电路图案4a的角部和外周部之下的绝缘板3产生的应力，从而抑制裂纹的产生。另外，由于能够降低电路图案4a整体的膨胀、收缩，因此作为焊料的接合部件7e也可以使用屈服应力低的锡类。
在变形例2-3的半导体装置1a中，能够释放来自电阻元件7的热，能够抑制绝缘电路基板2的散热性的降低。进而，也缓和在电路图案4a的角部和外周部之下的绝缘板3产生的应力而抑制裂纹的产生。其结果是，能够防止绝缘电路基板2的损伤的产生。另外，接合部件7e也填充于凹部10a内，防止接合部件7e的润湿扩展。由此，电阻元件7对于电路图案4a的接合强度也提高。其结果是，也能够抑制半导体装置1a的可靠性的降低。
(变形例2-4)
使用图10和图11对变形例2-4的半导体装置1a进行说明。图10是第二实施方式的变形例2-4的半导体装置的主要部分俯视图，图11是第二实施方式的变形例2-4的半导体装置的主要部分截面图。应予说明，图10放大示出半导体装置1a的电阻元件7的周边的俯视图。图11放大示出图10的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在变形例2-4中，主要对相对于第一实施方式的半导体装置1的变化点进行说明。另外，对与第一实施方式的半导体装置1相同的构成标注相同的符号，并省略或简单地对它们进行说明。
在变形例2-4的半导体装置1a中，在第一实施方式的半导体装置1的电阻元件7的金属块7a的背面形成有槽状的凹部。在图10和图11中，作为优选的情况，示出了凹部11在金属块7a的背面沿着金属块7a的四边在外缘侧形成为环状的情况。进而，凹部11形成于主电流电极7d1、7d2和测量电极7d3、7d4的正下方且从金属块7a的外缘向内侧形成。应予说明，俯视时环状的凹部11的角部也可以呈R形状。凹部11的宽度可以是金属块7a的边的长度的10％以上且30％以下。凹部11的深度可以不贯通金属块7a，而是金属块7a的厚度T1的20％以上且40％以下。
在变形例2-4的半导体装置1a中，通过在金属块7a的背面形成凹部11，从而能够使金属块7a的体积减少。由此，与变形例2-3的情况同样地，能够尽可能接近于与搭载金属块7a之前大致同样的状态。因此，在温度循环中实现电路图案4a的膨胀、收缩的抑制，缓和电路图案4a的角部和外周部之下的绝缘板3的应力，从而抑制裂纹的产生。另外，作为焊料的接合部件7e填充于凹部11内。因此，金属块7a与电路图案4a的接合强度提高。
在变形例2-4的半导体装置1a中，能够释放来自电阻元件7的热，能够抑制绝缘电路基板2的散热性的降低。进而，也缓和在电路图案4a的角部和外周部之下的绝缘板3产生的应力而抑制裂纹的产生。其结果是，能够防止绝缘电路基板2的损伤的产生。另外，接合部件7e也填充于凹部11内，防止接合部件7e的润湿扩展。由此，电阻元件7对于电路图案4a的接合强度也提高。其结果是，也能够抑制半导体装置1a的可靠性的降低。
(变形例2-5)
使用图12和图13对变形例2-5的半导体装置1a进行说明。图12是第二实施方式的变形例2-5的半导体装置的主要部分俯视图，并且图13是第二实施方式的变形例2-5的半导体装置的主要部分截面图。应予说明，图12放大示出半导体装置1a的电阻元件7的周边的俯视图，电阻元件7中的虚线的外侧与凹部11对应。图13放大示出图12的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在变形例2-5中，主要对相对于第一实施方式的半导体装置1的变化点进行说明。另外，对与第一实施方式的半导体装置1相同的构成标注相同的符号，并省略或简单地对它们进行说明。
在变形例2-5的半导体装置1a中，沿着金属块7a的背面的外周，进一步对于金属块7a的背面的四个角，使该外周和四个角凹陷而形成有凹部11。因此，接合部件7e填充金属块7a的电路图案4a侧的凹部11，并且将金属块7a与电路图案4a接合。
在变形例2-5的半导体装置1a中，沿着金属块7a的背面的外周，进一步使背面的四个角凹陷而形成凹部11。因此，金属块7a的背面侧的角部与电路图案4a之间的距离变远。因此，能够使与金属块7a的角部对应的对于绝缘板3的应力缓和，抑制裂纹的产生。另外，作为焊料的接合部件7e填充于凹部11内。因此，金属块7a与电路图案4a的接合强度提高。
在变形例2-5的半导体装置1a中，能够释放来自电阻元件7的热，能够抑制绝缘电路基板2的散热性的降低。进而，通过使金属块7a的背面的外周部和角部凹陷而形成凹部11，金属块7a的背面的角部与电路图案4a之间的距离变远。因此，也缓和在电路图案4a的角部和外周部之下的绝缘板3产生的应力而抑制裂纹的产生。其结果是，能够防止绝缘电路基板2的损伤的产生。另外，接合部件7e也填充于凹部11内，防止接合部件7e的润湿扩展。由此，电阻元件7对于电路图案4a的接合强度也提高。其结果是，也能够抑制半导体装置1a的可靠性的降低。
[第三实施方式]
使用图14和图15对第三实施方式的半导体装置进行说明。图14是第三实施方式的半导体装置的主要部分俯视图，图15是第三实施方式的半导体装置的主要部分截面图。应予说明，图14放大示出半导体装置1b的电阻元件7的周边的俯视图。图15放大示出图14的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在第三实施方式中，主要对相对于第一实施方式的半导体装置1的变化点进行说明。另外，对与第一实施方式的半导体装置1相同的构成标注相同的符号，并省略或简单地对它们进行说明。
第三实施方式的半导体装置1b构成为，在第一实施方式的半导体装置1的配置有电阻元件7的电路图案4a中，背面比正面宽阔，且侧部倾斜。也就是说，第三实施方式的电路图案4a的正面维持电阻元件7的接合区域4a1，侧视时呈梯形。
如上所述，在第一实施方式的情况下，与电路图案4a的膨胀、收缩相应地在电路图案4a的背面的角部之下的绝缘板3产生应力，容易朝向绝缘板3的内部产生裂纹。与此相对，第三实施方式的电路图案4a在俯视时背面位于比正面靠外侧的位置。因此，从电路图案4a的背面侧的各角部对于绝缘板3的应力被缓和，裂纹的产生被抑制。因此，虽然根据电路图案4的图案布局，但越使电路图案4a的背面比正面宽阔，越能够分散对于绝缘板3的应力，从而能够缓和在绝缘板3的特定区域产生的应力。
应予说明，对于第三实施方式的半导体装置1b，也可以如第二实施方式和第二实施方式的各变形例那样对于电路图案4a和金属块7a形成凹部。通过这样，能够更可靠地防止绝缘电路基板2的损伤的产生，另外，还能够提高电阻元件7的对于电路图案4a的接合强度。其结果是，能够更加抑制半导体装置1b的可靠性的降低。
[第四实施方式]
使用图16和图17对第四实施方式的半导体装置进行说明。图16是第四实施方式的半导体装置的主要部分俯视图，图17是第四实施方式的半导体装置的主要部分截面图。应予说明，图16放大示出半导体装置1c的电阻元件7的周边的俯视图。图17放大示出图16的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在第四实施方式中，主要对相对于第一实施方式的半导体装置1的变化点进行说明。另外，对与第一实施方式的半导体装置1相同的构成标注相同的符号，并省略或简单地对它们进行说明。
第四实施方式的半导体装置1c在第一实施方式的半导体装置1的电路图案4a的正面形成有使包括电阻元件7的接合区域4a1的区域凹陷而成的凹部12。在该凹部12设置有缓和层7f，在缓和层7f上接合有电阻元件7。此时，缓和层7f可以是焊料，特别是使用屈服应力低的材料。这样的材料例如是锡类的焊料。
在第四实施方式的半导体装置1c中，通过将缓和层7f设置于形成在电路图案4a的凹部12而配置电阻元件7，从而能够使缓和层7f比第一实施方式的接合部件7e厚。因此，能够通过缓和层7f吸收电路图案4a的膨胀、收缩时的应变，缓和针对绝缘板3的应力，从而防止对于绝缘板3的裂纹的产生。
另外，形成于电路图案4a的凹部12的面积可以在俯视时至少与电路图案4a的电阻元件7的接合区域4a1相同。或者，凹部12也可以在俯视时比电路图案4a的电阻元件7的接合区域4a1宽阔。在俯视时，凹部12的角部也可以呈R形状。另外，凹部12的深度不贯穿电路图案4a，而是电路图案4a的强度不降低的程度，可以是电路图案4a的厚度的30％以上且60％以下。另外，也可以缓和层7f维持预定的厚度，并且金属块7a的背面进入到比电路图案4a的正面更靠绝缘板3侧(-Z方向)的位置。由此，金属块7a的背面和背面侧的侧面通过缓和层7f接合，能够实现金属块7a对于电路图案4a的接合强度的提高。
[第五实施方式]
使用图18对第五实施方式的半导体装置进行说明。图18是第五实施方式的半导体装置的主要部分截面图。应予说明，与图18对应的俯视图能够参照图3。图18对应于图3的单点划线X-X的位置处的电阻元件7的周边的截面。应予说明，在第五实施方式中，主要对相对于第一实施方式的半导体装置1的变化点进行说明。另外，对与第一实施方式的半导体装置1相同的构成标注相同的符号，并省略或简单地对它们进行说明。
第五实施方式的半导体装置1d在将第一实施方式的半导体装置1的电阻元件7与电路图案4a接合的接合部件7e之间设置有缓和层7f。缓和层7f以线膨胀系数比金属块7a和电路图案4a小的材质为主要成分。这样的材质为金属，例如为钼、殷钢(Invar)。另外，缓和层7f的厚度为10μm以上且100μm以下。
应予说明，金属块7a的背面也可以相对于金属块7a的背面侧的接合部件7e进入到比接合部件7e的正面靠绝缘板3侧(-Z方向)的位置。由此，金属块7a的背面和背面侧的侧面通过接合部件7e接合，能够实现金属块7a对于电路图案4a的接合强度的提高。
在第五实施方式的半导体装置1d中，电路图案4a要根据来自电阻元件7的热而膨胀、收缩。此时，电路图案4a被绝缘板3和线膨胀系数比电路图案4a小的缓和层7f夹持，因此膨胀、收缩被抑制。因此，能够缓和在绝缘板3产生的应力，从而防止对于绝缘板3产生裂纹。
应予说明，被接合部件7e夹持的缓和层7f也可以设置于第四实施方式的电路图案4a的凹部12。在这种情况下，也能够缓和在绝缘板3产生的应力，从而防止对于绝缘板3产生裂纹。
[第六实施方式]
使用图19和图20对第六实施方式的半导体装置进行说明。图19是第六实施方式的半导体装置的主要部分俯视图，图20是第六实施方式的半导体装置的主要部分截面图。应予说明，图19放大示出半导体装置1e的电阻元件7的周边的俯视图。图20放大示出图19的单点划线X-X的位置处的电阻元件7的周边的截面图。应予说明，在第六实施方式中，主要对相对于第一实施方式的半导体装置1的变化点进行说明。另外，对与第一实施方式的半导体装置1相同的构成标注相同的符号，并省略或简单地对它们进行说明。
第六实施方式的半导体装置1e在第一实施方式的半导体装置1的电阻元件7与电路图案4a之间设置有缓和层8b。缓和层8b是粘接剂。粘接剂例如以硅酮为主要成分。这样的缓和层8b设置于金属块7a的背面与电路图案4a的正面之间，和金属块7a的背面侧的侧部(外周)。金属块7a的背面与电路图案4a的正面之间的缓和层8b的厚度t1为10μm以下，优选为2μm以下。另外，金属块7a的背面侧的侧部(外周)的缓和层8b的厚度t2可以比厚度t1厚，且为金属块7a的厚度的0.8倍以下。在缓和层8b的厚度t2过厚的情况下，有时缓和层8b会在平面(X-Y面)上扩展而从电路图案4a溢出。
在第六实施方式的半导体装置1e中，电路图案4a根据于来自电阻元件7的热而膨胀、收缩。此时，因膨胀、收缩的电路图案4a的变形引起的应变被缓和层8b吸收。因此，能够缓和在绝缘板3产生的应力，从而防止对于绝缘板3产生裂纹。
应予说明，缓和层8b也可以设置于第四实施方式的电路图案4a的凹部12。在这种情况下，也能够缓和在绝缘板3产生的应力，从而防止对于绝缘板3产生裂纹。

Claims (18)

1.一种半导体装置，其特征在于，具有：
电阻元件，其包括金属块、设置于所述金属块上的树脂层、以及设置于所述树脂层上的电阻膜；以及
绝缘电路基板，其包括绝缘板和电路图案，所述电路图案设置于所述绝缘板上且在正面具备接合所述电阻元件的所述金属块的背面的接合区域，所述电路图案在俯视时面积比所述电阻元件的正面的面积宽阔，
所述金属块的厚度比所述电路图案的厚度厚。
2.根据权利要求1所述的半导体装置，其特征在于，
在所述电路图案的正面形成有凹部。
3.根据权利要求2所述的半导体装置，其特征在于，
所述凹部分别形成于与所述接合区域的四个角对应的区域。
4.根据权利要求3所述的半导体装置，其特征在于，
除了所述四个角以外，所述凹部还在所述四个角的各个角部彼此之间沿着所述电路图案的正面的外周而形成有多个。
5.根据权利要求4所述的半导体装置，其特征在于，
所述凹部还在所述电路图案的正面的所述外周的内侧的区域形成有多个。
6.根据权利要求5所述的半导体装置，其特征在于，
所述凹部的体积的总和为所述金属块的体积的0.8倍以上且1.2倍以下。
7.根据权利要求3至5中任意一项所述的半导体装置，其特征在于，
在俯视时，所述凹部的一部分与所述接合区域的外周重叠。
8.根据权利要求5所述的半导体装置，其特征在于，
所述电阻元件介由接合部件接合于所述接合区域，
所述接合部件分别填充形成于所述接合区域的所述凹部。
9.根据权利要求2所述的半导体装置，其特征在于，
所述电阻元件在所述树脂层的所述电阻膜的两侧部分别具备主电流电极，在所述主电流电极的下部的所述金属块的背面沿着所述主电流电极分别形成有所述凹部。
10.根据权利要求9所述的半导体装置，其特征在于，
所述凹部包含所述金属块的背面的所述主电流电极的下部区域并沿着所述金属块的背面的外周部形成为环状。
11.根据权利要求1或2所述的半导体装置，其特征在于，
在侧视时，所述电路图案的背面比正面宽阔，且侧部倾斜。
12.根据权利要求1或2所述的半导体装置，其特征在于，
所述电阻元件介由缓和层与所述电路图案的所述接合区域接合。
13.根据权利要求12所述的半导体装置，其特征在于，
所述电路图案的包含所述接合区域的区域比所述电路图案的正面向所述绝缘板侧凹陷，在所述区域配置有所述缓和层。
14.根据权利要求12所述的半导体装置，其特征在于，
所述缓和层为焊料。
15.根据权利要求12所述的半导体装置，其特征在于，
所述缓和层以线膨胀系数小于所述电路图案及所述金属块的线膨胀系数的金属为主要成分。
16.根据权利要求15所述的半导体装置，其特征在于，
所述金属为钼、殷钢。
17.根据权利要求12所述的半导体装置，其特征在于，
所述缓和层为粘接剂。
18.根据权利要求12所述的半导体装置，其特征在于，
所述缓和层设置于所述电阻元件与所述电路图案的所述接合区域之间、以及所述电阻元件的所述电路图案侧的外周部。
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JPH0821664B2 (ja) 1990-10-26 1996-03-04 ヤマハ株式会社 リードの半田メッキ装置
JPH104156A (ja) 1996-06-14 1998-01-06 Mitsubishi Electric Corp 半導体装置用絶縁基板及び半導体装置
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