CN114779057A - Automatic verification system and method for input threshold voltage and electronic equipment - Google Patents
Automatic verification system and method for input threshold voltage and electronic equipment Download PDFInfo
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- CN114779057A CN114779057A CN202210700911.XA CN202210700911A CN114779057A CN 114779057 A CN114779057 A CN 114779057A CN 202210700911 A CN202210700911 A CN 202210700911A CN 114779057 A CN114779057 A CN 114779057A
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
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Abstract
The invention discloses an automatic verification system and method for input threshold voltage and electronic equipment, and relates to the field of automatic testing. The system comprises: the device comprises an upper computer software unit and a circuit board connected with the upper computer software unit; the circuit board is provided with a first communication interface, an input voltage determining circuit, a chip unit to be tested and a second communication interface which are sequentially connected with the first communication interface; the chip unit to be tested comprises an input/output interface; the upper computer software unit is used for determining the error value of the input threshold voltage and the preset input voltage, when the error value is within the preset error range, the successful test verification is determined, the data can be automatically processed, the efficiency is high, the stability is high, the power supply test by using an external instrument can be avoided, the interference is reduced, and the test efficiency is improved.
Description
Technical Field
The invention relates to the field of automatic testing, in particular to an input threshold voltage automatic verification system and method and electronic equipment.
Background
With the increasing process and design of Integrated Chips (ICs), the threshold voltage determination can be used as one of important bases for verifying whether the design of the GPIO (General-purpose input/output) chip is normal. Generally, in the GPIO input mode, when the receiving voltage V is greater than or equal to 0.7 × VDD (power supply voltage), the GPIO determines that the input signal is high (this step is a VIH (input high level) test), and when the receiving voltage V is less than or equal to 0.3 × VDD, the GPIO determines that the input signal is low (this step is a VIL (input low level) test), where 0.3 × VDD < V < 0.7 × VDD, the GPIO is in an indeterminate state; therefore, the GPIO threshold discrimination value needs to be close to a reasonable range.
Because the threshold value is a range value, the interference brought by the outside in the test process can influence the whole verification result, and the current common mode is that an external instrument is directly used for supplying power, so that the interference is large, the processing result cannot be automatically identified, and the efficiency is low.
Disclosure of Invention
The invention aims to provide an automatic verification system, method and electronic equipment for input threshold voltage, which aim to solve the problems that the overall verification result is influenced by the external interference of the existing threshold value in the test process, and the existing common mode is that the external instrument is directly used for supplying power, so that the interference is large, the processing result cannot be automatically identified, and the efficiency is low.
In a first aspect, the present invention provides an automatic verification system for input threshold voltage, the system comprising:
the device comprises an upper computer software unit and a circuit board connected with the upper computer software unit;
the circuit board is provided with a first communication interface, an input voltage determining circuit, a chip unit to be tested and a second communication interface which are sequentially connected with the first communication interface; the chip unit to be tested comprises an input/output interface;
the upper computer software unit is used for controlling the input/output interface to be in an input mode through the second communication interface;
the upper computer software unit is used for controlling the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface;
the input voltage determining circuit is used for adjusting input voltage according to preset voltage steps, sampling the input voltage at the input/output interface, and feeding back the sampled input voltage obtained by sampling to the upper computer software unit;
the upper computer software unit is used for determining the voltage value corresponding to the voltage sampling circuit as the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time;
and the upper computer software unit is used for determining an error value of the input threshold voltage and a preset input voltage, and determining that the test verification is successful when the error value is within a preset error range.
Under the condition of adopting the technical scheme, the system for automatically verifying the input threshold voltage provided by the embodiment of the application comprises the following steps: the device comprises an upper computer software unit and a circuit board connected with the upper computer software unit; the circuit board is provided with a first communication interface, an input voltage determining circuit, a chip unit to be tested and a second communication interface, wherein the input voltage determining circuit, the chip unit to be tested and the second communication interface are sequentially connected with the first communication interface; the chip unit to be tested comprises an input/output interface; the upper computer software unit is used for controlling the input/output interface to be in an input mode through the second communication interface; the upper computer software unit is used for controlling the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface; the input voltage determining circuit is used for adjusting input voltage according to preset voltage steps, sampling the input voltage at the input/output interface, and feeding back the sampled input voltage obtained by sampling to the upper computer software unit; the upper computer software unit is used for determining a voltage value corresponding to the voltage sampling circuit as an input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time; the upper computer software unit is used for determining the error value of the input threshold voltage and the preset input voltage, when the error value is within the preset error range, the successful test verification is determined, the data can be automatically processed, the efficiency is high, the stability is high, the power supply test by using an external instrument can be avoided, the interference is reduced, and the test efficiency is improved.
In a possible implementation manner, the input voltage determining circuit includes a power control circuit, a filter circuit and a voltage sampling circuit, which are sequentially electrically connected to the first communication interface;
the upper computer software unit is used for controlling the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface, and comprises:
the upper computer software unit is used for controlling the power supply control circuit to output a potential difference-free voltage through the first communication interface, and the potential difference-free voltage is transmitted to the input and output interface through the filter circuit;
the input voltage determination circuit is used for stepping according to the preset voltage and adjusting input voltage, and is right the input voltage at the input/output interface is sampled, and the sampled input voltage obtained by sampling is fed back to the upper computer software unit, and the input voltage determination circuit comprises:
the power supply control circuit is used for adjusting the input voltage according to the preset voltage step;
the voltage sampling circuit is used for sampling the input voltage at the input/output interface and feeding the sampled input voltage obtained by sampling back to the upper computer software unit.
In a possible implementation manner, the upper computer software unit is configured to determine an error value between the input threshold voltage and a preset input voltage, and when the error value is within a preset error range, determine that the test verification is successful, including:
and the upper computer software unit is used for generating an input/output interface threshold voltage test report based on the input threshold voltage after the input threshold voltage is determined, determining an error value between the input threshold voltage and a preset input voltage based on the input/output interface threshold voltage test report, and determining that the test is successful when the error value is within a preset error range.
In a possible implementation manner, the chip unit to be tested further includes a communication sub-interface having one end connected to the voltage sampling circuit and one end connected to the second communication interface.
In one possible implementation, the input threshold voltage includes an input high level and an input low level.
In a possible implementation manner, in a case that the input threshold voltage is the input high level, the power control circuit is configured to adjust the input voltage according to the preset voltage step, and includes:
the power supply control circuit is used for stepping up and adjusting the input voltage according to a preset voltage;
the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within preset time, and comprises:
and the upper computer software unit is used for determining the voltage value corresponding to the voltage sampling circuit as the input high level of the input/output interface when the sampling input voltage is in a high level state within preset time.
In a possible implementation manner, in a case that the input threshold voltage is the input low level, the power control circuit is configured to adjust the input voltage according to the preset voltage step, and includes:
the power supply control circuit is used for regulating the input voltage according to the preset voltage step;
the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time, and comprises:
and the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input low level of the input/output interface when the sampling input voltage is in a low level state within preset time.
In a second aspect, the present invention further provides an automatic verification method for an input threshold voltage, which is applied to any one of the automatic verification systems for an input threshold voltage in the first aspect, and the method includes:
the upper computer software unit controls the input/output interface to be in an input mode through the second communication interface;
the upper computer software unit controls the input voltage determining circuit to output potential difference-free voltage to the input/output interface through the first communication interface;
the input voltage determining circuit adjusts input voltage according to preset voltage steps, samples the input voltage at the input and output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit;
when the sampling input voltage is in a preset level state within a preset time, the upper computer software unit determines that a voltage value corresponding to the voltage sampling circuit is an input threshold voltage of the input/output interface;
and the upper computer software unit determines the error value of the input threshold voltage and a preset input voltage, and determines that the test verification is successful when the error value is within a preset error range.
In a possible implementation manner, the determining, by the upper computer software unit, an error value between the input threshold voltage and a preset input voltage, and when the error value is within a preset error range, determining that the test verification is successful includes:
and after determining the input threshold voltage, the upper computer software unit generates an input/output interface threshold voltage test report based on the input threshold voltage, determines an error value between the input threshold voltage and a preset input voltage based on the input/output interface threshold voltage test report, and determines that the test is successful when the error value is within a preset error range.
The beneficial effects of the method for automatically verifying the input threshold voltage provided by the second aspect are the same as those of the system for automatically verifying the input threshold voltage described in the first aspect or any possible implementation manner of the first aspect, and are not described herein again.
In a third aspect, the present invention also provides an electronic device, including: one or more processors; and one or more machine readable media having instructions stored thereon, which when executed by the one or more processors, cause the apparatus to perform the method for input threshold voltage auto-verification described in any of the possible implementations of the second aspect.
The beneficial effect of the electronic device provided in the third aspect is the same as that of the input threshold voltage automatic verification method described in the second aspect or any possible implementation manner of the second aspect, and details are not repeated here.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic structural diagram illustrating an input threshold voltage automatic verification system according to an embodiment of the present application;
FIG. 2 is a schematic flowchart illustrating an input threshold voltage auto-verification method according to an embodiment of the present disclosure;
FIG. 3 is a flow chart illustrating another method for automatically verifying an input threshold voltage according to an embodiment of the present application;
fig. 4 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a chip according to an embodiment of the present invention.
Reference numerals:
10-upper computer software unit; 20-a circuit board; 201-a first communication interface; 202-input voltage determination circuitry; 203-chip unit to be tested; 204-a second communication interface; 2031 — input/output interface; 2021-power control circuit; 2022-a filter circuit; 2023-voltage sampling circuit; 2032-a communication sub-interface; 300-an electronic device; 310-a processor; 320-a communication interface; 330-a memory; 340-communication lines; 400-chip; 450-bus system.
Detailed Description
In order to facilitate clear description of technical solutions of the embodiments of the present invention, in the embodiments of the present invention, terms such as "first" and "second" are used to distinguish the same items or similar items having substantially the same functions and actions. For example, the first threshold and the second threshold are only used for distinguishing different thresholds, and the order of the thresholds is not limited. Those skilled in the art will appreciate that the terms "first," "second," etc. do not denote any order or quantity, nor do the terms "first," "second," etc. denote any order or importance.
It is to be understood that the terms "exemplary" or "such as" are used herein to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "such as" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present relevant concepts in a concrete fashion.
In the present invention, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated object, indicating that there may be three relationships, for example, a and/or B, which may indicate: a alone, A and B together, and B alone, wherein A and B may be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a and b combination, a and c combination, b and c combination, or a, b and c combination, wherein a, b and c can be single or multiple.
Fig. 1 shows a schematic structural diagram of an input threshold voltage automatic verification system provided in an embodiment of the present application, and as shown in fig. 1, the input threshold voltage refers to an input threshold voltage of an input/output interface (GPIO), and the input threshold voltage automatic verification system includes:
the device comprises an upper computer software unit 10 and a circuit board 20 connected with the upper computer software unit 10;
the circuit board 20 is provided with a first communication interface 201, and an input voltage determining circuit 202, a chip unit 203 to be tested and a second communication interface 204 which are sequentially connected with the first communication interface 201; the chip unit 203 to be tested includes an input/output interface 2031;
the upper computer software unit 10 is configured to control the input/output interface 2031 to be in an input mode through the second communication interface 204;
the upper computer software unit 10 is configured to control the input voltage determining circuit 202 to output a potential difference-free voltage to the input/output interface 2031 through the first communication interface 201;
the input voltage determining circuit 202 is configured to adjust an input voltage according to a preset voltage step, sample the input voltage at the input/output interface 2031, and feed back the sampled input voltage obtained by sampling to the upper computer software unit 10;
the upper computer software unit 10 is configured to determine that a voltage value corresponding to the voltage sampling circuit is an input threshold voltage of the input/output interface 2031 when the sampled input voltage is in a preset level state within a preset time;
the upper computer software unit 10 is configured to determine an error value between the input threshold voltage and a preset input voltage, and when the error value is within a preset error range, determine that the test verification is successful.
To sum up, the system for automatically verifying the input threshold voltage provided by the embodiment of the present application includes: the device comprises an upper computer software unit and a circuit board connected with the upper computer software unit; the circuit board is provided with a first communication interface, an input voltage determining circuit, a chip unit to be tested and a second communication interface, wherein the input voltage determining circuit, the chip unit to be tested and the second communication interface are sequentially connected with the first communication interface; the chip unit to be tested comprises an input/output interface; the upper computer software unit is used for controlling the input/output interface to be in an input mode through the second communication interface; the upper computer software unit is used for controlling the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface; the input voltage determining circuit is used for adjusting input voltage according to preset voltage steps, sampling the input voltage at the input/output interface, and feeding back the sampled input voltage obtained by sampling to the upper computer software unit; the upper computer software unit is used for determining the voltage value corresponding to the voltage sampling circuit as the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time; the upper computer software unit is used for determining the error value of the input threshold voltage and the preset input voltage, when the error value is within the preset error range, the successful test verification is determined, the data can be automatically processed, the efficiency is high, the stability is high, the power supply test by using an external instrument can be avoided, the interference is reduced, and the test efficiency is improved.
Optionally, referring to fig. 1, the input voltage determining circuit 202 includes a power control circuit 2021, a filter circuit 2022, and a voltage sampling circuit 2023, which are sequentially electrically connected to the first communication interface 201;
the upper computer software unit 10 is configured to control the input voltage determining circuit to output a potential difference-free voltage to the input/output interface through the first communication interface, and includes:
the upper computer software unit is used for controlling the power supply control circuit to output potential difference-free voltage through the first communication interface, and the potential difference-free voltage passes through the filter circuit and then is transmitted to the input/output interface;
the input voltage determining circuit is used for adjusting input voltage according to preset voltage step by step, sampling the input voltage at the input and output interface, and feeding back the sampled input voltage obtained by sampling to the upper computer software unit, and comprises:
the power supply control circuit is used for adjusting the input voltage according to the preset voltage step;
the voltage sampling circuit is used for sampling the input voltage at the input/output interface and feeding the sampled input voltage obtained by sampling back to the upper computer software unit.
Optionally, the upper computer software unit 10 may be PC upper computer software, and may receive the test data, automatically process GPIO threshold test data, output a test report, control the power control circuit to adjust voltage output, and adjust in real time according to feedback of the voltage sampling circuit.
In this application, power control circuit can accurate output millivolt (mV) rank voltage, according to the accurate output voltage of adjusting of demand, and filter circuit can filter GPIO's input voltage for the input source is cleaner, avoids disturbing, and voltage sampling circuit can set up in GPIO pin department near the chip, and the threshold voltage of test is more close actual value, can be more true verify whether GPIO accords with the design requirement.
The voltage sampling circuit can sample the voltage input by the GPIO, the precision can reach mV, and the voltage data can be finally collected into PC upper computer software through a communication sub-interface of the chip unit to be tested.
Optionally, the upper computer software unit is configured to determine an error value between the input threshold voltage and a preset input voltage, and when the error value is within a preset error range, determine that the test verification is successful, including:
and the upper computer software unit is used for generating an input/output interface threshold voltage test report based on the input threshold voltage after the input threshold voltage is determined, determining an error value of the input threshold voltage and a preset input voltage based on the input/output interface threshold voltage test report, and determining that the test is successful when the error value is within a preset error range.
Optionally, referring to fig. 1, the chip unit 203 to be tested further includes a communication sub-interface 2032 having one end connected to the voltage sampling circuit 2023 and one end connected to the second communication interface 204.
It should be noted that the input threshold voltage of the GPIO includes two test items, i.e., input high level (VIH) and input low level (VIL). And when the GPIO input voltage V is less than or equal to VIL, the GPIO stable judgment input is at a low level, and when the GPIO input voltage V is more than or equal to VIH, the GPIO stable judgment input is at a high level.
For example, in a case that the input threshold voltage is the input high level, the power control circuit is configured to adjust the input voltage according to the preset voltage step, and includes:
the power supply control circuit is used for stepping up and adjusting the input voltage according to a preset voltage; the preset voltage may be 10mV, which is not specifically limited in this embodiment of the present application, and the preset voltage value may be adjusted according to an actual application scenario.
The upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time, and comprises:
and the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input high level of the input/output interface when the sampling input voltage is in a high level state within preset time.
And when the voltage is adjusted every time, the upper computer software unit can repeatedly receive the GPIO state for a period of time through the second communication interface until the first feedback state of the GPIO is stable to be high level, the voltage value V1 fed back by the voltage sampling circuit is recorded, and at the moment, the V1 is the VIH value of the GPIO.
Further, for example, in a case that the input threshold voltage is the input low level, the power control circuit is configured to adjust the input voltage according to the preset voltage step, and includes:
the power supply control circuit is used for regulating the input voltage according to the preset voltage step; the preset voltage may be 10mV, which is not specifically limited in this embodiment of the present application, and the preset voltage value may be adjusted according to an actual application scenario.
The upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time, and comprises:
and the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input low level of the input/output interface when the sampling input voltage is in a low level state within preset time.
When the GPIO first feedback state is always stable to be low level, the corresponding output voltage value V2 of the power supply control circuit is recorded, and at the moment, the V2 is the VIL value of the GPIO.
In the present application, referring to fig. 1, the upper computer software unit 10 may be a PC upper computer software, and may send a voltage regulation instruction value to the first communication interface 201, the first communication interface 201 may send the voltage regulation instruction to the power control circuit 2021, the power control circuit outputs a voltage value to the filter circuit 2022, the voltage of the filter circuit 2022 is input to the input/output interface (GPIO) 2031, and outputs a GPIO high level or low level result to the second communication interface 204, the voltage of the filter circuit 2022 is input to the voltage sampling circuit 2023, and the GPIO input voltage is output to the second communication interface 204 through the communication sub-interface 2032, the second communication interface 204 transmits the received test data to the upper computer software unit 10, and finally, the upper computer software unit may automatically process data according to the received data, and determine whether the GPIO threshold level meets the design requirement, so as to achieve the purpose of automatic verification.
To sum up, the system for automatically verifying the input threshold voltage provided by the embodiment of the present application includes: the device comprises an upper computer software unit and a circuit board connected with the upper computer software unit; the circuit board is provided with a first communication interface, an input voltage determining circuit, a chip unit to be tested and a second communication interface, wherein the input voltage determining circuit, the chip unit to be tested and the second communication interface are sequentially connected with the first communication interface; the chip unit to be tested comprises an input/output interface; the upper computer software unit is used for controlling the input/output interface to be in an input mode through the second communication interface; the upper computer software unit is used for controlling the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface; the input voltage determining circuit is used for adjusting input voltage according to preset voltage steps, sampling the input voltage at the input/output interface, and feeding back the sampled input voltage obtained by sampling to the upper computer software unit; the upper computer software unit is used for determining the voltage value corresponding to the voltage sampling circuit as the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time; the upper computer software unit is used for determining the error value of the input threshold voltage and the preset input voltage, when the error value is within the preset error range, the test verification is determined to be successful, the data can be automatically processed, the efficiency is high, the stability is high, the power supply test by using an external instrument can be avoided, the interference is reduced, and the test efficiency is improved.
Fig. 2 is a schematic flowchart illustrating an input threshold voltage automatic verification method provided in an embodiment of the present application, and is applied to the input threshold voltage automatic verification system illustrated in fig. 1, where as shown in fig. 2, the method includes:
step S1: and the upper computer software unit controls the input/output interface to be in an input mode through the second communication interface.
And executing step S2 after the upper computer software unit controls the input/output interface to be in the input mode through the second communication interface.
Step S2: the upper computer software unit controls the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface.
And executing step S3 after the upper computer software unit controls the input voltage determining circuit to output the potential difference-free voltage to the input/output interface through the first communication interface.
Step S3: the input voltage determining circuit adjusts input voltage according to preset voltage steps, samples the input voltage at the input and output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit.
And step S4 is executed after the input voltage determining circuit adjusts the input voltage according to the preset voltage step, samples the input voltage at the input/output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit.
Step S4: and the upper computer software unit determines that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampled input voltage is in a preset level state within preset time.
And when the upper computer software unit determines that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampled input voltage is in the preset level state within the preset time, executing step S5.
Step S5: and the upper computer software unit determines an error value of the input threshold voltage and a preset input voltage, and determines that the test verification is successful when the error value is within a preset error range.
The calibration performance parameters to be measured and the target calibration performance parameters to be measured both include: a power calibration parameter, a frequency offset calibration parameter and a receiving sensitivity calibration parameter; the target performance parameters include a power parameter, a frequency offset parameter, and a receive sensitivity parameter.
To sum up, in the automatic verification method for input threshold voltage provided in the embodiment of the present application, the upper computer software unit controls the input/output interface to be in the input mode through the second communication interface; the upper computer software unit controls the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface; the input voltage determining circuit adjusts input voltage according to preset voltage steps, samples the input voltage at the input/output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit; when the sampled input voltage is in a preset level state within a preset time, the upper computer software unit determines that a voltage value corresponding to the voltage sampling circuit is an input threshold voltage of the input/output interface; the upper computer software unit determines the error value of the input threshold voltage and the preset input voltage, when the error value is within the preset error range, the test verification is determined to be successful, the data can be automatically processed, the efficiency is high, the stability is high, the power supply test by using an external instrument can be avoided, the interference is reduced, and the test efficiency is improved.
Fig. 3 is a schematic flowchart illustrating another automatic verification method for input threshold voltage according to an embodiment of the present application, where the method is applied to the automatic verification system for input threshold voltage shown in fig. 1, and as shown in fig. 3, the automatic verification method for input threshold voltage includes:
step E1: and the upper computer software unit controls the input/output interface to be in an input mode through the second communication interface.
And E2 is executed after the upper computer software unit controls the input/output interface to be in the input mode through the second communication interface.
Step E2: and the upper computer software unit controls the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface.
And E3 is executed after the upper computer software unit controls the input voltage determining circuit to output the potential difference-free voltage to the input/output interface through the first communication interface.
Step E3: the input voltage determining circuit adjusts input voltage according to preset voltage steps, samples the input voltage at the input and output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit.
And E4 is executed after the input voltage determining circuit adjusts the input voltage according to the preset voltage step, samples the input voltage at the input/output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit.
Step E4: and the upper computer software unit determines that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within preset time.
And when the upper computer software unit determines that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampled input voltage is in the preset level state within the preset time, executing step E5.
Step E5: and after determining the input threshold voltage, the upper computer software unit generates an input/output interface threshold voltage test report based on the input threshold voltage, determines an error value between the input threshold voltage and a preset input voltage based on the input/output interface threshold voltage test report, and determines that the test is successful when the error value is within a preset error range.
To sum up, in the automatic verification method for input threshold voltage provided in the embodiment of the present application, the upper computer software unit controls the input/output interface to be in the input mode through the second communication interface; the upper computer software unit controls the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface; the input voltage determining circuit adjusts input voltage according to preset voltage steps, samples the input voltage at the input/output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit; when the sampling input voltage is in a preset level state within a preset time, the upper computer software unit determines that a voltage value corresponding to the voltage sampling circuit is an input threshold voltage of the input/output interface; the upper computer software unit determines an error value of the input threshold voltage and a preset input voltage, when the error value is within a preset error range, the test verification is determined to be successful, data can be automatically processed, the efficiency is high, the stability is high, an external instrument can be prevented from being used for power supply test, the interference is reduced, and the test efficiency is improved.
The method for automatically verifying the input threshold voltage provided by the invention can realize the system for automatically verifying the input threshold voltage as shown in fig. 1, and is not repeated here for avoiding repetition.
The electronic device in the embodiment of the present invention may be a device, or may be a component, an integrated circuit, or a chip in a terminal. The device can be mobile electronic equipment or non-mobile electronic equipment. By way of example, the mobile electronic device may be a mobile phone, a tablet computer, a notebook computer, a palm top computer, a vehicle-mounted electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a Personal Digital Assistant (PDA), and the like, and the non-mobile electronic device may be a server, a Network Attached Storage (NAS), a Personal Computer (PC), a Television (TV), a teller machine or a self-service machine, and the like, and the embodiment of the present invention is not particularly limited.
The electronic device in the embodiment of the present invention may be an apparatus having an operating system. The operating system may be an Android operating system, an ios operating system, or other possible operating systems, which is not limited in the embodiments of the present invention.
Fig. 4 shows a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present invention. As shown in fig. 4, the electronic device 300 includes a processor 310.
As shown in fig. 4, the processor 310 may be a general-purpose Central Processing Unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more ics for controlling the execution of programs according to the present invention.
As shown in fig. 4, the electronic device 300 may further include a communication line 340. Communication link 340 may include a path to communicate information between the aforementioned components.
Optionally, as shown in fig. 4, the electronic device may further include a communication interface 320. The communication interface 320 may be one or more. The communication interface 320 may use any transceiver or the like for communicating with other devices or communication networks.
Optionally, as shown in fig. 4, the electronic device may further include a memory 330. The memory 330 is used to store computer-executable instructions for performing aspects of the present invention and is controlled for execution by the processor. The processor is used for executing computer execution instructions stored in the memory, thereby realizing the method provided by the embodiment of the invention.
As shown in fig. 4, the memory 330 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a Random Access Memory (RAM) or other types of dynamic storage devices that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to such. The memory 330 may be self-contained and coupled to the processor 310 via a communication link 340. The memory 330 may also be integrated with the processor 310.
Optionally, the computer-executable instructions in the embodiment of the present invention may also be referred to as application program codes, which is not specifically limited in this embodiment of the present invention.
In particular implementations, as one embodiment, processor 310 may include one or more CPUs, such as CPU0 and CPU1 in fig. 4, as shown in fig. 4.
In one embodiment, as shown in fig. 4, the terminal device may include a plurality of processors, such as the processor in fig. 4. Each of these processors may be a single-core processor or a multi-core processor.
Fig. 5 is a schematic structural diagram of a chip according to an embodiment of the present invention. As shown in fig. 5, the chip 400 includes one or more than two (including two) processors 310.
Optionally, as shown in fig. 5, the chip further includes a communication interface 320 and a memory 330, and the memory 330 may include a read-only memory and a random access memory and provide operating instructions and data to the processor. The portion of memory may also include non-volatile random access memory (NVRAM).
In some embodiments, as shown in FIG. 5, memory 330 stores elements, execution modules, or data structures, or a subset thereof, or an expanded set thereof.
In the embodiment of the present invention, as shown in fig. 5, by calling an operation instruction stored in the memory (the operation instruction may be stored in the operating system), a corresponding operation is performed.
As shown in fig. 5, the processor 310 controls the processing operation of any one of the terminal devices, and the processor 310 may also be referred to as a Central Processing Unit (CPU).
As shown in fig. 5, memory 330 may include both read-only memory and random access memory and provides instructions and data to the processor. A portion of the memory 330 may also include NVRAM. For example, in applications where the memory, communication interface, and memory are coupled together by a bus system that may include a power bus, a control bus, a status signal bus, etc., in addition to a data bus. For clarity of illustration, however, the various buses are designated as bus system 450 in figure 5.
As shown in fig. 5, the method disclosed in the above embodiments of the present invention may be applied to or implemented by a processor. The processor may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The processor may be a general purpose processor, a Digital Signal Processor (DSP), an ASIC, an FPGA (field-programmable gate array) or other programmable logic device, discrete gate or transistor logic, or discrete hardware components. The various methods, steps, and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor.
In one aspect, a computer-readable storage medium is provided, in which instructions are stored, and when executed, the instructions implement the functions performed by the terminal device in the above embodiments.
In one aspect, a chip is provided, where the chip is applied in a terminal device, and the chip includes at least one processor and a communication interface, where the communication interface is coupled to the at least one processor, and the processor is configured to execute instructions to implement the functions performed by the input threshold voltage automatic verification method in the foregoing embodiments.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the procedures or functions described in the embodiments of the present invention are performed in whole or in part. The computer may be a general purpose computer, special purpose computer, computer network, terminal, user equipment, or other programmable device. The computer program or instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer program or instructions may be transmitted from one website, computer, server or data center to another website, computer, server or data center by wire or wirelessly. The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that integrates one or more available media. The usable medium may be a magnetic medium, such as a floppy disk, hard disk, magnetic tape; or an optical medium, such as a Digital Video Disc (DVD); it may also be a semiconductor medium, such as a Solid State Drive (SSD).
While the invention has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
While the invention has been described in conjunction with specific features and embodiments thereof, it will be evident that various modifications and combinations can be made thereto without departing from the spirit and scope of the invention. Accordingly, the specification and drawings are merely illustrative of the invention as defined by the appended claims and are intended to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. An input threshold voltage auto-verification system, the system comprising:
the device comprises an upper computer software unit and a circuit board connected with the upper computer software unit;
the circuit board is provided with a first communication interface, an input voltage determining circuit, a chip unit to be tested and a second communication interface which are sequentially connected with the first communication interface; the chip unit to be tested comprises an input/output interface;
the upper computer software unit is used for controlling the input/output interface to be in an input mode through the second communication interface;
the upper computer software unit is used for controlling the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface;
the input voltage determining circuit is used for adjusting input voltage according to preset voltage steps, sampling the input voltage at the input/output interface, and feeding back the sampled input voltage obtained by sampling to the upper computer software unit;
the upper computer software unit is used for determining a voltage value corresponding to the voltage sampling circuit as an input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time;
and the upper computer software unit is used for determining the error value of the input threshold voltage and the preset input voltage, and when the error value is within the preset error range, the test verification is determined to be successful.
2. The system of claim 1, wherein the input voltage determining circuit comprises a power control circuit, a filter circuit and a voltage sampling circuit electrically connected to the first communication interface in sequence;
the upper computer software unit is used for controlling the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface, and comprises:
the upper computer software unit is used for controlling the power supply control circuit to output potential difference-free voltage through the first communication interface, and the potential difference-free voltage passes through the filter circuit and then is transmitted to the input/output interface;
the input voltage determining circuit is used for adjusting input voltage according to preset voltage step by step, sampling the input voltage at the input and output interface, and feeding back the sampled input voltage obtained by sampling to the upper computer software unit, and comprises:
the power supply control circuit is used for adjusting the input voltage according to the preset voltage step;
the voltage sampling circuit is used for sampling the input voltage at the input/output interface and feeding the sampled input voltage obtained by sampling back to the upper computer software unit.
3. The system of claim 1, wherein the upper computer software unit is configured to determine an error value between the input threshold voltage and a preset input voltage, and when the error value is within a preset error range, determine that the test verification is successful, and include:
and the upper computer software unit is used for generating an input/output interface threshold voltage test report based on the input threshold voltage after the input threshold voltage is determined, determining an error value between the input threshold voltage and a preset input voltage based on the input/output interface threshold voltage test report, and determining that the test is successful when the error value is within a preset error range.
4. The system of claim 2, wherein the under-test chip unit further comprises a communication sub-interface having one end connected to the voltage sampling circuit and one end connected to the second communication interface.
5. The system of claim 2, wherein the input threshold voltage comprises an input high level and an input low level.
6. The system of claim 5, wherein in the case that the input threshold voltage is the input high level, the power control circuit is configured to adjust the input voltage according to the preset voltage step, and the power control circuit comprises:
the power supply control circuit is used for stepping up and adjusting the input voltage according to a preset voltage;
the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time, and comprises:
and the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input high level of the input/output interface when the sampling input voltage is in a high level state within preset time.
7. The system of claim 5, wherein the power control circuit, in the case that the input threshold voltage is the input low level, is configured to adjust the input voltage in accordance with the preset voltage step, and comprises:
the power supply control circuit is used for regulating the input voltage according to the preset voltage step;
the upper computer software unit is used for determining that the voltage value corresponding to the voltage sampling circuit is the input threshold voltage of the input/output interface when the sampling input voltage is in a preset level state within a preset time, and comprises:
and the upper computer software unit is used for determining the voltage value corresponding to the voltage sampling circuit as the input low level of the input/output interface when the sampling input voltage is in a low level state within preset time.
8. An input threshold voltage automatic verification method applied to the input threshold voltage automatic verification system of any one of claims 1 to 7, the method comprising:
the upper computer software unit controls the input/output interface to be in an input mode through the second communication interface;
the upper computer software unit controls the input voltage determining circuit to output potential difference-free voltage to the input and output interface through the first communication interface;
the input voltage determining circuit adjusts input voltage according to preset voltage steps, samples the input voltage at the input and output interface, and feeds back the sampled input voltage obtained by sampling to the upper computer software unit;
when the sampled input voltage is in a preset level state within a preset time, the upper computer software unit determines that a voltage value corresponding to the voltage sampling circuit is an input threshold voltage of the input/output interface;
and the upper computer software unit determines the error value of the input threshold voltage and a preset input voltage, and determines that the test verification is successful when the error value is within a preset error range.
9. The method of claim 8, wherein the upper computer software unit determines an error value between the input threshold voltage and a preset input voltage, and when the error value is within a preset error range, it determines that the test verification is successful, comprising:
and after the upper computer software unit determines the input threshold voltage, generating an input/output interface threshold voltage test report based on the input threshold voltage, determining an error value of the input threshold voltage and a preset input voltage based on the input/output interface threshold voltage test report, and determining that the test is successful when the error value is within a preset error range.
10. An electronic device, comprising: one or more processors; and one or more machine readable media having instructions stored thereon that when executed by the one or more processors cause performance of the input threshold voltage auto-verification method of any of claims 8 to 9.
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Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1619701A (en) * | 2003-11-18 | 2005-05-25 | 海力士半导体有限公司 | Method of measuring threshold voltage for a NAND flash memory device |
| JP2008102094A (en) * | 2006-10-20 | 2008-05-01 | Fujitsu Ltd | Voltage monitoring method and its device |
| CN101281216A (en) * | 2008-05-28 | 2008-10-08 | 北京中星微电子有限公司 | Voltage measuring circuit using scan mode |
| CN102116792A (en) * | 2009-12-31 | 2011-07-06 | 国民技术股份有限公司 | System and method for testing chip voltage signal |
| US20120146674A1 (en) * | 2010-12-13 | 2012-06-14 | International Business Machines Corporation | Determining local voltage in an electronic system |
| CN103064000A (en) * | 2013-01-05 | 2013-04-24 | 北京大学 | Threshold voltage distribution monitoring device and method of metal oxide semiconductor (MOS) tube array |
| CN104215812A (en) * | 2013-06-05 | 2014-12-17 | 上海华虹集成电路有限责任公司 | MCU (micro controller unit) chip power voltage detection circuit |
| CN105680504A (en) * | 2015-12-18 | 2016-06-15 | 联想(北京)有限公司 | Protection method, protection circuit and electronic equipment |
| CN105823976A (en) * | 2015-01-09 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting chip and verifying chip testing result |
| CN106405388A (en) * | 2016-08-19 | 2017-02-15 | 西安电子科技大学 | Digital chip function test method and system |
| CN107196272A (en) * | 2017-07-07 | 2017-09-22 | 成都启臣微电子股份有限公司 | A kind of continuous protection device of Switching Power Supply armature winding peak point current depth |
| CN112782569A (en) * | 2019-11-11 | 2021-05-11 | 圣邦微电子（北京）股份有限公司 | Threshold value testing device and method for digital chip pin logic level |
| CN114236217A (en) * | 2022-02-23 | 2022-03-25 | 苏州贝克微电子股份有限公司 | Floating type chip voltage detection circuit |
| CN114336939A (en) * | 2021-12-30 | 2022-04-12 | 盈帜科技（常州）有限公司 | Method for judging overvoltage and undervoltage of mains supply |
| CN114624500A (en) * | 2022-04-20 | 2022-06-14 | 四川大学 | Precision measurement system for pA-level weak current |
-
2022
- 2022-06-21 CN CN202210700911.XA patent/CN114779057B/en active Active
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1619701A (en) * | 2003-11-18 | 2005-05-25 | 海力士半导体有限公司 | Method of measuring threshold voltage for a NAND flash memory device |
| JP2008102094A (en) * | 2006-10-20 | 2008-05-01 | Fujitsu Ltd | Voltage monitoring method and its device |
| CN101281216A (en) * | 2008-05-28 | 2008-10-08 | 北京中星微电子有限公司 | Voltage measuring circuit using scan mode |
| CN102116792A (en) * | 2009-12-31 | 2011-07-06 | 国民技术股份有限公司 | System and method for testing chip voltage signal |
| US20120146674A1 (en) * | 2010-12-13 | 2012-06-14 | International Business Machines Corporation | Determining local voltage in an electronic system |
| CN103064000A (en) * | 2013-01-05 | 2013-04-24 | 北京大学 | Threshold voltage distribution monitoring device and method of metal oxide semiconductor (MOS) tube array |
| CN104215812A (en) * | 2013-06-05 | 2014-12-17 | 上海华虹集成电路有限责任公司 | MCU (micro controller unit) chip power voltage detection circuit |
| CN105823976A (en) * | 2015-01-09 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting chip and verifying chip testing result |
| CN105680504A (en) * | 2015-12-18 | 2016-06-15 | 联想(北京)有限公司 | Protection method, protection circuit and electronic equipment |
| CN106405388A (en) * | 2016-08-19 | 2017-02-15 | 西安电子科技大学 | Digital chip function test method and system |
| CN107196272A (en) * | 2017-07-07 | 2017-09-22 | 成都启臣微电子股份有限公司 | A kind of continuous protection device of Switching Power Supply armature winding peak point current depth |
| CN112782569A (en) * | 2019-11-11 | 2021-05-11 | 圣邦微电子（北京）股份有限公司 | Threshold value testing device and method for digital chip pin logic level |
| CN114336939A (en) * | 2021-12-30 | 2022-04-12 | 盈帜科技（常州）有限公司 | Method for judging overvoltage and undervoltage of mains supply |
| CN114236217A (en) * | 2022-02-23 | 2022-03-25 | 苏州贝克微电子股份有限公司 | Floating type chip voltage detection circuit |
| CN114624500A (en) * | 2022-04-20 | 2022-06-14 | 四川大学 | Precision measurement system for pA-level weak current |
Non-Patent Citations (1)
| Title |
|---|
| 邢亚第: "一种不共地***的电压门限监控电路", 《微处理机》 * |
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