CN114325534A - Signal testing method, device, equipment and readable storage medium - Google Patents
Signal testing method, device, equipment and readable storage medium Download PDFInfo
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Abstract
The invention relates to the technical field of chip signal quality testing, and discloses a signal testing method, a signal testing device, signal testing equipment and a readable storage medium. Wherein, the method comprises the following steps: acquiring signal sampling parameters of a main control chip to be tested; adjusting a signal sampling parameter of a main control chip to be detected, and acquiring a receiving end signal after the signal sampling parameter is adjusted; testing a signal error rate corresponding to a signal of a receiving end; and evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value. By implementing the method and the device, the signal of the receiving end of the main control chip to be tested can be directly acquired, the limitation that the internal signal of the main control chip to be tested is acquired by means of external equipment is eliminated, meanwhile, the signal quality of the receiving end of the main control chip to be tested is evaluated, and the signal integrity test of the main control chip to be tested is met.
Description
Technical Field
The invention relates to the technical field of chip signal quality testing, in particular to a signal testing method, a device, equipment and a readable storage medium.
Background
At present, the main stream of the server is suitable for DDR4 internal memory, and in order to ensure the safety and reliability of data, the signal consistency test of the DDR4 link has a crucial influence on the smooth operation of the server and the perfect use of the server internal memory. Generally, the signal consistency test of the DDR4 memory in the server mainly verifies the quality of a write signal of a main control chip, and the test at the receiving end of the main control chip has a large limitation, and if the test is performed by using a probe, the test may be affected by the internal routing of the chip, which causes signal reflection and signal delay, and the signal consistency cannot be ensured. Therefore, the existing signal consistency test has large test limitation at the receiving end of the main control chip, and the signal quality at the receiving end of the chip is difficult to verify, so that the signal integrity test is difficult to meet.
Disclosure of Invention
In view of this, embodiments of the present invention provide a signal testing method, an apparatus, a device, and a readable storage medium, so as to solve the problem that the signal quality at the receiving end of the main control chip is difficult to verify, and thus the integrity test of the signal is difficult to meet.
According to a first aspect, an embodiment of the present invention provides a signal testing method, including: acquiring signal sampling parameters of a main control chip to be tested; adjusting the signal sampling parameters of the main control chip to be tested, and acquiring receiving end signals after the signal sampling parameters are adjusted; testing a signal error rate corresponding to the receiving end signal; and evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value.
According to the signal testing method provided by the embodiment of the invention, the receiving end signal of the main control chip to be tested is determined by adjusting the signal sampling parameter, the signal error rate corresponding to the receiving end signal is measured in real time, and the receiving end signal can directly represent the internal signal of the main control chip to be tested, so that the limitation that the internal signal of the main control chip to be tested is obtained by external equipment is eliminated, and the influence that the internal signal obtaining is limited by the internal wiring of the chip is avoided. The signal quality of the receiving end of the main control chip to be tested is evaluated through the relation between the signal error rate and the error rate threshold value, so that the signal quality of the receiving end of the main control chip to be tested is verified, and the signal integrity test of the main control chip to be tested is met.
With reference to the first aspect, in a first implementation manner of the first aspect, the evaluating the signal quality of the receiving end of the main control chip to be tested based on the relationship between the signal error rate and the error rate threshold includes: determining a target variation range of the signal sampling parameter based on the relation between the signal error rate and an error rate threshold value; and evaluating the signal quality of the receiving end of the main control chip to be tested based on the value of the target variation range.
With reference to the first implementation manner of the first aspect, in a second implementation manner of the first aspect, the determining a target variation range of the signal sampling parameter based on the relationship between the signal error rate and an error rate threshold includes: judging whether the signal error rate exceeds the error rate threshold value; when the signal error rate exceeds the error rate threshold value, determining a sampling parameter minimum value and a sampling parameter maximum value corresponding to the signal error rate; and determining the interval corresponding to the minimum value and the maximum value of the sampling parameter as the target variation range of the signal sampling parameter.
The signal testing method provided by the embodiment of the invention determines the target variation range of the signal sampling parameter through the relation between the signal error rate and the error rate threshold value, and determines whether the signal quality of the receiving end is good or not based on the value corresponding to the target variation range, thereby improving the testing reliability and the testing efficiency of the signal quality of the receiving end.
With reference to the first aspect, in a third implementation manner of the first aspect, the adjusting the signal sampling parameter of the main control chip to be tested to obtain the receiving end signal after the signal sampling parameter is adjusted includes: acquiring an initial value and an adjustment sequence of the signal sampling parameters; and sequentially adjusting the initial values of the signal sampling parameters based on the adjustment sequence to obtain receiving end signals corresponding to the adjusted signal sampling parameters.
With reference to the third embodiment of the first aspect, in a fourth embodiment of the first aspect, the adjusting order is: sequentially increasing the signal sampling parameters on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value, and stopping increasing the signal error rate; and sequentially reducing the signal sampling parameters again on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value and stops reducing.
With reference to the third embodiment of the first aspect, in a fifth embodiment of the first aspect, the adjusting order is: sequentially reducing the signal sampling parameters on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value and stopping reducing the signal error rate; and increasing the signal sampling parameters in sequence again on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value, and stopping increasing.
According to the signal testing method provided by the embodiment of the invention, the initial values of the signal sampling parameters and the adjusting sequence are obtained, the initial values of the signal sampling parameters are sequentially adjusted based on the adjusting sequence to obtain the receiving end signals corresponding to the adjusted signal sampling parameters, and then the receiving end signals are tested, so that the receiving end signals are comprehensively tested, and the testing efficiency and the testing effect of the receiving end signals are improved.
With reference to the first aspect or any one of the first to fifth embodiments of the first aspect, in a sixth embodiment of the first aspect, the sampling parameters include sampling levels and sampling instants.
According to the signal testing method provided by the embodiment of the invention, the sampling level and the sampling time are used as sampling parameters, so that the signal quality of the receiving end of the main control chip to be tested can be evaluated from two dimensions together, and the testing reliability of the signal of the receiving end is further improved.
According to a second aspect, an embodiment of the present invention provides a signal testing apparatus, including: the acquisition module is used for acquiring signal sampling parameters of the main control chip to be tested; the adjusting module is used for adjusting the signal sampling parameters of the main control chip to be detected and acquiring the receiving end signals after the signal sampling parameters are adjusted; the test module is used for testing the signal error rate corresponding to the receiving end signal; and the evaluation module is used for evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value.
According to the signal testing device provided by the embodiment of the invention, the receiving end signal of the main control chip to be tested is determined by adjusting the signal sampling parameter, the signal error rate corresponding to the receiving end signal is measured in real time, and the receiving end signal can directly represent the internal signal of the main control chip to be tested, so that the limitation that the internal signal of the main control chip to be tested is obtained by external equipment is eliminated, and the influence that the internal signal obtaining is limited by the internal wiring of the chip is avoided. The signal quality of the receiving end of the main control chip to be tested is evaluated through the relation between the signal error rate and the error rate threshold value, so that the signal quality of the receiving end of the main control chip to be tested is verified, and the signal integrity test of the main control chip to be tested is met.
According to a third aspect, an embodiment of the present invention provides an electronic device, including: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to perform the signal testing method according to the first aspect or any embodiment of the first aspect.
According to a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, which stores computer instructions for causing a computer to execute the signal testing method according to the first aspect or any of the embodiments of the first aspect.
It should be noted that, for corresponding beneficial effects of the electronic device and the computer-readable storage medium provided in the embodiments of the present invention, please refer to the description of corresponding contents in the signal testing method, which is not described herein again.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a flow chart of a signal testing method according to an embodiment of the present invention;
FIG. 2 is another flow chart of a signal testing method according to an embodiment of the present invention;
FIG. 3 is another flow chart of a signal testing method according to an embodiment of the present invention;
FIG. 4 is a block diagram of a signal testing device according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Generally, the signal consistency test of the DDR4 memory in the server mainly verifies the quality of a write signal of a main control chip, and the test at the receiving end of the main control chip has a large limitation, and if the test is performed by using a probe, the test may be affected by the internal routing of the chip, which causes signal reflection and signal delay, and the signal consistency cannot be ensured. Therefore, the existing signal consistency test has large test limitation at the receiving end of the main control chip, and the signal quality at the receiving end of the chip is difficult to verify, so that the signal integrity test is difficult to meet.
Based on the technical scheme, the signal sampling parameters of the main control chip are adjusted to obtain the signals of the receiving end of the main control chip in real time, and the signal error rate of the signals of the receiving end is measured, so that the signal quality of the receiving end is verified, and the signal integrity test of the main control chip to be tested is met.
In accordance with an embodiment of the present invention, there is provided an embodiment of a signal testing method, it should be noted that the steps illustrated in the flowchart of the accompanying drawings may be performed in a computer system such as a set of computer executable instructions, and that while a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that herein.
In this embodiment, a signal testing method is provided, which can be used for electronic devices, such as mobile phones, tablet computers, and the like, a debugging interface of a main control chip to be tested can be connected to the electronic devices through a signal debugging line, and the signal debugging line can be a JTAG signal connection line. Fig. 1 is a flowchart of a signal testing method according to an embodiment of the present invention, as shown in fig. 1, the flowchart includes the following steps:
and S11, acquiring signal sampling parameters of the main control chip to be tested.
The signal sampling parameters can represent the debugging state of the receiving end signal of the main control chip to be tested. The signal sampling parameter is a debugging parameter which is pre-arranged in the electronic equipment. After the main control chip to be tested is connected to the electronic equipment through the JTAG signal connecting line, the electronic equipment can call the signal sampling parameters corresponding to the main control chip to be tested.
And S12, adjusting the signal sampling parameters of the main control chip to be tested, and acquiring the receiving end signals after the signal sampling parameters are adjusted.
The electronic equipment can generate a chip debugging instruction based on the signal sampling parameters and send the debugging instruction to the main control chip to be tested so as to acquire a receiving end signal of the main control chip to be tested. The electronic equipment can adjust the signal sampling parameters according to a certain sequence so as to acquire the receiving end signals of which the signal sampling parameters are adjusted in real time.
And S13, testing the signal error rate corresponding to the receiving end signal.
The signal error rate is an index for measuring the data transmission accuracy of the data of the main control chip to be measured in a specified time, and the signal error rate is the error code in data transmission/the total number of transmitted codes. The electronic device can calculate the signal error rate of the collected receiving end signals in sequence, so that the signal error rate corresponding to the receiving end signals after the signal collection parameters are adjusted is obtained in sequence.
And S14, evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value.
The bit error rate threshold is the bit error rate of the main control chip to be tested with data transmission errors, and when the signal bit error rate exceeds the bit error rate threshold, the signal of the receiving end of the main control chip to be tested is seriously influenced, and the signal quality is poor. The electronic device can compare the calculated signal error rate with the error rate threshold value to determine whether the signal error rate exceeds the error rate threshold value, and further determine whether the signal quality of the receiving end of the main control chip to be tested is good or not according to the signal error rate.
According to the signal testing method provided by the embodiment, the receiving end signal of the main control chip to be tested is determined by adjusting the signal sampling parameter, the signal error rate corresponding to the receiving end signal is measured in real time, and the receiving end signal can directly represent the internal signal of the main control chip to be tested, so that the limitation that the internal signal of the main control chip to be tested is obtained by means of external equipment is eliminated, and the problem that the internal signal obtaining is limited by wiring inside the chip is avoided. The signal quality of the receiving end of the main control chip to be tested is evaluated through the relation between the signal error rate and the error rate threshold value, so that the signal quality of the receiving end of the main control chip to be tested is verified, and the signal integrity test of the main control chip to be tested is met.
In this embodiment, a signal testing method is provided, which can be used in electronic devices, such as a mobile phone, a tablet computer, a computer, etc., fig. 2 is a flowchart of the signal testing method according to the embodiment of the present invention, and as shown in fig. 2, the flowchart includes the following steps:
and S21, acquiring signal sampling parameters of the main control chip to be tested. For a detailed description, refer to the related description of step S11 corresponding to the above embodiment, and the detailed description is omitted here.
And S22, adjusting the signal sampling parameters of the main control chip to be tested, and acquiring the receiving end signals after the signal sampling parameters are adjusted. For a detailed description, refer to the related description of step S12 corresponding to the above embodiment, and the detailed description is omitted here.
And S23, testing the signal error rate corresponding to the receiving end signal. For a detailed description, refer to the related description of step S13 corresponding to the above embodiment, and the detailed description is omitted here.
And S24, evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value.
Specifically, the step S24 may include:
s241, determining a target variation range of the signal sampling parameter based on the relation between the signal error rate and the error rate threshold value.
The target variation range is the variation range of the signal sampling parameter, and the signal error rates of the signals of the receiving end collected by the electronic equipment according to the signal sampling parameter in the target variation range are all smaller than the error rate threshold value. The electronic equipment can determine the minimum value and the maximum value of the sampling parameter reaching the bit error rate threshold value by adjusting the signal sampling parameter to obtain the target variation range.
Specifically, the step S241 may include:
(1) and judging whether the signal error rate exceeds an error rate threshold value.
The electronic equipment compares the measured signal error rate of the receiving end signal with an error rate threshold value to determine whether the signal error rate exceeds the error rate threshold value. And (3) when the signal error rate exceeds the error rate threshold, executing the step (2), otherwise, continuously adjusting signal sampling, collecting the signal of the receiving end and measuring the signal error rate.
(2) And determining the minimum value and the maximum value of the sampling parameter corresponding to the signal error rate.
When the signal error rate exceeds the error rate threshold value, stopping the adjustment of the signal sampling parameters and determining the value corresponding to the current signal sampling parameters, so that the electronic equipment adjusts the values of the signal sampling parameters according to the sequence of increasing or decreasing in sequence to obtain the minimum value and the maximum value of the sampling parameters meeting the error rate threshold value.
(3) And determining the interval corresponding to the minimum value and the maximum value of the sampling parameter as the target variation range of the signal sampling parameter.
When the electronic equipment collects the signals of the receiving end according to the minimum value of the sampling parameters, the signal error rate of the electronic equipment is positioned at the boundary of the error rate threshold, at the moment, the value of the signal sampling parameters is continuously reduced, and the signal error rate of the electronic equipment exceeds the error rate threshold; when the electronic equipment collects the signals of the receiving end according to the maximum value of the sampling parameters, the signal error rate of the electronic equipment is also positioned at the boundary of the error rate threshold, at the moment, the value of the signal sampling parameters is continuously increased, and the signal error rate of the electronic equipment also exceeds the error rate threshold. Therefore, the electronic equipment can determine the target variation range of the signal sampling parameter by the interval corresponding to the minimum value and the maximum value of the sampling parameter.
And S242, evaluating the signal quality of the receiving end of the main control chip to be tested based on the value of the target change range.
When the electronic device determines the target variation range, it may determine whether the signal quality of the receiving end is good based on the target variation range. Specifically, the larger the coverage area of the target variation range is, the better the signal quality of the receiving end of the main control chip to be tested is, and the smaller the coverage area of the target variation range is, the worse the signal quality of the receiving end of the main control chip to be tested is.
The signal testing method provided by this embodiment determines the target variation range of the signal sampling parameter according to the relationship between the signal error rate and the error rate threshold, and determines whether the signal quality of the receiving end is good or not based on the value corresponding to the target variation range, thereby improving the reliability and efficiency of testing the signal quality of the receiving end.
In this embodiment, a signal testing method is provided, which can be used in electronic devices, such as a mobile phone, a tablet computer, a computer, etc., fig. 3 is a flowchart of the signal testing method according to the embodiment of the present invention, and as shown in fig. 3, the flowchart includes the following steps:
and S31, acquiring signal sampling parameters of the main control chip to be tested. For a detailed description, refer to the related description of step S11 corresponding to the above embodiment, and the detailed description is omitted here.
And S32, adjusting the signal sampling parameters of the main control chip to be tested, and acquiring the receiving end signals after the signal sampling parameters are adjusted.
Specifically, the step S32 may include:
s321, obtaining an initial value and an adjustment sequence of the signal sampling parameter.
The signal sampling parameters may include sampling levels and sampling instants, and the adjustment order is an increasing order or a decreasing order of the signal sampling parameters. The initial value of the signal sampling parameter is an initial value set when the electronic equipment starts the test of the main control chip to be tested.
Wherein, the adjusting sequence can be as follows: sequentially increasing on the basis of the initial value of the signal sampling parameter until the signal error rate exceeds the error rate threshold value, and stopping increasing; and sequentially reducing the initial values of the signal sampling parameters again until the signal error rate exceeds the error rate threshold value, and stopping reducing.
Taking the adjustment of the sampling level as an example, the electronic device obtains an initial value of a sampling level voltage corresponding to a signal at a receiving end of a main control chip to be tested, keeps the sampling time unchanged, slowly increases the sampling time, sequentially measures and stores signal error rates corresponding to the sampling levels in the process of increasing the sampling levels, stops increasing when the signal error rates are higher than an error rate threshold, and records the sampling level at the moment as the maximum value of the sampling level; and adjusting the sampling level to the initial value again, keeping the sampling time unchanged, slowly reducing the sampling level, sequentially measuring and storing the signal error rates corresponding to the sampling levels in the reduction process of the sampling level, stopping increasing when the signal error rates are higher than the error rate threshold value, and recording the sampling level at the moment as the minimum value of the sampling level.
The sampling level is kept unchanged corresponding to the adjustment of the sampling time, and the specific adjustment mode is the same as the adjustment mode of the sampling level, which is not described herein again.
The adjustment sequence may also be: sequentially reducing the initial values of the signal sampling parameters until the error rate of the signal exceeds the error rate threshold value, and stopping reducing the error rate of the signal; and increasing the signal sampling parameters in sequence again on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value, and stopping increasing.
Taking the adjustment of the sampling time as an example, the electronic device obtains an initial value of a signal of a receiving end of the main control chip to be tested corresponding to the sampling time, keeps the sampling level unchanged, slowly reduces the sampling level, sequentially measures and stores the signal error rates corresponding to the sampling times in the process of increasing the sampling time, stops increasing when the signal error rates are higher than an error rate threshold value, and records the sampling time at the moment as the maximum value of the sampling time; and adjusting the sampling time to the initial value again, keeping the sampling level unchanged, slowly reducing the sampling level, sequentially measuring and storing the signal error rates corresponding to the sampling times in the reduction process of the sampling time, stopping increasing when the signal error rates are higher than the error rate threshold value, and recording the sampling time at the moment as the minimum value of the sampling time.
And keeping the sampling time unchanged corresponding to the adjustment of the sampling level, wherein the specific adjustment mode is the same as the adjustment mode of the sampling time, and the detailed description is omitted here.
And S322, sequentially adjusting the initial values of the signal sampling parameters based on the adjustment sequence to obtain receiving end signals corresponding to the adjusted signal sampling parameters.
The electronic equipment sequentially adjusts the sampling level and the sampling time according to the adjustment sequence, and directly acquires the receiving end signals after the sampling level and the sampling time are adjusted respectively, so that the receiving end signals do not need to be acquired through an oscilloscope and a probe, and the limitation of the oscilloscope and the probe is eliminated.
And S33, testing the signal error rate corresponding to the receiving end signal. For a detailed description, refer to the related description of step S13 corresponding to the above embodiment, and the detailed description is omitted here.
And S34, evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value. For a detailed description, refer to the related description of step S14 corresponding to the above embodiment, and the detailed description is omitted here.
In the signal testing method provided by this embodiment, the initial values of the signal sampling parameters and the adjustment sequence are obtained, and the initial values of the signal sampling parameters are sequentially adjusted based on the adjustment sequence to obtain the receiving end signal corresponding to the adjusted signal sampling parameters, so that the receiving end signal is tested, thereby achieving a comprehensive test of the receiving end signal, and improving the testing efficiency and the testing effect of the receiving end signal. By taking the sampling level and the sampling time as sampling parameters, the signal quality of the receiving end of the main control chip to be tested can be evaluated from two dimensions, and the testing reliability of the signal of the receiving end is further improved.
In this embodiment, a signal testing apparatus is further provided, and the apparatus is used to implement the foregoing embodiments and preferred embodiments, and the description of the apparatus is omitted for brevity. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
The present embodiment provides a signal testing apparatus, as shown in fig. 4, including:
the obtaining module 41 is configured to obtain a signal sampling parameter of the main control chip to be tested. For a detailed description, reference is made to the corresponding related description of the above method embodiments, which is not repeated herein.
And the adjusting module 42 is configured to adjust a signal sampling parameter of the main control chip to be detected, and obtain a receiving end signal after the signal sampling parameter is adjusted. For a detailed description, reference is made to the corresponding related description of the above method embodiments, which is not repeated herein.
The testing module 43 is configured to test a signal error rate corresponding to the receiving end signal. For a detailed description, reference is made to the corresponding related description of the above method embodiments, which is not repeated herein.
And the evaluation module 44 is configured to evaluate the signal quality of the receiving end of the main control chip to be tested based on the relationship between the signal error rate and the error rate threshold. For a detailed description, reference is made to the corresponding related description of the above method embodiments, which is not repeated herein.
The signal testing device provided by the embodiment determines the receiving end signal of the main control chip to be tested by adjusting the signal sampling parameter, measures the signal error rate corresponding to the receiving end signal in real time, and the receiving end signal can directly represent the internal signal of the main control chip to be tested, so that the limitation of obtaining the internal signal of the main control chip to be tested by means of external equipment is eliminated, and the internal signal obtaining is prevented from being limited by the influence of wiring inside the chip. The signal quality of the receiving end of the main control chip to be tested is evaluated through the relation between the signal error rate and the error rate threshold value, so that the signal quality of the receiving end of the main control chip to be tested is verified, and the signal integrity test of the main control chip to be tested is met.
The signal testing device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC circuit, a processor and memory executing one or more software or fixed programs, and/or other devices that may provide the above-described functionality.
Further functional descriptions of the modules are the same as those of the corresponding embodiments, and are not repeated herein.
An embodiment of the present invention further provides an electronic device, which has the signal testing apparatus shown in fig. 4.
Referring to fig. 5, fig. 5 is a schematic structural diagram of an electronic device according to an alternative embodiment of the present invention, and as shown in fig. 5, the electronic device may include: at least one processor 501, such as a CPU (Central Processing Unit), at least one communication interface 503, memory 504, and at least one communication bus 502. Wherein a communication bus 502 is used to enable connective communication between these components. The communication interface 503 may include a Display (Display) and a Keyboard (Keyboard), and the optional communication interface 503 may also include a standard wired interface and a standard wireless interface. The Memory 504 may be a Random Access Memory (RAM) or a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. The memory 504 may optionally be at least one storage device located remotely from the processor 501. Wherein the processor 501 may be in connection with the apparatus described in fig. 4, an application program is stored in the memory 504, and the processor 501 calls the program code stored in the memory 504 for performing any of the above-mentioned method steps.
The communication bus 502 may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. The communication bus 502 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 5, but this is not intended to represent only one bus or type of bus.
The memory 504 may include a volatile memory (RAM), such as a random-access memory (RAM); the memory may also include a non-volatile memory (english: non-volatile memory), such as a flash memory (english: flash memory), a hard disk (english: hard disk drive, abbreviated: HDD) or a solid-state drive (english: SSD); the memory 504 may also comprise a combination of the above types of memory.
The processor 501 may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of CPU and NP.
The processor 501 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.
Optionally, the memory 504 is also used to store program instructions. The processor 501 may call program instructions to implement the signal testing method as shown in the embodiments of fig. 1 to 3 of the present application.
The embodiment of the invention also provides a non-transitory computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions can execute the processing method of the signal testing method in any method embodiment. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD), a Solid State Drive (SSD), or the like; the storage medium may also comprise a combination of memories of the kind described above.
Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.
Claims (10)
1. A signal testing method, comprising:
acquiring signal sampling parameters of a main control chip to be tested;
adjusting the signal sampling parameters of the main control chip to be tested, and acquiring receiving end signals after the signal sampling parameters are adjusted;
testing a signal error rate corresponding to the receiving end signal;
and evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value.
2. The method of claim 1, wherein evaluating the quality of the signal at the receiving end of the main control chip to be tested based on the relationship between the signal error rate and the error rate threshold comprises:
determining a target variation range of the signal sampling parameter based on the relation between the signal error rate and an error rate threshold value;
and evaluating the signal quality of the receiving end of the main control chip to be tested based on the value of the target variation range.
3. The method of claim 2, wherein determining the target variation range of the signal sampling parameter based on the relationship between the signal error rate and the error rate threshold comprises:
judging whether the signal error rate exceeds the error rate threshold value;
when the signal error rate exceeds the error rate threshold value, determining a sampling parameter minimum value and a sampling parameter maximum value corresponding to the signal error rate;
and determining the interval corresponding to the minimum value and the maximum value of the sampling parameter as the target variation range of the signal sampling parameter.
4. The method according to claim 1, wherein the adjusting the signal sampling parameter of the main control chip to be tested to obtain the receiving end signal after the signal sampling parameter adjustment comprises:
acquiring an initial value and an adjustment sequence of the signal sampling parameters;
and sequentially adjusting the initial values of the signal sampling parameters based on the adjustment sequence to obtain receiving end signals corresponding to the adjusted signal sampling parameters.
5. The method of claim 4, wherein the adjusting order is:
sequentially increasing the signal sampling parameters on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value, and stopping increasing the signal error rate;
and sequentially reducing the signal sampling parameters again on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value and stops reducing.
6. The method of claim 4, wherein the adjusting order is:
sequentially reducing the signal sampling parameters on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value and stopping reducing the signal error rate;
and increasing the signal sampling parameters in sequence again on the basis of the initial values of the signal sampling parameters until the signal error rate exceeds the error rate threshold value, and stopping increasing.
7. The method according to any of claims 1-6, wherein the sampling parameters comprise sampling levels and sampling instants.
8. A signal testing device, comprising:
the acquisition module is used for acquiring signal sampling parameters of the main control chip to be tested;
the adjusting module is used for adjusting the signal sampling parameters of the main control chip to be detected and acquiring the receiving end signals after the signal sampling parameters are adjusted;
the test module is used for testing the signal error rate corresponding to the receiving end signal;
and the evaluation module is used for evaluating the signal quality of the receiving end of the main control chip to be tested based on the relation between the signal error rate and the error rate threshold value.
9. An electronic device, comprising:
a memory and a processor, the memory and the processor being communicatively coupled to each other, the memory having stored therein computer instructions, the processor executing the computer instructions to perform the signal testing method of any of claims 1-7.
10. A computer-readable storage medium storing computer instructions for causing a computer to perform the signal testing method of any one of claims 1 to 7.
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| CN202111473516.4A CN114325534A (en) | 2021-11-29 | 2021-11-29 | Signal testing method, device, equipment and readable storage medium |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116206667A (en) * | 2023-04-28 | 2023-06-02 | 合肥康芯威存储技术有限公司 | Chip testing method and device |
| CN117250484A (en) * | 2023-11-20 | 2023-12-19 | 北京小米移动软件有限公司 | Chip testing method and device, test chip and storage medium |
-
2021
- 2021-11-29 CN CN202111473516.4A patent/CN114325534A/en not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116206667A (en) * | 2023-04-28 | 2023-06-02 | 合肥康芯威存储技术有限公司 | Chip testing method and device |
| CN116206667B (en) * | 2023-04-28 | 2023-08-08 | 合肥康芯威存储技术有限公司 | Chip testing method and device |
| CN117250484A (en) * | 2023-11-20 | 2023-12-19 | 北京小米移动软件有限公司 | Chip testing method and device, test chip and storage medium |
| CN117250484B (en) * | 2023-11-20 | 2024-03-12 | 北京小米移动软件有限公司 | Chip testing method and device, test chip and storage medium |
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