CN114492269B - Flash memory controller verification system - Google Patents

Flash memory controller verification system Download PDF

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CN114492269B
CN114492269B CN202210340634.6A CN202210340634A CN114492269B CN 114492269 B CN114492269 B CN 114492269B CN 202210340634 A CN202210340634 A CN 202210340634A CN 114492269 B CN114492269 B CN 114492269B
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flash memory
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memory medium
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model
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CN114492269A (en
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薛红军
孙丽华
陈力
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Beijing Dera Technology Co Ltd
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Beijing Dera Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • G06F30/3308Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/331Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/333Design for testability [DFT], e.g. scan chain or built-in self-test [BIST]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56008Error analysis, representation of errors

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Abstract

The invention relates to a flash memory controller verification system, which comprises a host operating platform, a flash memory controller verification platform and a flash memory medium simulation platform; the host operating platform is used for providing an operating page; generating test case configuration parameters, sending the test case configuration parameters to a flash memory controller verification platform, selecting corresponding model parameters, sending the model parameters and test conditions to a flash memory medium simulation platform, and determining a flash memory controller verification result after receiving an execution result; the flash memory controller verification platform is used for configuring the test cases, generating test instructions to be sent to the flash memory medium simulation platform, and feeding back the test instructions to the host operation platform when receiving execution results; the flash memory medium simulation platform is used for carrying out parameter configuration on the neural network model to obtain a flash memory medium simulation model, configuring test conditions, executing a test instruction through the flash memory medium simulation model, and feeding back an execution result to the flash memory controller verification platform. The invention does not need a flash memory medium, and has low verification cost and convenient verification.

Description

Flash memory controller verification system
Technical Field
The invention relates to the technical field of flash memories, in particular to a verification system of a flash memory controller.
Background
The flash memory controller is an important component of the memory controller chip, and its main function is to operate the flash memory medium, which needs to be fully verified in the design stage. Therefore, it is necessary to verify various aspects such as functions and performance by using the storage medium in cooperation with the flash memory controller. The NAND Flash memory media of the Flash memory are different from manufacturers in characteristics, and the same NAND Flash can show different characteristics under different conditions of temperature, PE times and the like.
In the conventional mode, different flashes need to be used for testing under various conditions, which brings higher time and labor cost for the verification work of the Flash memory controller.
Disclosure of Invention
To solve the above technical problem or at least partially solve the above technical problem, the present invention provides an authentication system for a flash memory controller.
The embodiment of the invention provides a verification system of a flash memory controller, which comprises: the system comprises a host operating platform, a flash memory controller verification platform and a flash memory medium simulation platform; wherein:
the host operating platform is configured to: providing an operation page for personnel to select the flash memory medium model and the test condition on the operation page; generating test case configuration parameters when the flash memory medium model and the test condition selected by a person on the operation interface are obtained, sending the test case configuration parameters to the flash memory controller verification platform, selecting corresponding model parameters according to the flash memory medium model, and sending the model parameters and the test condition to the flash memory medium simulation platform; after receiving the execution result sent by the flash memory controller verification platform, determining the corresponding flash memory controller verification result under the conditions of the test case, the flash memory medium model and the test condition;
the flash controller verification platform is configured to: configuring the test cases according to the test case configuration parameters sent by the host operation platform; generating a test instruction according to the configured test case, and sending the test instruction to the flash memory medium simulation platform; when receiving an execution result fed back by the flash memory medium simulation platform, feeding back the execution result to the host operating platform;
the flash media emulation platform is to: according to the model parameters sent by the host operating platform, parameter configuration is carried out on the neural network model on the flash memory medium simulation platform, and a flash memory medium simulation model corresponding to the flash memory medium model is obtained; according to the test conditions sent by the host operating platform, carrying out test condition configuration on the flash memory medium simulation model; and when the test instruction sent by the flash memory controller verification platform is received, the test instruction is executed through the flash memory medium simulation model, and the execution result of the flash memory medium simulation model is fed back to the flash memory controller verification platform.
The verification system of the flash memory controller provided by the embodiment of the invention simulates the characteristics of various flash memory media under different test conditions based on the mathematical model to carry out complete verification, and the process does not need physical flash memory media, so that the verification cost is low, and the verification is more convenient; in addition, different test conditions are configured in a setting mode, such as different PE times, different temperatures and the like, and the characteristics of the flash memory under the test conditions can be simulated, so that the test coverage is wider, and the verification is more sufficient. Compared with the mode of verifying by adopting a real flash memory medium in the prior art, the method does not need a high-cost building platform, has low verification cost, short verification period and sufficient verification coverage.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a block diagram of an overall structure of a verification system of a flash memory controller according to an embodiment of the present invention;
FIG. 2 is a block diagram of a verification system of a flash memory controller according to an embodiment of the present invention;
FIG. 3 is a flow chart of the processing for a write operation in an embodiment of the present invention;
FIG. 4 is a flowchart of a process for a read operation according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
In a first aspect, an embodiment of the present invention provides a flash memory controller verification system.
Referring to fig. 1 and 2, the system includes a host operating platform, a flash memory controller verification platform, and a flash memory medium emulation platform; wherein:
the host operating platform is configured to: providing an operation page for a person to select the type of the flash memory medium and test conditions on the operation page; generating test case configuration parameters when the flash memory medium model and the test condition selected by a person on the operation interface are obtained, sending the test case configuration parameters to the flash memory controller verification platform, selecting corresponding model parameters according to the flash memory medium model, and sending the model parameters and the test condition to the flash memory medium simulation platform; after receiving the execution result sent by the flash memory controller verification platform, determining the corresponding flash memory controller verification result under the conditions of the test case, the flash memory medium model and the test condition;
the flash controller verification platform is configured to: configuring the test case according to the test case configuration parameters sent by the host operating platform; generating a test instruction according to the configured test case, and sending the test instruction to the flash memory medium simulation platform; when receiving an execution result fed back by the flash memory medium simulation platform, feeding back the execution result to the host operating platform;
the flash media emulation platform is configured to: according to the model parameters sent by the host operating platform, parameter configuration is carried out on the neural network model on the flash memory medium simulation platform, and a flash memory medium simulation model corresponding to the flash memory medium model is obtained; according to the test conditions sent by the host operating platform, carrying out test condition configuration on the flash memory medium simulation model; and when the test instruction sent by the flash memory controller verification platform is received, the test instruction is executed through the flash memory medium simulation model, and the execution result of the flash memory medium simulation model is fed back to the flash memory controller verification platform.
It is understood that there is an operation page on the host operating platform on which a person can select flash media signals, test conditions, etc. Of course, on the host operating platform, personnel can also check information such as the verification result of the flash memory controller, and further perform data analysis.
It can be understood that, in the process of verifying the flash memory controller, a plurality of test cases need to be verified, and at this time, the verification process can be performed on each test case one by one. Of course, a person may also select a test case on the operation page by himself, and at this time, verification is performed only for the test case selected by the user. Different test cases are different aiming at the test content of the flash memory medium simulation platform, some test cases only carry out write operation, and some test cases need to carry out read-write operation and the like.
A configuration database can be configured in the host operating platform, and various test conditions and model parameters corresponding to various flash memory medium models are stored in the configuration database; the different flash memory medium models correspond to different flash memory medium simulation models, and each flash memory medium simulation model has corresponding model parameters. Correspondingly, the selecting the corresponding model parameter according to the flash memory medium model includes: and selecting corresponding model parameters from the configuration database according to the flash memory medium model.
That is, there are two types of configuration data in the configuration database, one type being various test conditions, such as temperature, PE number, retentions status, and the like. The other type is model parameters corresponding to various flash medium simulation models. In the scheme, different flash memory media are represented by adopting different flash memory media models, and different flash memory media correspond to different flash memory media simulation models, so that the flash memory media models and model parameters are mapped and stored in a configuration database. After a person selects the flash memory medium model on the operation page, the host operation platform can determine which of the corresponding model parameters are. The flash memory medium simulation model is used for simulating the flash memory medium.
It can be understood that the host operating platform further has a test processing result module, which is used for receiving the execution result and the like fed back by the flash memory controller verification platform, so that the data can be stored, analyzed and verified, and the verified result can be displayed.
It can be understood that, after a person selects parameters such as the flash memory medium model, the test condition and the like on the host operating platform, the host operating platform enters a verification process, in the verification process, firstly, test case configuration parameters are generated according to a test case to be executed, and the test case configuration parameters are sent to the flash memory controller verification platform. Meanwhile, the host operating platform selects corresponding model parameters from the configuration database according to the type of the flash memory medium, and then sends the model parameters and the test conditions to the flash memory medium simulation platform.
After the flash memory controller verification platform receives the test case configuration parameters, the test case is configured, and then a test instruction is generated according to the configured test case and sent to the flash memory medium simulation platform. For example, if the test case includes a write operation, the test instruction includes the write operation, and meanwhile, in order to implement the write operation, some data to be written are organized and added to the test instruction, so that the flash memory medium simulation platform can conveniently perform the write operation.
After receiving the test conditions and the model parameters, the flash memory medium simulation platform configures the parameters of the neural network model according to the ink model parameters, so as to obtain a mathematical model corresponding to the flash memory medium model, namely a flash memory medium simulation model, and also configures the test conditions of the data model, wherein the data model can be operated under the test conditions subsequently.
When the flash memory medium simulation platform receives the test instruction sent by the flash memory controller verification platform, the flash memory medium simulation model executes the test instruction to obtain an execution result, and then feeds the execution result back to the flash memory controller verification platform. When the flash memory controller verifies that the platform receives the execution result, the execution result is fed back to the host operating platform.
After receiving the execution result, the host operating platform compares the expected result with the received execution result to know whether the verification result of the flash memory controller succeeds or fails, and then stores and displays the verification result of the flash memory controller so that a person can check and analyze data.
It can be understood that the verification result of the flash memory controller at this time is obtained based on a certain test case, a certain flash memory medium model and certain test conditions. In order to obtain a more accurate verification result, a verification process may be performed for other test cases, other flash media models, and other test conditions. The verification process for other test cases, other flash media models, and other test conditions is the same as described above. After the verification process of a plurality of test cases, a plurality of flash memory medium models and a plurality of test conditions is completed, the overall verification result can be comprehensively analyzed.
In specific implementation, the host operating platform generates other parameters, such as register configuration parameters and timing configuration parameters, while generating the test case configuration parameters. Therefore, when the test case configuration parameters are sent to the flash memory controller verification platform, the register configuration parameters and the time sequence configuration parameters are also sent to the flash memory controller verification platform. When the flash memory controller verifies that the platform receives the parameters, corresponding configuration is also performed.
That is, the host operating platform is further configured to: generating a register configuration parameter and a time sequence configuration parameter of the flash memory controller, and sending the register configuration parameter and the time sequence configuration parameter to a flash memory controller verification platform; correspondingly, the flash controller verification platform is further configured to: and configuring a register used in the verification process according to the register configuration parameter, and configuring the time sequence of the verification process according to the time sequence configuration parameter.
It can be understood that the register configuration parameter is used to configure the register used in the verification process, and the timing configuration parameter is used to configure the timing in the verification process, so as to implement the relevant configuration of the verification process of the flash memory controller verification platform.
In specific implementation, the flash media emulation platform can be further configured to: and when the model parameters and the test conditions are received, setting the operation behavior of the flash memory medium simulation platform so that the flash memory medium simulation platform can execute the test instruction sent by the flash memory controller verification platform.
That is to say, after the operation behavior of the flash memory medium simulation platform is set, the flash memory medium simulation platform can identify the test instruction, and then correctly execute the test instruction, otherwise, the flash memory medium simulation platform cannot identify and execute the test instruction.
Because data such as test instructions, execution results and the like need to be transmitted between the flash memory medium simulation platform and the flash memory controller verification platform, corresponding interfaces need to be arranged on the flash memory medium simulation platform and the flash memory controller verification platform. In specific implementation, the flash media emulation platform can be further configured to: configuring a first interface of the flash memory medium simulation platform when the model parameters and the test conditions are received; correspondingly, the flash controller verification platform may be further configured to: after receiving the test case configuration parameters, configuring a second interface of the flash memory controller verification platform; the first interface and the second interface are communication interfaces between the flash memory medium simulation platform and the flash memory controller verification platform.
That is to say, the first interface is configured on the flash memory medium simulation platform, and the second interface is configured on the flash memory controller verification platform, so that the first interface and the second interface form a communication channel, which is convenient for data transmission.
Wherein the test condition may include at least one of: PE times, temperature, cell mode, and electrical characteristics including latency for read, write, or erase operations. It is understood that the PE times refer to erase/write times, and the cell mode is a cell mode, and the electrical characteristic is a hardware characteristic of the flash memory medium.
For example, referring to fig. 2, a plurality of modules are disposed on the flash memory controller verification platform, for example, a test configuration receiving module, a test case parsing module, a flash memory command configuring module, a flash memory command sending module, a flash memory status monitoring module, a flash memory status processing module, a flash memory status feedback module, and the like. The receiving test configuration module is used for receiving test case configuration parameters, register configuration parameters, time sequence configuration parameters and the like sent by the host operating platform. The analysis test case module is used for analyzing the parameters and carrying out corresponding parameter configuration operation. The flash memory command module is configured to configure corresponding test instructions. The flash memory command sending module is used for sending the test command to the flash memory medium simulation platform. The flash memory state monitoring module is used for monitoring whether the flash memory controller verifies whether an execution result is received by an interface of the platform. The function of the processing flash status module is to store or otherwise process the execution results. The function of the flash memory state feedback module is to feed back the execution result to the host operating platform.
The flash memory controller verifies a second interface on the platform, namely a flash memory controller interface, and supports an ONFI protocol and a Toggle protocol.
Referring to fig. 2, a plurality of modules, for example, a flash memory copy configuration information receiving module, a flash memory analysis configuration information analyzing module, a flash memory behavior configuration module, a flash memory electrical characteristic configuration module, a flash memory address processing module, a flash memory status processing module, an AI data processing module, etc., are also disposed on the flash memory medium emulation platform. The flash memory configuration information receiving module is used for receiving the test conditions and the model parameters sent by the host operating platform. The analysis configuration information module is used for analyzing and processing the test conditions and the model parameters. The flash memory behavior configuration module is used for configuring the operation behavior of the flash memory medium simulation platform. The flash memory electrical characteristic configuration module is used for configuring the electrical characteristics of the flash memory medium simulation model, such as the time delay of reading and writing. The flash memory address processing module is used for storing addresses required to be used in read-write operation, such as read addresses or write addresses, and even storing written data or providing data required to be read. The flash memory state processing module is used for acquiring, updating and the like the state information in the execution result of the test instruction. The AI data processing module is used for carrying out data inversion and other processing in the process of executing the test instruction. The AI data processing module is an important part of the flash memory medium simulation platform, and can generate various Error probabilities, and further generate Error data according to the probabilities, such as Read UNC, write Error, erase Error, Read Error Bits and the like. The error data can be used for parameter adjustment of the mathematical model so as to adjust the probability of errors occurring in the AI data processing module subsequently, thereby achieving the purpose of simulating flash memory abnormity.
The first interface of the flash memory medium emulation platform, namely the flash memory simulation interface, can support the ONFI protocol and the Toggle protocol, so that information sent by the flash memory controller verification platform can be received.
Based on the verification system shown in fig. 2, a specific verification process may include the following flows:
(1) after a person selects the flash memory medium model, the test condition and the test case on the host operation platform, the host operation platform selects matched model parameters according to the flash memory medium model and sends the model parameters and the test condition to the flash memory medium simulation platform. Meanwhile, the host operating platform sends the selected test parameters such as configuration parameters of the test case, register configuration parameters, time sequence configuration parameters and the like to the flash memory controller verification platform;
(2) after receiving the test conditions and the model parameters, the flash memory medium simulation platform analyzes the test conditions and the model parameters, and then configures the first interface, configures the operation behavior, configures the initialization parameters of the mathematical model, and configures the test conditions, for example, configures the electrical characteristics.
(3) After the flash memory controller verification platform receives the test parameters, the test parameters are analyzed, and then a register, a time sequence, a test case and the like are configured to configure the second interface. After configuration is completed, a test instruction is generated, if the test instruction contains write operation, some data to be written need to be organized, and the data to be written is added to the test instruction. And sending a test instruction through the second interface.
(4) And after the flash memory medium simulation platform receives the test instruction, executing the test instruction through the configured mathematical model. If the test instruction does not contain the operations of reading, writing, erasing and the like, after the test instruction is executed by the mathematical model, the executed state information is returned to the flash memory controller verification platform as an execution result, and the state information comprises the execution success or the execution failure. If the test instruction includes operations such as reading, writing, erasing and the like, the state information needs to be sent to the AI data processing module, so that the AI data processing module can generate the probability of error occurrence, and further generate error data by using the probability. And performing parameter adjustment on the mathematical model by using the error data so as to adjust the probability of next error occurrence.
(5) And after receiving the execution result, the flash memory controller verification platform stores the execution result and the like. And if the verification of the test case is finished, returning an execution result to the host operating platform. And if the verification of the test case is not finished, continuing to execute the test instruction.
(6) And after receiving the execution result, the host operating platform stores the data, analyzes the verification result according to the execution result, and further stores and displays the verification result. And completing the test of one test case. If other conditions, other test cases and other flash media need to be tested, the steps can be completed according to the steps.
In specific implementation, the flash media emulation platform can be further configured to: if the test instruction comprises at least one item of reading and writing operation, determining the probability of error occurrence, and generating error data according to the probability; the error data is used for adjusting parameters of the flash memory medium simulation model, so that the probability of next error occurrence is improved.
(1) Aiming at write operation, the test instruction comprises write operation and corresponding write operation configuration information, and the write operation configuration information comprises a data write address and data to be written;
correspondingly, the step of "determining the probability of error occurrence and generating error data according to the probability" executed by the flash memory medium simulation platform includes: generating a first turning position table according to the probability of error occurrence of write operation, and turning the data to be written according to the first turning position table to obtain the error data;
the step of executing by the flash memory medium simulation platform "executing the test instruction by the flash memory medium simulation model, and feeding back the execution result of the flash memory medium simulation model to the flash memory controller verification platform" includes: performing write operation on the data to be written after the turning processing according to the data write address, and feeding back state information of the write operation to the flash memory controller verification platform as the execution result; and the state information of the write operation is write operation failure or write operation success.
That is, if the test instruction includes a write operation, the test instruction also needs to include necessary configuration information, such as a data write address, data to be written, and the like. At this time, the verification process is more complicated than a test instruction that does not include read and write operations. The specific process comprises the following steps: and generating a first overturning position table, wherein the first overturning position table comprises positions needing overturning processing, and the first overturning position table is utilized to overturn the data to be written, so that the data on the positions in the data to be written are overturned. And after the overturning is finished, performing writing operation on the data to be written after the overturning, and returning the state information of successful or failed writing to the flash memory controller verification platform as an execution result.
The AI data processing module may generate the first flipping position table by using the probability of the error occurrence in writing and the random generator, and perform flipping processing by using the first flipping position table to obtain some error information in the data, so as to obtain data including the error information, and then may adjust the probability of the error occurrence in the AI data processing module by using the data including the error information.
Referring to fig. 3, the data and status generation submodule in the AI data processing module generates a first flipping position table, the data processing submodule performs flipping processing according to the first flipping position table, the data storage submodule writes the flipped data, the written address is recorded in the address information status recording table, and the model status generation submodule returns status information to the flash memory controller verification platform. The data and state production submodule, the data processing submodule, the data storage submodule and the address information state recording table are components of the AI data processing module.
(2) For a read operation, the test instruction comprises a read operation and read operation configuration information, and the read operation configuration information comprises a read data address;
correspondingly, the step "executing the test instruction through the flash memory medium simulation model and feeding back the execution result of the flash memory medium simulation model to the flash memory controller verification platform" executed by the flash memory medium simulation platform includes: reading data according to the read data address through the flash memory medium simulation model, and sending state information of reading operation and read data as an execution result to the flash memory controller verification platform; the state information of the read operation comprises read operation failure or read operation success;
the step of "determining the probability of error occurrence and generating error data according to the probability" executed by the flash memory medium simulation platform includes: and generating a second overturning position table according to the probability of the error occurrence of the reading operation, and overturning the read data according to the generated second overturning position table to obtain the error data.
That is, if the test instruction includes a read operation, necessary configuration information is needed to implement the read operation, for example, read and write data addresses, and of course, the method may further include: RETRY information (i.e., RETRY) and threshold Voltage (VT). When the mathematical model receives the test command, the process is more complicated than a test command that does not include a read/write operation. The specific process comprises the following steps: and the mathematical model performs data reading operation according to the read data address, and performs turning processing on the read data according to the second turning position table to finish data turning. At the same time, the status information of successful or failed reading and the read data are sent to the flash controller verification platform.
It can be understood that whether the flash memory controller verifies successfully or fails can be analyzed according to the status information of the successful or failed reading and the read data. According to the data after the turning process, parameter adjustment can be carried out on the mathematical model, so that the mathematical model is more consistent with the simulated flash memory medium.
In a specific implementation, the AI data processing module may generate the second flipping position table by using the probability of the read error and the random generator, specifically, the second flipping position table may be generated according to the probability of the read error, the random generator, the retry information, the threshold voltage, and other information, and after flipping the second flipping position table, some error information is obtained in the data, so that data including the error information is obtained, and then the probability of the AI data processing module having the error information may be adjusted by using the data including the error information.
Referring to fig. 4, after an interface, a read address, retry information, and a threshold voltage are configured on a flash memory controller verification platform, the information is sent to a mathematical model, so that the read address is recorded in an address information state recording table in an AI data processing module, a data storage submodule performs data reading according to the read address and stores data such as the retry information and the threshold voltage, a second flipping position table is generated by a data and state generation submodule, flipping processing is performed by the data processing submodule, and the model state generation submodule returns state information of data reading success or failure to the flash memory controller verification platform. The address information state recording table, the data storage submodule, the data and state generating submodule, the data processing submodule and the model state generating submodule are all components of the AI data processing module.
It can be understood that, in the embodiments of the present invention, the flash memory controller verification platform is verified in a manner of simulating the flash memory medium through a mathematical model, that is, the flash memory controller and the software system running on the flash memory controller are verified. In addition, the embodiment of the invention uses a programmable mode to correspond different flash memory medium models to different flash memory medium simulation models and characteristics under different test conditions. In addition, the embodiment of the invention utilizes a mathematical model to simulate the abnormal states of the flash memory medium such as reading and writing erasures and Error Bits reading under different test conditions, and corresponding data overturning under different retry and VT conditions.
It can be understood that, in the embodiment of the invention, the flash memory media of different manufacturers are simulated by configuration, and the physical flash memory media are not needed actually, so that the test cost is low, and the verification is more convenient; in addition, different test conditions are configured in a setting mode, such as different PE times, different temperatures and the like, and the flash memory characteristics under the test conditions can be simulated, so that the test coverage is wider, and the verification is more sufficient. And moreover, the probability of the flash memory to be abnormal under different conditions is generated through a mathematical model, the abnormal flash memory is simulated, and the reliability of the flash memory controller is really and effectively verified. Finally, the whole test verification system can reduce the test cost, shorten the test period, enlarge the test coverage, simplify the test flow and the like.
It can be seen that the embodiment of the invention simulates the characteristics of various flash memory media under different test conditions based on the mathematical model, and further fully verifies the flash memory controller. In addition, the invention can realize the verification of various functions in a test case mode, including but not limited to the compatibility of the interface, the expansion capability of the interface, the exception handling capability, the error correction capability of data, the concurrent capability of operating a flash memory medium, the capability of software and hardware cooperation and the like, and the verification coverage is relatively sufficient. The embodiment of the invention does not need a specific real flash memory medium, and compared with the mode of verifying by adopting the real flash memory medium in the prior art, the embodiment of the invention does not need a high-cost building platform, and has lower verification cost and shorter verification period.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, as for the apparatus embodiment, since it is substantially similar to the method embodiment, the description is relatively simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
Those skilled in the art will recognize that, in one or more of the examples described above, the functions described in this disclosure may be implemented in hardware, software, hardware, or any combination thereof. When implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
The above-mentioned embodiments, objects, technical solutions and advantages of the present invention are further described in detail, it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made on the basis of the technical solutions of the present invention should be included in the scope of the present invention.

Claims (10)

1. A flash memory controller authentication system, comprising: the system comprises a host operating platform, a flash memory controller verification platform and a flash memory medium simulation platform; wherein:
the host operating platform is used for: providing an operation page for a person to select the type of the flash memory medium and test conditions on the operation page; generating test case configuration parameters when the flash memory medium model and the test condition selected by a person on the operation page are obtained, sending the test case configuration parameters to the flash memory controller verification platform, selecting corresponding model parameters according to the flash memory medium model, and sending the model parameters and the test condition to the flash memory medium simulation platform; after receiving the execution result sent by the flash memory controller verification platform, determining the corresponding flash memory controller verification result under the conditions of the test case, the flash memory medium model and the test condition;
the flash memory controller verification platform is configured to: configuring the test case according to the test case configuration parameters sent by the host operating platform; generating a test instruction according to the configured test case, and sending the test instruction to the flash memory medium simulation platform; when receiving an execution result fed back by the flash memory medium simulation platform, feeding back the execution result to the host operating platform;
the flash media emulation platform is configured to: according to the model parameters sent by the host operating platform, parameter configuration is carried out on a neural network model on the flash memory medium simulation platform, and a flash memory medium simulation model corresponding to the flash memory medium model is obtained; according to the test conditions sent by the host operating platform, carrying out test condition configuration on the flash memory medium simulation model; and when the test instruction sent by the flash memory controller verification platform is received, the test instruction is executed through the flash memory medium simulation model, and the execution result of the flash memory medium simulation model is fed back to the flash memory controller verification platform.
2. The system of claim 1,
the flash media emulation platform is further configured to: if the test instruction comprises at least one item of reading and writing operation, determining the probability of error occurrence, and generating error data according to the probability; the error data is used for adjusting parameters of the flash memory medium simulation model.
3. The system of claim 2,
the test instruction comprises write operation and corresponding write operation configuration information, and the write operation configuration information comprises a data write address and data to be written;
correspondingly, the step of "determining the probability of error occurrence and generating error data according to the probability" executed by the flash memory medium simulation platform includes: generating a first turning position table according to the probability of error occurrence of write operation, and turning the data to be written according to the first turning position table to obtain the error data;
the step of executing by the flash memory medium simulation platform "executing the test instruction by the flash memory medium simulation model, and feeding back the execution result of the flash memory medium simulation model to the flash memory controller verification platform" includes: performing write operation on the data to be written after the turning processing according to the data write address, and feeding back state information of the write operation to the flash memory controller verification platform as the execution result; and the state information of the write operation is write operation failure or write operation success.
4. The system of claim 2,
the test instruction comprises read operation and read operation configuration information, and the read operation configuration information comprises a read data address;
correspondingly, the step "executing the test instruction through the flash memory medium simulation model and feeding back the execution result of the flash memory medium simulation model to the flash memory controller verification platform" executed by the flash memory medium simulation platform includes: reading data according to the read data address through the flash memory medium simulation model, and sending state information of reading operation and read data as an execution result to the flash memory controller verification platform; wherein the status information of the read operation comprises a read operation failure or a read operation success;
the step of executing the flash memory medium simulation platform, namely determining the probability of error occurrence and generating error data according to the probability, comprises the following steps of: and generating a second overturning position table according to the probability of the error occurrence of the reading operation, and overturning the read data according to the generated second overturning position table to obtain the error data.
5. The system of claim 1,
the host operating platform is provided with a configuration database, and various test conditions and model parameters corresponding to various flash memory medium models are stored in the configuration database; the different flash memory medium models correspond to different flash memory medium simulation models, and each flash memory medium simulation model has corresponding model parameters;
correspondingly, the selecting the corresponding model parameter according to the flash memory medium model includes: and selecting corresponding model parameters from the configuration database according to the model of the flash memory medium.
6. The system of claim 1,
the flash media emulation platform is further configured to: and when the model parameters and the test conditions are received, setting the operation behavior of the flash memory medium simulation platform so that the flash memory medium simulation platform can execute the test instruction sent by the flash memory controller verification platform.
7. The system of claim 1,
the host operating platform is further configured to: generating a register configuration parameter and a time sequence configuration parameter of the flash memory controller, and sending the register configuration parameter and the time sequence configuration parameter to a flash memory controller verification platform;
correspondingly, the flash controller verification platform is further configured to: and configuring a register used in the verification process according to the register configuration parameter, and configuring the time sequence of the verification process according to the time sequence configuration parameter.
8. The system of claim 1,
the flash media emulation platform is further configured to: configuring a first interface of the flash memory medium simulation platform when the model parameters and the test conditions are received;
correspondingly, the flash controller verification platform is further configured to: after receiving the test case configuration parameters, configuring a second interface of the flash memory controller verification platform;
the first interface and the second interface are communication interfaces between the flash memory medium simulation platform and the flash memory controller verification platform.
9. The system of claim 1, wherein the test conditions comprise at least one of: PE times, temperature, cell mode, and electrical characteristics.
10. The system of claim 9, wherein the electrical characteristic comprises a latency of a read operation, a write operation, or an erase operation.
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