Disclosure of Invention
The embodiment of the application provides a Cyclic Redundancy Check (CRC) calculation method, a device, electronic equipment and a storage medium, which can solve the problems of complex CRC calculation mode, more consumed resources, lower calculation efficiency and higher data transmission delay. The technical scheme is as follows:
Acquiring at least two data packets;
Determining static data and dynamic data in at least two data packets;
Performing CRC calculation on dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and taking the second CRC value as a target CRC calculation result of each data packet;
the first CRC value is obtained by carrying out CRC calculation on static data in advance according to a preset initial value.
In one possible implementation, determining static data and dynamic data in at least two data packets includes:
If the same bit number of the data exists in at least two data packets, the data with the same bit number is used as static data, and the data with other bit numbers except the same bit number in each data packet is used as dynamic data of each data packet.
In another possible implementation, the method further includes:
If the same number of bits of the data is not found in the at least two data packets, CRC calculation is carried out on the data in the at least two data packets according to a preset first initial value, and a target CRC calculation result of each data packet is obtained.
According to another aspect of the embodiment of the present application, there is provided a data transmission system, including a transmitting end and a receiving end, wherein:
The sending end is used for generating at least two data packets and sending the at least two data packets and the first target CRC calculation result of the corresponding data packets to the receiving end;
The receiving end is used for receiving the at least two data packets sent by the sending end and the first target CRC calculation results of the corresponding data packets, obtaining the second target CRC calculation results of the data packets based on the at least two data packets, and verifying whether the first target CRC calculation results of the data packets are consistent with the second target CRC calculation results.
In one possible implementation manner, the transmitting end includes a generating module, a first CRC module, and a transmitting module, where:
The generating module is used for generating at least two data packets;
A first CRC module, configured to perform CRC calculation on at least two data packets according to the cyclic redundancy check calculation method according to any one of claims 1 to 3, to obtain a first target CRC calculation result for each data packet;
And the sending module is used for sending the at least two data packets and the first target CRC calculation result of the corresponding data packet to the receiving end.
In another possible implementation manner, the receiving end includes a receiving module, a second CRC module, and a checking module, where:
the receiving module is used for receiving at least two data packets sent by the sending end and a first target CRC calculation result of the corresponding data packets;
A second CRC module, configured to perform CRC calculation on at least two data packets according to the cyclic redundancy check calculation method according to any one of claims 1 to 3, to obtain a second target CRC calculation result for each data packet;
and the checking module is used for checking whether the first target CRC calculation result and the second target CRC calculation result of each data packet are consistent.
According to still another aspect of an embodiment of the present application, there is provided a cyclic redundancy check, CRC, calculation apparatus including:
The acquisition module is used for acquiring at least two data packets;
the determining module is used for determining static data and dynamic data in at least two data packets;
The calculation module is used for carrying out CRC calculation on the dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and taking the second CRC value as a target CRC calculation result of each data packet;
the first CRC value is obtained by carrying out CRC calculation on static data in advance according to a preset initial value.
In one possible implementation, the determining module includes:
and the data classification module is used for taking the data with the same bit number as static data and taking the data with other bit numbers except the same bit number in each data packet as dynamic data of each data packet if the same bit number of the data exists in at least two data packets.
In another possible implementation, the determining module further includes:
And the data packet calculation module is used for carrying out CRC calculation on the data in the at least two data packets according to a preset first initial value if the same number of bits with the same data does not exist in the at least two data packets, so as to obtain a target CRC calculation result of each data packet.
According to still another aspect of an embodiment of the present application, there is provided an electronic device including a memory, a processor, and a computer program stored on the memory, the processor executing the computer program to implement the steps of the cyclic redundancy check calculation method described above.
According to a further aspect of an embodiment of the present application, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the cyclic redundancy check, CRC, calculation method described above.
The technical scheme provided by the embodiment of the application has the beneficial effects that:
According to the embodiment of the application, the static data and the dynamic data in at least two data packets are determined by acquiring at least two data packets, the static data is subjected to CRC calculation to obtain the first CRC value, and then the dynamic data of each data packet is subjected to CRC calculation according to the first CRC value, so that the CRC calculation time of each data packet is saved, and the CRC calculation efficiency is provided.
Detailed Description
Embodiments of the present application are described below with reference to the drawings in the present application. It should be understood that the embodiments described below with reference to the drawings are exemplary descriptions for explaining the technical solutions of the embodiments of the present application, and the technical solutions of the embodiments of the present application are not limited.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless expressly stated otherwise, as understood by those skilled in the art. It will be further understood that the terms "comprises" and "comprising," when used in this specification, specify the presence of stated features, information, data, steps, operations, elements, and/or components, but do not preclude the presence or addition of other features, information, data, steps, operations, elements, components, and/or groups thereof, all of which may be included in the present specification. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. The term "and/or" as used herein indicates that at least one of the items defined by the term, e.g., "a and/or B" may be implemented as "a", or as "B", or as "a and B".
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.
First, several terms related to the present application are described and explained:
the cyclic redundancy check (Cyclic Redundancy Check, CRC) is a channel coding technique for generating a short fixed bit check code according to data such as network data packets or computers, and is mainly used for detecting or checking errors possibly occurring after data transmission or storage, and generating the check code by utilizing the principles of division and remainder.
BT (Bluetooth) and BLE (Bluetooth Low Energy ), BT refers to a Bluetooth module with a Bluetooth protocol below 4.0, and is generally used for transmission with a relatively large data volume, such as transmission with a relatively large data volume of voice, music, and the like; BLE refers to a Bluetooth module with a Bluetooth protocol of 4.0 or higher, and is characterized by cost and power consumption reduction, and is applied to products with high real-time requirements, such as intelligent furniture, data transmission of sensing equipment and the like.
The 2.4G private protocol transmission chip has standard protocols such as wifi and Bluetooth in the frequency band of 2.4G, and the 2.4G private protocol transmission chip makes up the scene which cannot be covered by the standard protocols in the field which cannot be covered by wifi and Bluetooth, is a very wide-application chip and has the characteristics of low delay, simple networking, high speed, long distance and the like.
In the wireless data transmission process of BE/BLE and 2.4G private protocol transmission chips, when CRC calculation is carried out on transmitted data packets, the operation logic of CRC adopted respectively is different, for example, the number of bits of the data packets in different data transmission modes is different, the selected polynomials and the initial polynomials are different, more manpower and material resources are required to BE consumed to respectively realize CRC calculation in each data transmission, in the CRC calculation process, corresponding CRC calculation is required to BE carried out on each transmitted data packet, the CRC calculation efficiency is lower, and the delay of data transmission is higher.
The application provides a cyclic redundancy check calculation method, a cyclic redundancy check calculation device, electronic equipment and a storage medium, and aims to solve the technical problems in the prior art.
The technical solutions of the embodiments of the present application and technical effects produced by the technical solutions of the present application are described below by describing several exemplary embodiments. It should be noted that the following embodiments may be referred to, or combined with each other, and the description will not be repeated for the same terms, similar features, similar implementation steps, and the like in different embodiments.
The embodiment of the application provides a Cyclic Redundancy Check (CRC) calculation method, which comprises the following steps as shown in fig. 1:
S101, acquiring at least two data packets.
In packet-switched networks, a single message is divided into a plurality of data blocks, called packets, also commonly referred to as data packets, which may be transmitted along different paths in one or more networks and reassembled at a destination. The data packets are propagated in the physical link layer in the form of a bit stream during the actual transmission process.
The method for acquiring the data packet in the embodiment of the present application may acquire the data packet from the internal database of the transmitting end when the transmitting end of the data packet, that is, the transmitting end transmits the data packet, or may be other methods, and the embodiment of the present application is not specifically limited.
As shown in fig. 2, fig. 2 is a schematic structural diagram of a BLE data packet according to an exemplary embodiment of the present application, where the at least two data packets obtained in the embodiment of the present application may be data packets in BLE data transmission, and include a pilot of 1 or 2 bytes, a terminal address of 4 bytes, PDUs (Protocol Data Unit, protocol data units) of 2-258 bytes, CRC check codes of 3 bytes, and constant tone extension of 16 to 160 microseconds, and the portion where diagonal lines are drawn, that is, the PDUs of 2-258 bytes are the portion where CRC calculation is performed.
As shown in fig. 3, fig. 3 is a schematic structural diagram of a 2.4G private protocol data packet according to an exemplary embodiment of the present application, where the data packet includes a pilot frequency of 1 byte, an address of 4 bytes, a packet control field of 9 bytes, a payload of 0-32 bytes, and a CRC check code of 1-2 bytes, and diagonal line portions, that is, the address, the packet control field, and the payload are portions for performing CRC calculation.
S102, determining static data and dynamic data in at least two data packets.
It should be understood that in the embodiment of the present application, the static data refers to the same data in the plurality of data packets, and the dynamic data refers to different data in the plurality of data packets. The data included in the data packet generally includes addresses of the transmitting end and the receiving segment, and data carried in the data packet and transmitted from the transmitting end to the receiving end.
Specifically, if the obtained data packets are sent to the same receiving end by the same sending end, it may be determined that the addresses of the sending end and the receiving end included in the obtained data packets are static data, and different data carried by the data packets are dynamic data, and it should be noted that the obtained at least two data packets are not sent to the same receiving section by the same sending end, that is, the same data is not the addresses of the sending end and the receiving end.
S103, performing CRC calculation on dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and taking the second CRC value as a target CRC calculation result of each data packet;
the first CRC value is obtained by carrying out CRC calculation on static data in advance according to a preset initial value.
The principle of the CRC concept is that a check code is added after data to be transmitted is transmitted in a transmitting end, the check code is determined according to a remainder obtained by dividing a certain specific number preselected by the transmitting end and a receiving end together with the data to be transmitted, the received data is divided by the preselected specific number in the receiving end, and if the remainder is 0, the data is unchanged in the transmission process, and the data transmission is correct; and if the remainder is not 0, the data is changed in the transmission process, and the data transmission is in error.
The CRC calculation refers to a specific calculation process of the foregoing process, which is not specifically limited in the embodiment of the present application, in practical application, the data stream of the data packet may be sequentially input into the shift register according to bits, and the obtained register value is the CRC value of the data packet, for example, in the embodiment of the present application, a Linear Feedback Shift Register (LFSR) is used, and the obtained data stream of the data packet is input into the LFSR, so that the register value output by the LFSR is the CRC value of the data packet.
In the embodiment of the application, CRC calculation is performed on the static data in advance according to the preset first initial value, namely, the static data is input into the LFSR to be calculated, the CRC value output by the LFSR is obtained and is the first CRC value, and the first initial value is the reset value of the shift register.
It should be understood that, if the static data is the same data in the acquired at least one data packet, the static data of each data packet may be subjected to CRC calculation in advance to obtain a first CRC value, and then the dynamic data of each data packet is subjected to CRC calculation according to the first CRC value to obtain a second CRC value, where the second CRC value is used as the target CRC calculation result of each data packet.
After obtaining the first CRC value corresponding to the static data, taking the first CRC value as an initial value of CRC calculation for the dynamic data, and performing CRC calculation for the dynamic data of each data packet, namely inputting the dynamic data of each data packet into the LFSR again, obtaining a second CRC value output by the LFSR, and taking the second CRC value as a target CRC calculation result of each data packet.
For example, the obtained static data of at least one packet is 0×8e89BED6, the static data is inputted to the LSFR, the first CRC value outputted from the LSFR is 0×1b63CA, and when calculating the dynamic data of each packet, the dynamic data of each packet is calculated again by CRC calculation using 0×1b63CA as an initial value, respectively, to obtain the second CRC value of each packet.
According to the embodiment of the application, the static data and the dynamic data in at least one data packet are determined by acquiring the at least one data packet, the static data is subjected to CRC calculation once to obtain the first CRC value, and then the dynamic data of each data packet is subjected to CRC calculation according to the first CRC value, so that the CRC calculation time of each data packet is saved, and the CRC calculation efficiency is provided.
The embodiment of the application provides a possible implementation manner, which determines static data and dynamic data in at least two data packets, and comprises the following steps:
If the same bit number of the data exists in at least two data packets, the data with the same bit number is used as static data, and the data with other bit numbers except the same bit number in each data packet is used as dynamic data of each data packet.
It should be understood that for two data packets, static data refers to the same data in both data packets, where the same data in both data packets is not only the same data itself, but the number of bits to which the data corresponds is also the same.
The data in the data packet is a binary bit stream, for example, the acquired data of the data packet includes AAAABBBB, AAAACCCC, AAAADDDD, where the first four bits of each data packet are all AAAA, that is, AAAA may be determined to be static data, and the data of other bits except the first four bits are dynamic data, that is, BBBB, CCCC, and DDDD may be determined to be dynamic data.
The embodiment of the application provides a possible implementation manner, and the cyclic redundancy check calculation method further comprises the following steps:
If the same number of bits of the data is not found in the at least two data packets, CRC calculation is carried out on the data in the at least two data packets according to a preset first initial value, and a target CRC calculation result of each data packet is obtained.
It should be understood that, in the embodiment of the present application, at least one data packet obtained may not have the same number of bits of the same data, that is, the data in each data packet is different, for example, when CRC calculation is performed on the data packet in BLE, the addresses of the transmitting end and the receiving end are not carried in each data packet, and only the data to be transmitted is carried.
If it is determined that the same number of bits of the data does not exist in the acquired at least one data packet, that is, the data in each data packet is different, at this time, CRC calculation needs to be performed on all the data of each data packet.
In the embodiment of the application, if the obtained at least one data packet does not have the same bit number of the data, that is, the data packets do not have the same static data, the preset first initial value can be used as the initial value of CRC calculation of each data packet, even if the data carried by each data packet are different, the logic structure of CRC calculation can be similar, and the efficiency of CRC calculation of each data packet can be improved by adopting the same initial value.
Fig. 4 is a logic schematic diagram of CRC calculation provided in the embodiment of the present application, as shown in fig. 4, in the embodiment of the present application, two processing modes are performed on a bit stream with static data and a bit stream without static data, where the bit stream with static data may perform CRC pre-calculation on the static data, and then perform CRC calculation to obtain a final CRC result, and the bit stream without static data may directly perform CRC calculation to obtain a CRC result. Wherein, the bit stream refers to that the data packet is transmitted in the form of bit stream in the transmission process.
The embodiment of the application also provides a data transmission system, which comprises a sending end and a receiving end, wherein:
The sending end is used for generating at least two data packets and sending the at least two data packets and the first target CRC calculation result of the corresponding data packets to the receiving end;
The receiving end is used for receiving the at least two data packets sent by the sending end and the first target CRC calculation results of the corresponding data packets, obtaining the second target CRC calculation results of the data packets based on the at least two data packets, and verifying whether the first target CRC calculation results of the data packets are consistent with the second target CRC calculation results.
It should be understood that the cyclic redundancy check calculation method in the above embodiment is performed at both the transmitting end and the receiving end, where the transmitting end and the receiving end refer to devices with a function of transmitting data, and the receiving end refers to devices with a function of receiving data.
The embodiment of the application provides a possible implementation manner, and a sending end comprises a generating module, a first CRC module and a sending module, wherein:
The generating module is used for generating at least two data packets;
A first CRC module, configured to perform CRC calculation on at least two data packets according to the cyclic redundancy check calculation method according to any one of claims 1 to 3, to obtain a first target CRC calculation result for each data packet;
And the sending module is used for sending the at least two data packets and the first target CRC calculation result of the corresponding data packet to the receiving end.
The embodiment of the application provides a possible implementation manner, and the receiving end comprises a receiving module, a second CRC module and a checking module, wherein:
The receiving module is used for receiving at least two data packets sent by the sending end and a first target CRC calculation result of the corresponding data packets;
A second CRC module, configured to perform CRC calculation on at least two data packets according to the cyclic redundancy check calculation method according to any one of claims 1 to 3, to obtain a second target CRC calculation result for each data packet;
and the checking module is used for checking whether the first target CRC calculation result and the second target CRC calculation result of each data packet are consistent.
Fig. 5 is a schematic structural diagram of a data transmission system according to an embodiment of the present application, where, as shown in fig. 5, data transmission may be performed between a transmitting end and a receiving end, and each arrow indicates a data transmission process.
Specifically, a generating module generates at least two data packets in a transmitting end; the first CRC module performs CRC calculation on at least two data packets to obtain a first target CRC calculation result of each data packet; the sending module sends the at least two data packets and the first target CRC calculation result of the corresponding data packets to the receiving module of the receiving end.
Receiving at least two data packets and a first target CRC calculation result of the corresponding data packets by a receiving module in a receiving end; the second CRC module performs CRC calculation on at least two data packets to obtain a second target CRC calculation result of each data packet; and checking whether the first target CRC calculation result is consistent with the second target CRC calculation result or not by the checking module.
An embodiment of the present application provides a cyclic redundancy check CRC calculation apparatus, as shown in fig. 6, the apparatus may include: the acquisition module 110, the determination module 210, and the calculation module 310, wherein,
An acquisition module 110, configured to acquire at least two data packets;
a determining module 210, configured to determine static data and dynamic data in at least two data packets;
A calculation module 310, configured to perform CRC calculation on the dynamic data in each data packet according to the first CRC value, obtain a second CRC value, and use the second CRC value as a target CRC calculation result of each data packet;
the first CRC value is obtained by carrying out CRC calculation on static data in advance according to a preset initial value.
The embodiment of the present application provides a CRC calculation apparatus, and specifically executes the above method embodiment flow, and details of the above CRC calculation method embodiment are described in detail herein and are not repeated herein. According to the CRC calculation device for the cyclic redundancy check, provided by the embodiment of the application, the static data and the dynamic data in at least two data packets are determined by acquiring the at least two data packets, the static data is subjected to CRC calculation to obtain the first CRC value, and then the dynamic data of each data packet is subjected to CRC calculation according to the first CRC value, so that the CRC calculation time of each data packet is saved, and the CRC calculation efficiency is improved.
In one possible implementation, the determining module 210 includes:
and the data classification module is used for taking the data with the same bit number as static data and taking the data with other bit numbers except the same bit number in each data packet as dynamic data of each data packet if the same bit number of the data exists in at least two data packets.
In another possible implementation, the determining module 210 further includes:
And the data packet calculation module is used for carrying out CRC calculation on the data in the at least two data packets according to a preset first initial value if the same number of bits with the same data does not exist in the at least two data packets, so as to obtain a target CRC calculation result of each data packet.
The embodiment of the application provides an electronic device, which comprises a memory, a processor and a computer program stored on the memory, wherein the processor executes the computer program to realize the steps of a Cyclic Redundancy Check (CRC) calculation method, and compared with the related technology, the method can realize the steps of the CRC calculation method: according to the embodiment of the application, the static data and the dynamic data in at least one data packet are determined by acquiring the at least one data packet, the static data is subjected to CRC calculation once to obtain the first CRC value, and then the dynamic data of each data packet is subjected to CRC calculation according to the first CRC value, so that the CRC calculation time of each data packet is saved, and the CRC calculation efficiency is provided.
In an alternative embodiment, an electronic device is provided, as shown in fig. 7, the electronic device 4000 shown in fig. 7 includes: a processor 4001 and a memory 4003. Wherein the processor 4001 is coupled to the memory 4003, such as via a bus 4002. Optionally, the electronic device 4000 may further comprise a transceiver 4004, the transceiver 4004 may be used for data interaction between the electronic device and other electronic devices, such as transmission of data and/or reception of data, etc. It should be noted that, in practical applications, the transceiver 4004 is not limited to one, and the structure of the electronic device 4000 is not limited to the embodiment of the present application.
The Processor 4001 may be a CPU (Central Processing Unit ), general purpose Processor, DSP (DIGITAL SIGNAL Processor, data signal Processor), ASIC (Application SPECIFIC INTEGRATED Circuit), FPGA (Field Programmable GATE ARRAY ) or other programmable logic device, transistor logic device, hardware component, or any combination thereof. Which may implement or perform the various exemplary logic blocks, modules and circuits described in connection with this disclosure. The processor 4001 may also be a combination that implements computing functionality, e.g., comprising one or more microprocessor combinations, a combination of a DSP and a microprocessor, etc.
Bus 4002 may include a path to transfer information between the aforementioned components. Bus 4002 may be a PCI (PERIPHERAL COMPONENT INTERCONNECT, peripheral component interconnect standard) bus or an EISA (Extended Industry Standard Architecture ) bus, or the like. The bus 4002 can be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in fig. 7, but not only one bus or one type of bus.
Memory 4003 may be, but is not limited to, ROM (Read Only Memory) or other type of static storage device that can store static information and instructions, RAM (Random Access Memory ) or other type of dynamic storage device that can store information and instructions, EEPROM (ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY ), CD-ROM (Compact Disc Read Only Memory, compact disc Read Only Memory) or other optical disk storage, optical disk storage (including compact discs, laser discs, optical discs, digital versatile discs, blu-ray discs, etc.), magnetic disk storage media, other magnetic storage devices, or any other medium that can be used to carry or store a computer program and that can be Read by a computer.
The memory 4003 is used for storing a computer program for executing an embodiment of the present application, and is controlled to be executed by the processor 4001. The processor 4001 is configured to execute a computer program stored in the memory 4003 to realize the steps shown in the foregoing method embodiment.
Embodiments of the present application provide a computer readable storage medium having a computer program stored thereon, which when executed by a processor, implements the steps of the foregoing method embodiments and corresponding content.
The terms "first," "second," "third," "fourth," "1," "2," and the like in the description and in the claims and in the above figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate, such that the embodiments of the application described herein may be implemented in other sequences than those illustrated or otherwise described.
It should be understood that, although various operation steps are indicated by arrows in the flowcharts of the embodiments of the present application, the order in which these steps are implemented is not limited to the order indicated by the arrows. In some implementations of embodiments of the application, the implementation steps in the flowcharts may be performed in other orders as desired, unless explicitly stated herein. Furthermore, some or all of the steps in the flowcharts may include multiple sub-steps or multiple stages based on the actual implementation scenario. Some or all of these sub-steps or phases may be performed at the same time, or each of these sub-steps or phases may be performed at different times, respectively. In the case of different execution time, the execution sequence of the sub-steps or stages can be flexibly configured according to the requirement, which is not limited by the embodiment of the present application.
The foregoing is merely an optional implementation manner of some of the implementation scenarios of the present application, and it should be noted that, for those skilled in the art, other similar implementation manners based on the technical ideas of the present application are adopted without departing from the technical ideas of the scheme of the present application, and the implementation manner is also within the protection scope of the embodiments of the present application.