CN114448565A - Cyclic redundancy check calculation method and device, electronic equipment and storage medium - Google Patents
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Abstract
The embodiment of the application provides a Cyclic Redundancy Check (CRC) calculation method and device, electronic equipment and a storage medium, and relates to the technical field of data transmission. The method comprises the following steps: acquiring at least two data packets; determining static data and dynamic data in the at least two data packets; performing CRC calculation on dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and taking the second CRC value as a target CRC calculation result of each data packet; and the first CRC value is obtained by performing CRC calculation on the static data according to a preset initial value in advance. According to the embodiment of the application, the CRC calculation time of each data packet is saved, and the CRC calculation efficiency is improved.
Description
Technical Field
The present application relates to the field of data transmission technologies, and in particular, to a cyclic redundancy check calculation method and apparatus, an electronic device, and a storage medium.
Background
Cyclic Redundancy Check (CRC) is a channel coding technique for generating a short fixed-bit Check code according to data such as a network data packet or a computer file, and is mainly used to detect or Check errors that may occur after data transmission or storage, and error detection is performed by using the principles of division and remainder.
In the prior art, devices in wireless data communication, such as BT/BLE (bluetooth low energy), 2.4G private protocol transmission chips, generally use CRC to calculate and verify data, and different devices transmit data packets according to CRC, the adopted CRC calculation logics are different, which requires more manpower and material resources to be consumed to implement respectively, and in the CRC calculation process, corresponding CRC calculation needs to be performed for each transmitted data packet, resulting in higher data transmission delay.
Disclosure of Invention
The embodiment of the application provides a cyclic redundancy check calculation method, a cyclic redundancy check calculation device, electronic equipment and a storage medium, and can solve the problems that a CRC calculation mode is complex, more resources are consumed, calculation efficiency is low, and data transmission delay is high. The technical scheme is as follows:
acquiring at least two data packets;
determining static data and dynamic data in at least two data packets;
performing CRC calculation on the dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and taking the second CRC value as a target CRC calculation result of each data packet;
the first CRC value is obtained by performing CRC calculation on static data according to a preset initial value in advance.
In one possible implementation, determining static data and dynamic data in at least two data packets includes:
and if the same digit of the data exists in at least two data packets, using the data with the same digit as static data, and using the data with the digits except the data with the same digit in each data packet as dynamic data of each data packet.
In another possible implementation, the method further includes:
and if the same number of bits of the same data does not exist in the at least two data packets, performing CRC calculation on the data in the at least two data packets according to a preset first initial value to obtain a target CRC calculation result of each data packet.
According to another aspect of the embodiments of the present application, a data transmission system is provided, which includes a sending end and a receiving end, wherein:
the system comprises a sending end and a receiving end, wherein the sending end is used for generating at least two data packets and sending the at least two data packets and a first target CRC calculation result of the corresponding data packets to the receiving end;
and the receiving end is used for receiving the at least two data packets sent by the sending end and the first target CRC calculation result of the corresponding data packet, obtaining the second target CRC calculation result of each data packet based on the at least two data packets, and verifying whether the first target CRC calculation result of each data packet is consistent with the second target CRC calculation result.
In one possible implementation manner, the sending end includes a generating module, a first CRC module, and a sending module, where:
a generating module for generating at least two data packets;
a first CRC module for performing CRC calculations on at least two data packets according to the cyclic redundancy check calculation method of any of claims 1 to 3 to obtain a first target CRC calculation result for each data packet;
and the sending module is used for sending the at least two data packets and the first target CRC calculation result of the corresponding data packet to the receiving end.
In another possible implementation manner, the receiving end includes a receiving module, a second CRC module, and a checking module, where:
the receiving module is used for receiving at least two data packets sent by the sending end and a first target CRC calculation result of the corresponding data packets;
a second CRC module for performing CRC calculations on at least two data packets according to the cyclic redundancy check calculation method of any of claims 1 to 3 to obtain a second target CRC calculation result for each data packet;
and the checking module is used for verifying whether the first target CRC calculation result and the second target CRC calculation result of each data packet are consistent.
According to still another aspect of the embodiments of the present application, there is provided a cyclic redundancy check, CRC, calculation apparatus including:
the acquisition module is used for acquiring at least two data packets;
the determining module is used for determining static data and dynamic data in at least two data packets;
the calculation module is used for performing CRC calculation on the dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and the second CRC value is used as a target CRC calculation result of each data packet;
the first CRC value is obtained by performing CRC calculation on static data according to a preset initial value in advance.
In one possible implementation, the determining module includes:
and the data classification module is used for taking the data with the same digit as static data and taking the data with other digits except the data with the same digit in each data packet as dynamic data of each data packet if the data with the same digit in at least two data packets is determined to exist.
In another possible implementation manner, the determining module further includes:
and the data packet calculation module is used for performing CRC calculation on the data in the at least two data packets according to a preset first initial value to obtain a target CRC calculation result of each data packet if the same number of bits of the data in the at least two data packets is determined to be not the same.
According to yet another aspect of the embodiments of the present application, there is provided an electronic device, which includes a memory, a processor and a computer program stored on the memory, wherein the processor executes the computer program to implement the steps of the above-mentioned cyclic redundancy check calculation method.
According to still another aspect of embodiments of the present application, there is provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the above-described cyclic redundancy check, CRC, calculation method.
The technical scheme provided by the embodiment of the application has the following beneficial effects:
according to the embodiment of the application, the at least two data packets are obtained, the static data and the dynamic data in the at least two data packets are determined, the static data are subjected to CRC calculation to obtain the first CRC value, and then the dynamic data of each data packet are subjected to CRC calculation according to the first CRC value, so that the CRC calculation time of each data packet is saved, and the CRC calculation efficiency is improved.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings used in the description of the embodiments of the present application will be briefly described below.
Fig. 1 is a schematic flowchart of a CRC calculation method according to an embodiment of the present disclosure;
figure 2 is a schematic structural diagram of a BLE data packet exemplarily provided in an embodiment of the present application;
fig. 3 is a schematic structural diagram of a 2.4G private protocol data packet exemplarily provided in an embodiment of the present application;
FIG. 4 is a logic diagram illustrating a CRC calculation according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a data transmission system according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an apparatus for calculating cyclic redundancy check CRC according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of an electronic device for calculating a cyclic redundancy check CRC according to an embodiment of the present application.
Detailed Description
Embodiments of the present application are described below in conjunction with the drawings in the present application. It should be understood that the embodiments set forth below in connection with the drawings are exemplary descriptions for explaining technical solutions of the embodiments of the present application, and do not limit the technical solutions of the embodiments of the present application.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should be further understood that the terms "comprises" and/or "comprising," when used in this specification in connection with embodiments of the present application, specify the presence of stated features, information, data, steps, operations, elements, and/or components, but do not preclude the presence or addition of other features, information, data, steps, operations, elements, components, and/or groups thereof, as embodied in the art. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. The term "and/or" as used herein indicates at least one of the items defined by the term, e.g., "a and/or B" may be implemented as "a", or as "B", or as "a and B".
To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
The terms referred to in this application will first be introduced and explained:
cyclic Redundancy Check (CRC) is a channel coding technique for generating a short fixed-position parity Check code according to data such as a network data packet or a computer, and is mainly used to detect or Check errors that may occur after data transmission or storage, and generate a parity Check code by using the principles of division and remainder.
BT (Bluetooth) and BLE (Bluetooth Low Energy), where BT is a Bluetooth module with a Bluetooth protocol below 4.0 and is generally used for large data volume transmission, such as large data volume transmission of voice, music, and the like; BLE refers to a bluetooth module with a bluetooth protocol of 4.0 or higher, which is characterized by reduced cost and power consumption, and is applied to products with higher real-time requirements, such as data transmission of intelligent furniture and sensing equipment.
The 2.4G private protocol transmission chip has standard protocols such as wifi and Bluetooth in a 2.4G frequency band, and in the field that wifi and Bluetooth cannot cover, the 2.4G private protocol transmission chip makes up for the scene that the standard protocols cannot cover, is a chip with wide application, and has the characteristics of low time delay, simplicity in networking, high speed, long distance and the like.
In the wireless data transmission process of the BE/BLE and 2.4G private protocol transmission chips, when CRC calculation is performed on transmitted data packets, the arithmetic logics of the CRCs respectively adopted are different, for example, the number of bits of the data packets in different data transmission modes is different, the selected polynomial and the initial are different, more manpower and material resources are consumed to respectively realize CRC calculation in each data transmission, and in the CRC calculation process, corresponding CRC calculation needs to BE performed on each transmitted data packet, the CRC calculation efficiency is low, and thus the delay of data transmission is high.
The application provides a cyclic redundancy check calculation method, a cyclic redundancy check calculation device, an electronic device and a storage medium, and aims to solve the technical problems in the prior art.
The technical solutions of the embodiments of the present application and the technical effects produced by the technical solutions of the present application will be described below through descriptions of several exemplary embodiments. It should be noted that the following embodiments may be referred to, referred to or combined with each other, and the description of the same terms, similar features, similar implementation steps and the like in different embodiments is not repeated.
The embodiment of the present application provides a cyclic redundancy check CRC calculation method, as shown in fig. 1, the method includes:
s101, acquiring at least two data packets.
Data packets, in a packet-switched network, a single message is divided into a plurality of data blocks, called packets, also commonly called data packets, which can be transmitted along different paths in one or more networks and reassembled at the destination. The data packets are propagated in the physical link layer in the form of bit streams during actual transmission.
The method for obtaining the data packet in the embodiment of the present application may be to obtain the data packet from an internal database of a sending end when the sending end of the data packet, that is, the sending end sends the data packet, or may be other methods.
For example, as shown in fig. 2, fig. 2 is a schematic structural diagram of a BLE Data packet exemplarily provided in the embodiment of the present application, and includes a pilot of 1 or 2 bytes, a terminal address of 4 bytes, a PDU (Protocol Data Unit) of 2-258 bytes, a CRC check code of 3 bytes, and a constant tone extension of 16 to 160 microseconds, where a portion of a diagonal line is drawn, that is, the PDU of 2-258 bytes is a portion for performing CRC calculation.
For example, the at least two data packets obtained in the embodiment of the present application may also be data packets in data transmission of a 2.4G private protocol transmission chip, as shown in fig. 3, fig. 3 is a schematic structural diagram of a 2.4G private protocol data packet exemplarily provided in the embodiment of the present application, and includes a pilot of 1 byte, an address of 4 bytes, a packet control field of 9 bytes, a payload of 0-32 bytes, and a CRC check code of 1-2 bytes, where a slash portion is drawn, that is, the address, the packet control field, and the payload are portions for performing CRC calculation.
S102, determining static data and dynamic data in at least two data packets.
It should be understood that in the embodiments of the present application, static data refers to the same data in multiple data packets, and dynamic data refers to different data in multiple data packets. The data included in the data packet generally includes addresses of the transmitting end and the receiving end, and data carried in the data packet and transmitted from the transmitting end to the receiving end.
Specifically, if the obtained data packets are sent to the same receiving end by the same sending end, it may be determined that addresses of the sending end and the receiving end included in the obtained data packets are static data, and different data carried by the data packets are dynamic data.
S103, performing CRC calculation on the dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and taking the second CRC value as a target CRC calculation result of each data packet;
the first CRC value is obtained by performing CRC calculation on static data according to a preset initial value in advance.
The principle of the CRC is that a check code is added after data to be transmitted in a transmitting end, the check code is determined according to a remainder obtained by dividing a certain specific number which is jointly selected in advance by the transmitting end and the receiving end by the data to be transmitted, the received data is divided by the specific number which is selected in advance in the receiving end, and the remainder is 0, namely that the data is not changed in the transmission process and the data is transmitted correctly; if the remainder is not 0, the data change in the transmission process is shown, and the data transmission is wrong.
The CRC calculation refers to a specific calculation process of the above process, and is not specifically limited in this embodiment of the present application, in practical applications, a data stream of a data packet may be sequentially input into a shift register according to bits, and an obtained register value is a CRC value of the data packet, for example, in this embodiment of the present application, a Linear Feedback Shift Register (LFSR) is used, the obtained data stream of the data packet is input into the LFSR, and a register value output by the LFSR is obtained, that is, the CRC value of the data packet.
In the embodiment of the present application, the CRC of the static data is calculated in advance according to a preset first initial value, that is, the static data is input into the LFSR for calculation, and the obtained CRC value output by the LFSR is a first CRC value, and the first initial value is a reset value of the shift register.
It should be understood that the static data is the same data in the at least one acquired data packet, and then the static data of each data packet may be subjected to CRC calculation once in advance to obtain a first CRC value, and then the dynamic data of each data packet may be subjected to CRC calculation again according to the first CRC value to obtain a second CRC value, and the second CRC value is used as the target CRC calculation result of each data packet.
After the first CRC value corresponding to the static data is obtained, the first CRC value is used as an initial value for performing CRC calculation on the dynamic data, and the CRC calculation is performed on the dynamic data of each data packet, namely the dynamic data of each data packet is input into the LFSR again, and the second CRC value output by the LFSR is obtained and used as a target CRC calculation result of each data packet.
For example, the static data of at least one acquired packet is 0 × 8E89BED6, the static data is input to the LSFR, the first CRC value output by the LSFR is 0 × 1B63CA, and when calculating the dynamic data of each packet, the dynamic data of each packet is subjected to CRC calculation again using 0 × 1B63CA as an initial value, so that the second CRC value of each packet is obtained.
According to the embodiment of the application, at least one data packet is obtained, static data and dynamic data in the at least one data packet are determined, CRC calculation is performed on the static data for one time to obtain a first CRC value, and then CRC calculation is performed on the dynamic data of each data packet according to the first CRC value, so that CRC calculation time of each data packet is saved, and CRC calculation efficiency is improved.
The embodiment of the present application provides a possible implementation manner, and determining static data and dynamic data in at least two data packets includes:
and if the same digit of the data exists in at least two data packets, using the data with the same digit as static data, and using the data with the digits except the data with the same digit in each data packet as dynamic data of each data packet.
It should be understood that static data refers to the same data in two data packets for two data packets, and the same data in two data packets is not only the same data itself, but also the corresponding number of bits of the data.
The data in the data packet is a string of binary bit streams, for example, the data of the obtained data packet includes aaaaaabbbb, aaaaccc, and aaaaaadddd, where the first four bits of each data packet are AAAA, that is, the AAAA is determined to be static data, and the data of other bits except the first four bits is determined to be dynamic data, that is, the BBBB, CCCC, and DDDD are determined to be dynamic data.
The embodiment of the present application provides a possible implementation manner, and the cyclic redundancy check calculation method further includes:
and if the same number of bits of the same data does not exist in the at least two data packets, performing CRC calculation on the data in the at least two data packets according to a preset first initial value to obtain a target CRC calculation result of each data packet.
It should be understood that the same number of bits of the same data may not exist in at least one data packet acquired in the embodiment of the present application, that is, the data in each data packet is different, for example, when CRC calculation is performed on the data packet in BLE, each data packet does not carry addresses of a transmitting end and a receiving end, and only carries data that needs to be transmitted.
If it is determined that the same number of bits of the same data does not exist in the at least one acquired data packet, that is, the data in each data packet is different, at this time, CRC calculation needs to be performed on all the data of each data packet.
In this embodiment of the present application, if it is determined that the same number of bits of the data does not exist in the at least one acquired data packet, that is, it is determined that the same static data does not exist in each data packet, a preset first initial value may be used as an initial value for performing CRC calculation on each data packet, and even if data carried by each data packet is different, a logic structure for performing CRC calculation is similar, and the same initial value is used, so that the efficiency of CRC calculation on each data packet may also be improved.
Fig. 4 is a logic diagram of CRC calculation provided in an embodiment of the present application, and as shown in fig. 4, two processing manners are respectively performed on a bit stream with static data and a bit stream without static data in the embodiment of the present application, a CRC pre-calculation of static data may be performed on the bit stream with static data, and then a CRC calculation is performed to obtain a final CRC result, while a CRC calculation may be directly performed on the bit stream without static data to obtain a CRC result. The bit stream refers to a data packet transmitted in the form of a bit stream during transmission.
The embodiment of the present application further provides a data transmission system, including a sending end and a receiving end, wherein:
the system comprises a sending end and a receiving end, wherein the sending end is used for generating at least two data packets and sending the at least two data packets and a first target CRC calculation result of the corresponding data packets to the receiving end;
and the receiving end is used for receiving the at least two data packets sent by the sending end and the first target CRC calculation result of the corresponding data packet, obtaining the second target CRC calculation result of each data packet based on the at least two data packets, and verifying whether the first target CRC calculation result of each data packet is consistent with the second target CRC calculation result.
It should be understood that, the cyclic redundancy check calculation method in the foregoing embodiment is performed at both the sending end and the receiving end, where the sending end and the receiving end refer to devices having a function of sending data, and the receiving end refers to devices having a function of receiving data.
The embodiment of the present application provides a possible implementation manner, where a sending end includes a generating module, a first CRC module, and a sending module, where:
the generating module is used for generating at least two data packets;
a first CRC module for performing CRC calculations on at least two data packets according to the cyclic redundancy check calculation method of any of claims 1 to 3 to obtain a first target CRC calculation result for each data packet;
and the sending module is used for sending the at least two data packets and the first target CRC calculation result of the corresponding data packet to the receiving end.
The embodiment of the present application provides a possible implementation manner, where the receiving end includes a receiving module, a second CRC module, and a checking module, where:
the receiving module is used for receiving at least two data packets sent by the sending end and a first target CRC calculation result of the corresponding data packets;
a second CRC module for performing CRC calculations on at least two data packets according to the cyclic redundancy check calculation method of any of claims 1 to 3 to obtain a second target CRC calculation result for each data packet;
and the checking module is used for verifying whether the first target CRC calculation result and the second target CRC calculation result of each data packet are consistent.
Fig. 5 is a schematic structural diagram of a data transmission system according to an embodiment of the present application, and as shown in fig. 5, data transmission may be performed between a sending end and a receiving end, and each arrow indicates a data transmission process.
Specifically, a generating module in a transmitting end generates at least two data packets; the first CRC module performs CRC calculation on at least two data packets to obtain a first target CRC calculation result of each data packet; the sending module sends the at least two data packets and the first target CRC calculation result of the corresponding data packet to a receiving module of a receiving end.
Receiving at least two data packets and a first target CRC calculation result of the corresponding data packets by a receiving module in a receiving end; the second CRC module performs CRC calculation on at least two data packets to obtain a second target CRC calculation result of each data packet; and checking whether the first target CRC calculation result and the second target CRC calculation result of the module are consistent.
An embodiment of the present application provides a cyclic redundancy check CRC calculation apparatus, as shown in fig. 6, the apparatus may include: an acquisition module 110, a determination module 210, and a calculation module 310, wherein,
an obtaining module 110, configured to obtain at least two data packets;
a determining module 210, configured to determine static data and dynamic data in at least two data packets;
a calculating module 310, configured to perform CRC calculation on the dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and use the second CRC value as a target CRC calculation result of each data packet;
the first CRC value is obtained by performing CRC calculation on static data according to a preset initial value in advance.
The CRC calculation apparatus for cyclic redundancy check provided in the embodiment of the present application executes the processes of the foregoing method embodiments, and for details, please refer to the contents of the foregoing CRC calculation method embodiment, which is not described herein again. According to the cyclic redundancy check CRC calculation device provided by the embodiment of the application, the static data and the dynamic data in the at least two data packets are determined by acquiring the at least two data packets, the CRC calculation is performed on the static data to acquire the first CRC value, and then the CRC calculation is performed on the dynamic data of each data packet according to the first CRC value, so that the CRC calculation time of each data packet is saved, and the CRC calculation efficiency is improved.
In one possible implementation, the determining module 210 includes:
and the data classification module is used for taking the data with the same digit as static data and taking the data with other digits except the data with the same digit in each data packet as dynamic data of each data packet if the data with the same digit in at least two data packets is determined to exist.
In another possible implementation, the determining module 210 further includes:
and the data packet calculation module is used for performing CRC calculation on the data in the at least two data packets according to a preset first initial value to obtain a target CRC calculation result of each data packet if the same number of bits of the data in the at least two data packets is determined to be not the same.
The embodiment of the application provides an electronic device, which comprises a memory, a processor and a computer program stored on the memory, wherein the processor executes the computer program to realize the steps of the Cyclic Redundancy Check (CRC) calculation method, and compared with the related art, the method can realize the following steps: according to the embodiment of the application, at least one data packet is obtained, static data and dynamic data in the at least one data packet are determined, CRC calculation is performed on the static data for one time to obtain a first CRC value, and then CRC calculation is performed on the dynamic data of each data packet according to the first CRC value, so that CRC calculation time of each data packet is saved, and CRC calculation efficiency is improved.
In an alternative embodiment, an electronic device is provided, as shown in fig. 7, the electronic device 4000 shown in fig. 7 comprising: a processor 4001 and a memory 4003. Processor 4001 is coupled to memory 4003, such as via bus 4002. Optionally, the electronic device 4000 may further include a transceiver 4004, and the transceiver 4004 may be used for data interaction between the electronic device and other electronic devices, such as transmission of data and/or reception of data. In addition, the transceiver 4004 is not limited to one in practical applications, and the structure of the electronic device 4000 is not limited to the embodiment of the present application.
The Processor 4001 may be a CPU (Central Processing Unit), a general-purpose Processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other Programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. The processor 4001 may also be a combination that performs a computational function, including, for example, a combination of one or more microprocessors, a combination of a DSP and a microprocessor, or the like.
The Memory 4003 may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory) or other optical Disc storage, optical Disc storage (including Compact Disc, laser Disc, optical Disc, digital versatile Disc, blu-ray Disc, etc.), a magnetic Disc storage medium, other magnetic storage devices, or any other medium that can be used to carry or store a computer program and that can be Read by a computer, without limitation.
The memory 4003 is used for storing computer programs for executing the embodiments of the present application, and is controlled by the processor 4001 to execute. The processor 4001 is used to execute computer programs stored in the memory 4003 to implement the steps shown in the foregoing method embodiments.
Embodiments of the present application provide a computer-readable storage medium, on which a computer program is stored, and when being executed by a processor, the computer program may implement the steps and corresponding contents of the foregoing method embodiments.
The terms "first," "second," "third," "fourth," "1," "2," and the like in the description and in the claims of the present application and in the above-described drawings (if any) are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used are interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in other sequences than illustrated or otherwise described herein.
It should be understood that, although each operation step is indicated by an arrow in the flowchart of the embodiment of the present application, the implementation order of the steps is not limited to the order indicated by the arrow. In some implementation scenarios of the embodiments of the present application, the implementation steps in the flowcharts may be performed in other sequences as desired, unless explicitly stated otherwise herein. In addition, some or all of the steps in each flowchart may include multiple sub-steps or multiple stages based on an actual implementation scenario. Some or all of these sub-steps or stages may be performed at the same time, or each of these sub-steps or stages may be performed at different times, respectively. In a scenario where execution times are different, an execution sequence of the sub-steps or the phases may be flexibly configured according to requirements, which is not limited in the embodiment of the present application.
The foregoing is only an optional implementation manner of a part of implementation scenarios in this application, and it should be noted that, for those skilled in the art, other similar implementation means based on the technical idea of this application are also within the protection scope of the embodiments of this application without departing from the technical idea of this application.
Claims (11)
1. A method of cyclic redundancy check computation, the method comprising:
acquiring at least two data packets;
determining static data and dynamic data in the at least two data packets;
performing CRC calculation on dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and taking the second CRC value as a target CRC calculation result of each data packet;
and the first CRC value is obtained by performing CRC calculation on the static data according to a preset initial value in advance.
2. The cyclic redundancy check calculation method of claim 1, wherein the determining the static data and the dynamic data in the at least two data packets comprises:
and if the same digit number with the same data exists in the at least two data packets, taking the data with the same digit number as static data, and taking the data with the digits other than the same digit number in each data packet as dynamic data of each data packet.
3. The cyclic redundancy check calculation method of claim 2, further comprising:
and if the same number of bits with the same data does not exist in the at least two data packets, performing CRC calculation on the data in the at least two data packets according to a preset first initial value to obtain a target CRC calculation result of each data packet.
4. A data transmission system, characterized in that the data transmission system comprises a sending end and a receiving end, wherein:
the sending end is used for generating at least two data packets and sending the at least two data packets and a first target CRC calculation result of the corresponding data packet to the receiving end;
the receiving end is configured to receive at least two data packets sent by the sending end and a first target CRC calculation result of a corresponding data packet, obtain a second target CRC calculation result of each data packet based on the at least two data packets, and verify whether the first target CRC calculation result of each data packet is consistent with the second target CRC calculation result.
5. The data transmission system according to claim 4, wherein the transmitting end includes a generating module, a first CRC module, and a transmitting module, wherein:
the generating module is used for generating at least two data packets;
the first CRC module is configured to perform CRC calculation on the at least two data packets according to the cyclic redundancy check calculation method according to any one of claims 1 to 3, so as to obtain a first target CRC calculation result of each data packet;
the sending module is configured to send the at least two data packets and the first target CRC calculation result of the corresponding data packet to the receiving end.
6. The data transmission system of claim 4, wherein the receiving end comprises a receiving module, a second CRC module, and a checking module, wherein:
the receiving module is used for receiving at least two data packets sent by the sending end and a first target CRC calculation result of the corresponding data packets;
the second CRC module is configured to perform CRC calculation on the at least two data packets according to the cyclic redundancy check calculation method according to any one of claims 1 to 3, so as to obtain a second target CRC calculation result of each data packet;
and the checking module is used for verifying whether the first target CRC calculation result and the second target CRC calculation result of each data packet are consistent.
7. A cyclic redundancy check calculation apparatus, comprising:
the acquisition module is used for acquiring at least two data packets;
a determining module, configured to determine static data and dynamic data in the at least two data packets;
the calculation module is used for performing CRC calculation on the dynamic data in each data packet according to the first CRC value to obtain a second CRC value, and the second CRC value is used as a target CRC calculation result of each data packet;
and the first CRC value is obtained by performing CRC calculation on the static data according to a preset initial value in advance.
8. The cyclic redundancy check computation apparatus of claim 7, wherein the determining module comprises:
and the data classification module is used for taking the data with the same digit as static data and taking the data with other digits except the data with the same digit in each data packet as dynamic data of each data packet if the data with the same digit is determined to exist in the at least two data packets.
9. The cyclic redundancy check computation apparatus of claim 8, wherein the determining module further comprises:
and the data packet calculation module is used for performing CRC calculation on the data in the at least two data packets according to a preset first initial value to obtain a target CRC calculation result of each data packet if the same number of bits of the same data does not exist in the at least two data packets.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory, wherein the processor executes the computer program to implement the steps of the cyclic redundancy check calculation method of any of claims 1-3.
11. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the cyclic redundancy check calculation method according to any one of claims 1 to 3.
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