CN114023768A - 阵列基板及其制备方法和显示面板 - Google Patents
阵列基板及其制备方法和显示面板 Download PDFInfo
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 29
- 229910052710 silicon Inorganic materials 0.000 claims description 29
- 239000010703 silicon Substances 0.000 claims description 29
- 239000004020 conductor Substances 0.000 claims description 27
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 18
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 18
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- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 claims description 5
- 239000005751 Copper oxide Substances 0.000 claims description 5
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 5
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- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 5
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- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 4
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- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
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- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 230000001706 oxygenating effect Effects 0.000 description 1
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- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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Abstract
本申请公开了一种阵列基板及其制备方法和显示面板,阵列基板包括衬底、有源层、蚀刻保护层、欧姆接触层、源极和漏极,有源层设置于衬底上,蚀刻保护层与欧姆接触层同层设置,且蚀刻保护层位于有源层的本体部上,欧姆接触层位于有源层的第一导通部以及第二导通部上,源极设置于位于有源层的第一导通部上的欧姆接触层上,漏极设置于位于有源层的第二导通部上的欧姆接触层上。本申请通过在有源层的本体部上设置由绝缘材料形成的蚀刻保护层,避免在后续蚀刻相邻膜层时,有源层的本体部受到损伤,进而提高阵列基板的性能。
Description
技术领域
本申请涉及显示技术领域,具体涉及一种阵列基板及其制备方法和显示面板。
背景技术
非晶氧化物薄膜晶体管因其高的迁移率,良好的均匀性,对可见光良好的透过性和低温的制作过程,被广泛应用于各类显示驱动中。非晶氧化物半导体是薄膜晶体管中的一种重要有源层材料,其具有较高的载流子浓度,具备较强的电荷传输能力,可以有效驱动薄膜晶体管器件。但是,在器件的制备过程中,需要膜层需要蚀刻,在蚀刻与有源层的相邻膜层时,会对有源层的本体部造成损伤,影响薄膜晶体管的电性以及稳定性。
发明内容
本申请实施例提供一种阵列基板及其制备方法和显示面板,以解决在阵列基板的制备过程中有源层的本体部受到损伤的问题。
本申请提供一种阵列基板,包括:
衬底;
有源层,所述有源层设置于所述衬底上;
蚀刻保护层和欧姆接触层,所述蚀刻保护层与所述欧姆接触层同层设置,且所述蚀刻保护层位于所述有源层的本体部上,所述欧姆接触层位于所述有源层的第一导通部以及第二导通部上;
源极,所述源极设置于位于所述有源层的第一导通部上的所述欧姆接触层上;以及
漏极,所述漏极设置于位于所述有源层的第二导通部上的所述欧姆接触层上。
可选的,在本申请的一些实施例中,所述有源层包括依次层叠设置的有源部和保护部,所述有源部的迁移率大于所述保护部的迁移率。
可选的,在本申请的一些实施例中,所述欧姆接触层的材料包括导体材料,所述蚀刻保护层的材料包括所述导电材料的氧化物。
可选的,在本申请的一些实施例中,所述欧姆接触层的材料包括硅、Mo、Al、Ti和Cu中的一种或几种组合,所述蚀刻保护层的材料包括氮化硅、氧化钼、氧化铝、氧化钛和氧化铜中的一种或几种组合。
可选的,在本申请的一些实施例中,所述欧姆接触层的材料包括金属或者金属氧化物,所述蚀刻保护层的材料包括硅基绝缘材料。
可选的,在本申请的一些实施例中,所述欧姆接触层的材料包括硅、ITO、Mo、Al、Ti和Cu中的一种或几种组合,所述蚀刻保护层的材料包括氮化硅、氮氧化硅和氮化硅中的一种或几种组合。
相应的,本申请还提供一种阵列基板的制备方法,包括:
提供一衬底;
在所述有源层的本体部上形成蚀刻保护层,在所述有源层的第一导通部以及第二导通部上形成欧姆接触层;以及
在位于所述有源层的第一导通部上的欧姆接触层上形成源极,在位于所述有源层的第二导通部上的欧姆接触层上形成漏极。
可选的,在本申请的一些实施例中,所述在所述有源层的本体部上形成蚀刻保护层,在所述有源层的第一导通部以及第二导通部上形成欧姆接触层的步骤中,包括:
在所述有源层上设置导电材料,对所述导电材料进行图案化处理,位于所述有源层的本体部上的导电材料形成蚀刻保护层,位于所述有源层的第一导通部和第二导通部上的导电材料形成欧姆接触层。
可选的,在本申请的一些实施例中,在位于所述有源层的第一导通部上的欧姆接触层上形成源极,在位于所述有源层的第二导通部上的欧姆接触层上形成漏极。
相应的,本申请还提供一种显示面板,所述显示面板包括如上任一项所述的阵列基板。
本申请公开了一种阵列基板及其制备方法和显示面板,阵列基板包括衬底、有源层、蚀刻保护层、欧姆接触层、源极和漏极,有源层设置于衬底上,蚀刻保护层与欧姆接触层同层设置,且蚀刻保护层位于有源层的本体部上,欧姆接触层位于有源层的第一导通部以及第二导通部上,源极设置于位于有源层的第一导通部上的欧姆接触层上,漏极设置于位于有源层的第二导通部上的欧姆接触层上。本申请通过在有源层的本体部上设置由绝缘材料形成的蚀刻保护层,避免在后续蚀刻膜层时,有源层的本体部受到损伤,并且采用快速氧化技术将蚀刻保护层氧化形成绝缘的蚀刻保护层,使得其可以对下层有源层进行补氧,控制氧空位浓度,同时,保证晶体管的开关性能,提高了阵列基板的稳定性和导电性,进而提高了阵列基板的性能。在有源层上同层设置蚀刻保护层和欧姆接触层,使得阵列基板只需采用四道光罩就可以形成,简化了制备工艺,并降低了成本。
附图说明
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的阵列基板的第一种结构示意图。
图2是本申请实施例提供的阵列基板的第二种结构示意图。
图3是本申请实施例提供的阵列基板的第三种结构示意图。
图4是本申请实施例提供的阵列基板的制备方法的流程示意图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。此外,应当理解的是,此处所描述的具体实施方式仅用于说明和解释本申请,并不用于限制本申请。在本申请中,在未作相反说明的情况下,使用的方位词如“上”和“下”通常是指装置实际使用或工作状态下的上和下,具体为附图中的图面方向;而“内”和“外”则是针对装置的轮廓而言的。在本申请中,“反应”可以为化学反应或物理反应。
本申请实施例提供一种阵列基板及其制备方法和显示面板。阵列基板包括衬底、有源层、蚀刻保护层、源极和漏极,有源层设置于衬底上,蚀刻保护层设置于有源层的本体部上,源极设置于有源层的第一导通部上,漏极设置于有源层的第二导通部上。
本申请通过在有源层的本体部上设置由绝缘材料形成的蚀刻保护层,避免在后续蚀刻膜层时,有源层的本体部受到损伤,同时,保证晶体管的开关性能,进而提高阵列基板的导电性以及稳定性,进而提高阵列基板的性能。
以下分别进行详细说明。
请参阅图1,图1是本申请实施例提供的阵列基板的第一种结构示意图。本申请提供一种阵列基板。在本实施例中,以底栅结构的晶体管为例进行说明。阵列基板10包括衬底100、栅极200、第一栅极绝缘层300、第二栅极绝缘层400、有源层500、欧姆接触层600、蚀刻保护层700、源极800、漏极900、第一保护层1000、第二保护层1100、钝化层1200和像素电极1300。
栅极200设在衬底100上。栅极200的材料包括Mo、Al、Ti和Cu中的一种或几种组合。
第一栅极绝缘层300和第二栅极绝缘层400依次层叠设置于所述衬底100以及所述栅极200上。所述第一栅极绝缘层300和第二栅极绝缘层400的材料均包括氮化硅、氮氧化硅和氧化硅中的一种或几种组合。在本实施例中,第一栅极绝缘层300的材料为氮化硅,第二栅极绝缘层400的材料为氧化硅。
有源层500设置于第二栅极绝缘层400上。有源层500包括本体部和设置于本体部的第一导通部和第二导通部。有源层500为氧化物有源层500。有源层500的材料包括ZnO(氧化锌)、ITZO(铟锡锌氧化物)、ITZTO(铟锡锌锡氧化物)、IZO(铟锡氧化物)、ZTO(锌锡氧化物)和IGZO(铟镓锌氧化物)中的至少一种。在本实施例中,有源层500的材料为IGZO。
蚀刻保护层700设置于有源层500的本体部上。欧姆接触层600设置于有源层500的第一导通部以及有源层500的第二导通部上。欧姆接触层600的材料为导电材料。欧姆接触层600的材料包括导体材料,蚀刻保护层700的材料包括导电材料的氧化物。具体的,欧姆接触层600的材料包括硅、Mo、Al、Ti和Cu中的一种或几种组合,蚀刻保护层700的材料包括氮化硅、氧化钼、氧化铝、氧化钛、氧化铜中的一种或几种组合。如,欧姆接触层600的为硅时,蚀刻保护层700的材料可以为氧化硅,或者,欧姆接触层600的为Ti时,蚀刻保护层700的材料可以为氧化钛,或者,欧姆接触层600的为Cu时,蚀刻保护层700的材料可以为氧化铜等,在本实施例中,欧姆接触层600的材料为N型硅,在本实施例中蚀刻保护层700的材料为氧化硅。蚀刻保护层700采用导电材料的氧化物形成,可以对有源层500进行补氧,控制氧空位浓度,增强阵列基板10的稳定性。
在另一实施例中,欧姆接触层600的材料包括金属或者金属氧化物,蚀刻保护层700的材料包括硅基绝缘材料。具体的,欧姆接触层600的材料包括硅、ITO、Mo、Al、Ti和Cu中的一种或几种组合,蚀刻保护层700的材料包括氮化硅、氮氧化硅和氮化硅中的一种或几种组合。如,欧姆接触层600的材料为ITO时,蚀刻保护层700的材料可以为氮氧化硅,或者,欧姆接触层600的材料为硅时,蚀刻保护层700的材料可以为氮化硅等。
源极800设置在有源层500的第一导通部上的欧姆接触层600。漏极900设置在有源层500第二导通部上的欧姆接触层600,且源极800和漏极900均与蚀刻保护层700接触。
第一保护层1000覆盖第二栅极绝缘层400、蚀刻保护层700、源极800和漏极900。第二保护层1100覆盖第一保护层1000。第一保护层1000和第二保护层1100的材料均包括氮化硅、氮氧化硅和氧化硅中的一种或几种组合。在本实施例中,第一保护层1000的材料为氧化硅,第二保护层1100的材料为氮化硅。
钝化层1200设置在第二保护层1100上。钝化层1200上设置有通孔1201。通孔1201贯穿钝化层1200、第一保护层1000和第二保护层1100以暴露漏极900。
像素电极1300设置于钝化层1200上,并延伸入通孔1201中与漏极900连接。
在本申请中,在有源层500的本体部上设置蚀刻保护层700,避免在形成源极800和漏极900的过程中,源极800和漏极900的蚀刻液对有源层500的本体部造成损伤,进而提高阵列基板10的导电性和稳定性,进而提高了阵列基板10的性能;蚀刻保护层700采用导电材料的氧化物形成,可以对有源层500进行补氧,控制氧空位浓度,同时,保证晶体管的开关性能,增强了阵列基板10的稳定性。蚀刻保护层700和欧姆接触层600同层设置在有源层500,避免源极800和漏极900的蚀刻液对有源层500的本体部造成损伤的同时,提高有源层500与源极800以及漏极900的接触,进而提高阵列基板10的导电性,并简化制备工艺。
请参阅图2,图2是本申请实施例提供的阵列基板10的第二种结构示意图。第二种结构和第一种结构的不同之处在于:
有源层500包括依次层叠设置于衬底100上的有源部510和保护部520。有源部510的迁移率大于保护部520的迁移率。有源部510的材料包括铟(In)或锡(Sn)中的至少一种元素的氧化物为主要成分,并掺杂镓(Ga)、澜(La)、铟(In)、Pr(镨),Nd(钕),Pm(钷),Sm(钐)和Eu(铕)的一种或多种元素的氧化物。保护部520的材料包括镓(Ga)、澜(La)、铟(In)、Pr(镨),Nd(钕),Pm(钷),Sm(钐)和Eu(铕)的一种或多种元素的氧化物。
在本申请中,采用有源部510和保护部520构成有源层500,并将保护部520的迁移率设置为小于有源部510的迁移率,使得保护部可以复用为蚀刻保护层,从而进一步避免本体部在后续蚀刻源极800和漏极900时,有源层500的本体部受到损伤,进而进一步提高阵列基板10的性能。
请参阅图3,图3是本申请实施例提供的阵列基板10的第三种结构示意图。第三种结构与第一种结构的不同之处在于:
第一栅极绝缘层300和栅极200不设置在衬底100和有源层500之间,且没有第二栅极绝缘层、第一保护层和第二保护层,而是将第一栅极绝缘层300和栅极200依次层叠设置于蚀刻保护层700上,源极800和漏极900设置在第二保护层1100上,并通过第二保护层1100的连接孔1101与欧姆接触层600连接。即在本实施例中,以顶栅结构的晶体管为例进行说明。
在本申请中,在有源层500的本体部上设置蚀刻保护层700,避免后续的形成第一栅极绝缘层300的工艺中,其采用的蚀刻液对有源层500的本体部的造成损伤,进而提高阵列基板10的性能。
本申请还提供一种显示面板,显示面板包括本申请所提供的阵列基板10。
本申请还提供一种阵列基板10的制备方法,包括:
B11、提供一衬底。
B12、在衬底上形成有源层。
B13、在有源层的本体部上形成蚀刻保护层。
B14、在有源层的第一导通部上形成源极,在有源层的第二导通部上形成漏极。
在本申请中,在有源层500本体部上形成蚀刻保护层700,避免在后续膜层的蚀刻工艺中,蚀刻液对有源层500的本体部的损伤,进而提高阵列基板10的性能。
以下进行详细的说明。
实施例1
请参阅图1和图4,图4是本申请实施例提供的阵列基板的制备方法的流程示意图。
B11、提供一衬底。
在衬底100上设置栅极200的材料,对其进行图案化处理形成栅极200。栅极200的材料包括Mo、Al、Ti和Cu中的一种或几种组合。在本实施例中,栅极200的材料为Al。
在衬底100上依次层叠形成第一栅极绝缘层300和第二栅极绝缘层400。所述第一栅极绝缘层300和第二栅极绝缘层400的材料均包括氮化硅、氮氧化硅和氧化硅中的一种或几种组合。在本实施例中,第一栅极绝缘层300的材料为氮化硅,第二栅极绝缘层400的材料为氧化硅。
B12、在衬底上形成有源层。
在第二栅极绝缘层400上设置有源层500的材料,对其进行图案化处理形成有源层500。有源层500包括本体部和设置于本体部的第一导通部和第二导通部。有源层500为氧化物有源层500。有源层500的材料包括ZnO(氧化锌)、ITZO(铟锡锌氧化物)、ITZTO(铟锡锌锡氧化物)、IZO(铟锡氧化物)、ZTO(锌锡氧化物)和IGZO(铟镓锌氧化物)中的至少一种。在本实施例中,有源层500的材料为IGZO。
B13、在有源层的本体部上形成蚀刻保护层,在有源层的第一导通部以及第二导通部上形成欧姆接触层。
在有源层500以及第二栅极绝缘层400上设置导电材料,对所述导电材料进行图案化处理,位于有源层500的第一导通部以及第二导通部上的导电材料形成欧姆接触层600,位于有源层500的本体部上的导电材料形成蚀刻保护层700。导电材料包括硅、ITO、Mo、Al、Ti和Cu中的一种或几种组合。在本实施例中,以导电材料为N型硅为例进行说明。
B14、在位于有源层的第一导通部上的欧姆接触层上形成源极,在位于有源层的第二导通部上的欧姆接触层上形成漏极。
在第二栅极绝缘层400以及欧姆接触层600上设置源漏极900材料,采用铜酸蚀刻源漏极900材料,形成位于有源层500的第一导通部的源极800以及位于有源层500的第二导通部的漏极900。
蚀刻形成源极800和漏极900之后,在保留光阻条件下,利用具有强氧化作用的硝酸和硫酸混合液,处理有源层500的本体部上的N型硅,使其氧化为SiO2,从而形成绝缘的蚀刻保护层700。
在另一实施例中,蚀刻形成源极800和漏极900之后,在保留光阻条件下,通入强氧化性气体,在等离子体条件下将N型硅氧化,使其氧化为SiO2,从而形成绝缘的蚀刻保护层700。其中,强氧化性气体包括N2O、NO2、O2和O3中的一种或几种组合。
在本实施例中,欧姆接触层600的材料包括导体材料,蚀刻保护层的材料包括导电材料的氧化物。
具体的,欧姆接触层的材料包括硅、Mo、Al、Ti和Cu中的一种或几种组合,蚀刻保护层的材料包括氮化硅、氧化钼、氧化铝、氧化钛、氧化铜中的一种或几种组合。
在第二栅极绝缘层400、源极800、漏极900和蚀刻保护层700上依次层叠形成第一保护层1000、第二保护层1100和钝化层1200。钝化层1200上设置有通孔1201。通孔1201贯穿钝化层1200、第一保护层1000和第二保护层1100以暴露漏极900。
在钝化层1200上形成像素电极1300,并延伸入通孔1201中与漏极900连接。
在本申请中,在有源层500的本体部上设置蚀刻保护层700,从而避免有源层500的本体部损伤,并且采用快速氧化技术将蚀刻保护层700氧化形成绝缘的蚀刻保护层700,使得其可以对下层有源层500进行补氧,控制氧空位浓度,同时,保证晶体管的开关性能,提高了阵列基板10的稳定性和导电性,进而提高了阵列基板10的性能。在有源层500上同层设置蚀刻保护层700和欧姆接触层600,使得阵列基板10只需采用四道光罩就可以形成,简化了制备工艺,并降低了成本。
实施例2
请继续参阅图1。需要说明的是实施例2与实施例1的不同之处在于:
形成有源层500的步骤之后,直接在有源层500先设置蚀刻保护层700的材料,蚀刻保护层700的材料可以为导电材料的氧化物,如氧化硅;然后,对导电材料的氧化物进行图案化处理,形成蚀刻保护层700;然后,再设置导电材料形成欧姆接触层600,如硅等。或者欧姆接触层600的材料为金属或者金属氧化物,蚀刻保护层700的材料为硅基绝缘材料。如,欧姆接触层600的材料为ITO时,蚀刻保护层700的材料可以为氮氧化硅,或者,欧姆接触层600的材料为硅时,蚀刻保护层700的材料可以为氮化硅等。其它步骤与实施例1相同,此处不再赘述。
本申请提供一种阵列基板10及其制备方法和显示面板,在有源层500的本体部上设置蚀刻保护层700,避免在形成源极800和漏极900的过程中,源极800和漏极900的蚀刻液对有源层500的本体部造成损伤,进而提高阵列基板10的导电性和稳定性,进而提高了阵列基板10的性能;蚀刻保护层700和欧姆接触层600同层设置在有源层500,避免蚀刻源极800和漏极900的蚀刻液或者蚀刻第一栅极绝缘层300的蚀刻液对有源层500的本体部造成损伤的同时,提高有源层500与源极800以及漏极900的接触,进而提高阵列基板10的导电性,且使得阵列基板10采用四道光罩就可以形成,简化了制备工艺,并降低了成本。
以上对本申请实施例所提供的阵列基板及其制备方法和显示面板进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的方法及其核心思想;同时,对于本领域的技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。
Claims (10)
1.一种阵列基板,其特征在于,包括:
衬底;
有源层,所述有源层设置于所述衬底上;
蚀刻保护层和欧姆接触层,所述蚀刻保护层与所述欧姆接触层同层设置,且所述蚀刻保护层位于所述有源层的本体部上,所述欧姆接触层位于所述有源层的第一导通部以及第二导通部上;
源极,所述源极设置于位于所述有源层的第一导通部上的所述欧姆接触层上;以及
漏极,所述漏极设置于位于所述有源层的第二导通部上的所述欧姆接触层上。
2.根据权利要求1所述的阵列基板,其特征在于,所述有源层包括依次层叠设置的有源部和保护部,所述有源部的迁移率大于所述保护部的迁移率。
3.根据权利要求1所述的阵列基板,其特征在于,所述欧姆接触层的材料包括导体材料,所述蚀刻保护层的材料包括所述导电材料的氧化物。
4.根据权利要求3所述的阵列基板,其特征在于,所述欧姆接触层的材料包括硅、Mo、Al、Ti和Cu中的一种或几种组合,所述蚀刻保护层的材料包括氮化硅、氧化钼、氧化铝、氧化钛和氧化铜中的一种或几种组合。
5.根据权利要求1所述的阵列基板,其特征在于,所述欧姆接触层的材料包括金属或者金属氧化物,所述蚀刻保护层的材料包括硅基绝缘材料。
6.根据权利要求5所述的阵列基板,其特征在于,所述欧姆接触层的材料包括硅、ITO、Mo、Al、Ti和Cu中的一种或几种组合,所述蚀刻保护层的材料包括氮化硅、氮氧化硅和氮化硅中的一种或几种组合。
7.一种阵列基板的制备方法,其特征在于,包括:
提供一衬底;
在所述衬底上形成有源层;
在所述有源层的本体部上形成蚀刻保护层,在所述有源层的第一导通部以及第二导通部上形成欧姆接触层;以及
在位于所述有源层的第一导通部上的欧姆接触层上形成源极,在位于所述有源层的第二导通部上的欧姆接触层上形成漏极。
8.根据权利要求7所述的阵列基板的制备方法,其特征在于,所述在所述有源层的本体部上形成蚀刻保护层,在所述有源层的第一导通部以及第二导通部上形成欧姆接触层的步骤中,包括:
在所述有源层上设置导电材料,对所述导电材料进行图案化处理,位于所述有源层的本体部上的导电材料形成蚀刻保护层,位于所述有源层的第一导通部和第二导通部上的导电材料形成欧姆接触层。
9.根据权利要求7所述的阵列基板的制备方法,其特征在于,所述在位于所述有源层的第一导通部上的欧姆接触层上形成源极,在位于所述有源层的第二导通部上的欧姆接触层上形成漏极的步骤之后,还包括:
对所述蚀刻保护层进行氧化处理,形成绝缘的蚀刻保护层。
10.一种显示面板,其特征在于,所述显示面板包括如权利要求1-6任一项所述的阵列基板。
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WO2023201801A1 (zh) * | 2022-04-20 | 2023-10-26 | 广州华星光电半导体显示技术有限公司 | 显示面板和显示装置 |
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WO2023201801A1 (zh) * | 2022-04-20 | 2023-10-26 | 广州华星光电半导体显示技术有限公司 | 显示面板和显示装置 |
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