CN113990268A - 阵列基板、显示面板及显示终端 - Google Patents
阵列基板、显示面板及显示终端 Download PDFInfo
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Abstract
本发明提供一种阵列基板、显示面板及显示终端,阵列基板包括多条扫描线和与多条扫描线交叉设置的多条数据线,多条扫描线和多条数据线围成多个像素单元;每一像素单元包括公共电极层;阵列基板还包括屏蔽连接线,在数据线的延伸方向上,相邻的两个像素单元内的公共电极层通过屏蔽连接线电性连接;本发明将相邻的公共电极层通过屏蔽连接线电性连接,形成公共电极层交联网络,公共电极层的电压就等于屏蔽连接线上的电压,可以进一步稳定公共电极层的电压,降低水平串扰,且无需额外增设金属线,不会损失开口率。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板、显示面板及显示终端。
背景技术
液晶显示器(Liquid Crystal Display,LCD)具有机身薄、省电、无辐射等众多优点,得到了广泛地应用,例如:液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等,在平板显示领域中占主导地位。液晶显示器包括阵列基板、彩膜基板以及位于阵列基板和彩膜基板之间的液晶层,阵列基板上设置有多个公共电极层(Com),多个公共电极层在面内并没有形成交联网络,公共电极层的电压容易受到Data(数据线)信号的耦合(couple),这是显示画面发生水平串扰的直接原因之一。
为了改善串扰,一种公共电极层网络(Mesh Com)的设计产生了,它通过构建面内公共电极层网络来稳定信号,从而减小Data信号对公共电极层的电压的耦合,降低显示画面的水平串扰。目前,常见的Mesh Com是通过额外增设的金属线来连通,金属线与数据线同层设置,相邻的两个公共电极层的信号分别通过过孔与金属线的两端电连接,从而在面内纵向连通;此外,公共电极层本身在面外是由同一个信号输入,至此整个Mesh Com都是通路。相比于未在面内形成Mesh Com的结构,通过金属线连通能更好的稳住公共电极层的电压。但额外增设的金属线会损失阵列基板的开口率,且稳压能力较弱。故,有必要改善这一缺陷。
发明内容
本发明实施例提供一种阵列基板,用于解决现有技术的阵列基板的公共电极层的电压不稳定,容易造成显示画面水平串扰,若采用额外增设的金属线连通,会导致开口率下降,且稳压能力较弱的技术问题。
本发明实施例提供一种阵列基板,包括多条扫描线和与所述多条扫描线交叉设置的多条数据线,所述多条扫描线和所述多条数据线围成多个像素单元;每一所述像素单元包括公共电极层;其中,所述阵列基板还包括屏蔽连接线,在所述数据线的延伸方向上,相邻的两个所述像素单元内的所述公共电极层通过所述屏蔽连接线电性连接。
在本发明实施例提供的阵列基板中,每一所述像素单元包括像素电极层,所述屏蔽连接线与所述像素电极层同层设置。
在本发明实施例提供的阵列基板中,所述阵列基板还包括与所述多条数据线平行设置的多条屏蔽电压线,每一所述屏蔽电压线位于相邻的两个所述像素单元之间;其中,所述多条屏蔽电压线与所述屏蔽连接线同层设置,所述屏蔽连接线的两端分别与相邻的两条所述屏蔽电压线电性连接。
在本发明实施例提供的阵列基板中,所述屏蔽电压线传输的电信号为恒压直流信号,所述恒压直流信号大于或等于6伏且小于或等于8伏。
在本发明实施例提供的阵列基板中,所述屏蔽连接线包括第一连接线和第二连接线,所述第一连接线与所述数据线平行设置,所述第二连接线与所述扫描线平行设置;所述第一连接线的第一端通过第一过孔与一所述公共电极层电性连接,所述第一连接线的第二端与所述第二连接线的第一端电性连接;所述第二连接线的第二端通过第二过孔与另一所述公共电极层电性连接。
在本发明实施例提供的阵列基板中,每一所述公共电极层包括第一接触端子和第二接触端子,所述公共电极层分别通过所述第一接触端子和所述第二接触端子与所述公共电极层两侧的所述屏蔽连接线电性连接;其中,在同一个所述公共电极层内,所述第一接触端子与所述第二接触端子沿所述公共电极层的对角设置或沿所述数据线的延伸方向设置。
在本发明实施例提供的阵列基板中,在所述阵列基板的俯视图方向上,所述像素电极层的正投影位于所述公共电极层的正投影内;所述公共电极层与所述扫描线同层设置。
在本发明实施例提供的阵列基板中,在同一个所述像素单元内,所述公共电极层与所述像素电极层之间形成存储电容。
本发明实施例提供一种显示面板,包括上述的阵列基板以及彩膜基板,所述彩膜基板与所述阵列基板相对设置。
本发明实施例还提供一种显示终端,包括终端主体和上述的显示面板,所述终端主体与所述显示面板组合为一体。
有益效果:本发明实施例提供的一种阵列基板,包括多条扫描线和与多条扫描线交叉设置的多条数据线,多条扫描线和多条数据线围成多个像素单元;每一像素单元包括公共电极层;其中,阵列基板还包括屏蔽连接线,在数据线的延伸方向上,相邻的两个像素单元内的公共电极层通过屏蔽连接线电性连接;本发明将相邻的公共电极层通过屏蔽连接线电性连接,形成公共电极层交联网络,公共电极层的电压就等于屏蔽连接线上的电压,可以进一步稳定公共电极层的电压,降低水平串扰,且无需额外增设金属线,不会损失开口率。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍。
图1是本发明实施例提供的阵列基板的基本结构示意图。
图2是图1中A处的放大图。
图3是图2中B处的膜层结构示意图。
图4是本发明实施例提供的另一阵列基板的基本结构示意图。
图5是本发明实施例提供的又一阵列基板的基本结构示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述。在附图中,为了清晰及便于理解和描述,附图中绘示的组件的尺寸和厚度并未按照比例。
如图1和图2所示,分别为本发明实施例提供的阵列基板的基本结构示意图和图1中A处的放大图,所述阵列基板包括多条扫描线Scan和与所述多条扫描线Scan交叉设置的多条数据线Data,所述多条扫描线Scan和所述多条数据线Data围成多个像素单元10;每一所述像素单元10包括公共电极层101;其中,所述阵列基板还包括屏蔽连接线20,在所述数据线Data的延伸方向上,相邻的两个所述像素单元10内的所述公共电极层101通过所述屏蔽连接线20电性连接。
可以理解的是,阵列基板侧的多个公共电极层101分离设置,单个公共电极层101的电压容易受数据线Data的耦合,不稳定,容易造成显示画面水平串扰,若额外增设金属线将多个公共电极层101连通,会导致阵列基板的开口率下降,而且稳压能力较弱。本发明将相邻的公共电极层101通过屏蔽连接线20电性连接,形成公共电极层101交联网络,公共电极层101的电压就等于屏蔽连接线20上的电压,可以进一步稳定公共电极层101的电压,降低水平串扰,且无需额外增设金属线,不会损失开口率。
在一种实施例中,每一所述像素单元10包括像素电极层102,所述屏蔽连接线20与所述像素电极层102同层设置。需要说明的是,本发明实施例提供的屏蔽连接线20是由透明导电材料制备而成,所述屏蔽连接线20可以与像素电极层102同制程制备,不会额外增加工序步骤和生产成本。
在一种实施例中,所述像素电极层102为四畴像素电极结构,包括主干电极和分支电极,主干电极和分支电极组合为“米”字型。在其他实施例中,所述像素电极层102还可以为八畴像素电极结构或其他常见的电极结构。
在一种实施例中,所述阵列基板还包括与所述多条数据线Data平行设置的多条屏蔽电压线30,每一所述屏蔽电压线30位于相邻的两个所述像素单元10之间;其中,所述多条屏蔽电压线30与所述屏蔽连接线20同层设置,所述屏蔽连接线20的两端分别与相邻的两条所述屏蔽电压线30电性连接。需要说明的是,所述屏蔽电压线30用于屏蔽数据线Data的电压,避免数据线Data的电压变化对像素电极层102造成干扰。在本实施例中,在阵列基板的俯视图方向上,所述屏蔽电压线30位于数据线Data和像素电极层102之间。在其他实施例中,在阵列基板的俯视图方向上,所述屏蔽电压线30与数据线Data有重合,可以缩小两个像素单元10之间的间距,提高阵列基板的分辨率。
在一种实施例中,所述屏蔽电压线30传输的电信号为恒压直流信号,所述恒压直流信号大于或等于6伏且小于或等于8伏。可以理解的是,所述屏蔽连接线20的两端分别与相邻的两条所述屏蔽电压线30电性连接,即所述屏蔽连接线20上的电压值与所述屏蔽电压线30上的电压值相等,而多个所述公共电极层101通过所述屏蔽连接线20电性连接,即多个所述公共电极层101上的电压值也为6伏至8伏的恒压直流信号,相比之前单个公共电极层101分离设置或通过额外增设的金属线连通的结构而言,通过屏蔽连接线20电性连接之后的电压值更加稳定,不容易受到数据线Data的干扰。
在一种实施例中,所述屏蔽连接线20包括第一连接线201和第二连接线202,所述第一连接线201与所述数据线Data平行设置,所述第二连接线202与所述扫描线Scan平行设置;所述第一连接线201的第一端通过第一过孔40与一所述公共电极层101电性连接,所述第一连接线201的第二端与所述第二连接线202的第一端电性连接;所述第二连接线202的第二端通过第二过孔50与另一所述公共电极层101电性连接。可以理解的是,图2中上方的公共电极层101的电信号是通过第一过孔40传输至第一连接线201的第一端,然后经过第二连接线202的第二端传输至第二过孔50,再通过第二过孔50传输给下方的公共电极层101,以实现面内多个公共电极层101的纵向连通;由于面外的公共电极层101均由同一个信号输入,因此可形成公共电极层101交联网络。
在一种实施例中,在阵列基板的俯视图方向上,所述第二连接线202与所述扫描线Scan有重合,可以缩小两个像素单元10之间的间距,提高阵列基板的分辨率。
在一种实施例中,所述阵列基板还包括薄膜晶体管B,请参阅图3,为图2中B处的膜层结构示意图,所述薄膜晶体管B包括栅极层15、栅极绝缘层12、有源层16、层间绝缘层13、源极层17以及漏极层18。其中,栅极层15位于衬底层11上;栅极绝缘层12位于栅极层15上(本实施例以底栅结构为例进行说明,在其他实施例中,还可以为顶栅结构);有源层16位于栅极绝缘层12上;层间绝缘层13位于有源层16上;源极层17和漏极层18位于层间绝缘层13上,且分别通过接触孔与有源层16的两端电性连接;平坦化层14位于源极层17和漏极层18上;像素电极层102通过第三过孔60与漏极层18电性连接。
具体的,结合图2和图3,薄膜晶体管B的栅极层15与扫描线Scan电性连接,薄膜晶体管B的源极层17与数据线Data电性连接。当扫描线Scan控制栅极层15的电压以打开薄膜晶体管B时,数据线Data上的电信号通过薄膜晶体管B经由第三过孔60进入到像素电极层102,像素电极层102与彩膜基板上的公共电极之间形成电场,以控制液晶偏转的角度。
在一种实施例中,在阵列基板的俯视图方向上,所述第二连接线202与所述薄膜晶体管B有重合,可以缩小两个像素单元10之间的间距,提高阵列基板的分辨率。
接下来,请参阅图4,为本发明实施例提供的另一阵列基板的基本结构示意图,所述阵列基板包括多条扫描线Scan和与所述多条扫描线Scan交叉设置的多条数据线Data,所述多条扫描线Scan和所述多条数据线Data围成多个像素单元10(如图1);每一所述像素单元10包括公共电极层101;其中,所述阵列基板还包括屏蔽连接线20,在所述数据线Data的延伸方向上,相邻的两个所述像素单元10内的所述公共电极层101通过所述屏蔽连接线20电性连接。
在本实施例中,每一所述公共电极层101包括第一接触端子1011和第二接触端子1012,所述公共电极层101分别通过所述第一接触端子1011和所述第二接触端子1012与所述公共电极层101两侧的所述屏蔽连接线20电性连接;其中,在同一个所述公共电极层101内,所述第一接触端子1011与所述第二接触端子1012沿所述公共电极层101的对角设置(如图4),使得像素电极层102的电场分布更加均匀。
需要说明的是,相邻的两个所述公共电极层101上的第一接触端子1011和第二接触端子1012对角设置,以使得屏蔽连接线20的两端分别与两侧的屏蔽电压线30电性连接。
在一种实施例中,在所述阵列基板的俯视图方向上,所述像素电极层102的正投影位于所述公共电极层101的正投影内;所述公共电极层101与所述扫描线Scan同层设置。可以理解的是,本实施例的设置方式可增大像素电极层102与公共电极层101之间的重叠面积。
在一种实施例中,在同一个所述像素单元10内,所述公共电极层101与所述像素电极层102之间形成存储电容。当扫描线Scan控制薄膜晶体管B开启时,数据线Data通过薄膜晶体管B给像素电极层102充电,充的电荷储存在所述公共电极层101与所述像素电极层102之间形成的存储电容内,重叠面积越大,储存的电荷量就越大。
接下来,请参阅图5,为本发明实施例提供的又一阵列基板的基本结构示意图,所述阵列基板包括多条扫描线Scan和与所述多条扫描线Scan交叉设置的多条数据线Data,所述多条扫描线Scan和所述多条数据线Data围成多个像素单元10(如图1);每一所述像素单元10包括公共电极层101;其中,所述阵列基板还包括屏蔽连接线20,在所述数据线Data的延伸方向上,相邻的两个所述像素单元10内的所述公共电极层101通过所述屏蔽连接线20电性连接。
在本实施例中,每一所述公共电极层101包括第一接触端子1011和第二接触端子1012,所述公共电极层101分别通过所述第一接触端子1011和所述第二接触端子1012与所述公共电极层101两侧的所述屏蔽连接线20电性连接;其中,在同一个所述公共电极层101内,所述第一接触端子1011与所述第二接触端子1012沿所述数据线Data的延伸方向设置。可以理解的是,在同一个所述公共电极层101内,所述第一接触端子1011和所述第二接触端子1012均设置在所述公共电极层101的左侧或右侧,且左侧、右侧交替排布。具体的,将同一个公共电极层101内的两个接触端子设置在同侧,可以便于打孔工艺制作第一过孔40和第二过孔50。
需要说明的是,相邻的两个所述公共电极层101上的第一接触端子1011和第二接触端子1012对角设置,以使得屏蔽连接线20的两端分别与两侧的屏蔽电压线30电性连接。
本发明实施例提供一种显示面板,包括上述的阵列基板以及彩膜基板,所述彩膜基板与所述阵列基板相对设置。所述阵列基板的具体结构请参阅图1至图5及相关说明,此处不再赘述。
在一种实施例中,所述彩膜基板上设置有公共电极,所述公共电极的电压与所述屏蔽电压线30上的电压相等,以避免像素电极层102之外的区域(非发光区)产生电场,避免非发光区的液晶发生偏转,可以实现非发光区的遮光效果。
本发明实施例还提供一种显示终端,包括终端主体和上述的显示面板,所述终端主体与所述显示面板组合为一体。本发明实施例提供的显示终端可以为:手机、平板电脑、笔记本电脑、数码相机、导航仪等具有显示功能的产品或部件。
综上所述,本发明实施例提供的一种阵列基板,包括多条扫描线和与多条扫描线交叉设置的多条数据线,多条扫描线和多条数据线围成多个像素单元;每一像素单元包括公共电极层;其中,阵列基板还包括屏蔽连接线,在数据线的延伸方向上,相邻的两个像素单元内的公共电极层通过屏蔽连接线电性连接;本发明将相邻的公共电极层通过屏蔽连接线电性连接,形成公共电极层交联网络,公共电极层的电压就等于屏蔽连接线上的电压,可以进一步稳定公共电极层的电压,降低水平串扰,且无需额外增设金属线,不会损失开口率,解决了现有技术的阵列基板的公共电极层的电压不稳定,容易造成显示画面水平串扰,若采用额外增设的金属线连通,会导致开口率下降,且稳压能力较弱的技术问题。
以上对本发明实施例所提供的一种阵列基板、显示面板及显示终端进行了详细介绍。应理解,本文所述的示例性实施方式应仅被认为是描述性的,用于帮助理解本发明的方法及其核心思想,而并不用于限制本发明。
Claims (10)
1.一种阵列基板,其特征在于,包括多条扫描线和与所述多条扫描线交叉设置的多条数据线,所述多条扫描线和所述多条数据线围成多个像素单元;每一所述像素单元包括公共电极层;
其中,所述阵列基板还包括屏蔽连接线,在所述数据线的延伸方向上,相邻的两个所述像素单元内的所述公共电极层通过所述屏蔽连接线电性连接。
2.如权利要求1所述的阵列基板,其特征在于,每一所述像素单元包括像素电极层,所述屏蔽连接线与所述像素电极层同层设置。
3.如权利要求2所述的阵列基板,其特征在于,所述阵列基板还包括与所述多条数据线平行设置的多条屏蔽电压线,每一所述屏蔽电压线位于相邻的两个所述像素单元之间;
其中,所述多条屏蔽电压线与所述屏蔽连接线同层设置,所述屏蔽连接线的两端分别与相邻的两条所述屏蔽电压线电性连接。
4.如权利要求3所述的阵列基板,其特征在于,所述屏蔽电压线传输的电信号为恒压直流信号,所述恒压直流信号大于或等于6伏且小于或等于8伏。
5.如权利要求2所述的阵列基板,其特征在于,所述屏蔽连接线包括第一连接线和第二连接线,所述第一连接线与所述数据线平行设置,所述第二连接线与所述扫描线平行设置;
所述第一连接线的第一端通过第一过孔与一所述公共电极层电性连接,所述第一连接线的第二端与所述第二连接线的第一端电性连接;所述第二连接线的第二端通过第二过孔与另一所述公共电极层电性连接。
6.如权利要求2所述的阵列基板,其特征在于,每一所述公共电极层包括第一接触端子和第二接触端子,所述公共电极层分别通过所述第一接触端子和所述第二接触端子与所述公共电极层两侧的所述屏蔽连接线电性连接;
其中,在同一个所述公共电极层内,所述第一接触端子与所述第二接触端子沿所述公共电极层的对角设置或沿所述数据线的延伸方向设置。
7.如权利要求2所述的阵列基板,其特征在于,在所述阵列基板的俯视图方向上,所述像素电极层的正投影位于所述公共电极层的正投影内;所述公共电极层与所述扫描线同层设置。
8.如权利要求2所述的阵列基板,其特征在于,在同一个所述像素单元内,所述公共电极层与所述像素电极层之间形成存储电容。
9.一种显示面板,其特征在于,包括如权利要求1至8任一项所述的阵列基板以及彩膜基板,所述彩膜基板与所述阵列基板相对设置。
10.一种显示终端,其特征在于,包括终端主体和如权利要求9所述的显示面板,所述终端主体与所述显示面板组合为一体。
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CN202111301756.6A CN113990268A (zh) | 2021-11-04 | 2021-11-04 | 阵列基板、显示面板及显示终端 |
US17/618,561 US20240061296A1 (en) | 2021-11-04 | 2021-11-12 | Array substrate, display panel, and display terminal |
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JP2013178567A (ja) * | 2013-05-14 | 2013-09-09 | Nlt Technologies Ltd | 液晶表示素子及びそれを用いた画像表示装置 |
CN107490912A (zh) * | 2017-09-06 | 2017-12-19 | 深圳市华星光电技术有限公司 | 一种阵列基板、显示面板及显示装置 |
CN209859512U (zh) * | 2019-05-24 | 2019-12-27 | 京东方科技集团股份有限公司 | 一种阵列基板和显示面板 |
CN114512523A (zh) * | 2022-02-15 | 2022-05-17 | 深圳市华星光电半导体显示技术有限公司 | 阵列基板及显示面板 |
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CN107490912A (zh) * | 2017-09-06 | 2017-12-19 | 深圳市华星光电技术有限公司 | 一种阵列基板、显示面板及显示装置 |
CN209859512U (zh) * | 2019-05-24 | 2019-12-27 | 京东方科技集团股份有限公司 | 一种阵列基板和显示面板 |
CN114512523A (zh) * | 2022-02-15 | 2022-05-17 | 深圳市华星光电半导体显示技术有限公司 | 阵列基板及显示面板 |
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