CN113611756B - N-type TOPCon battery and preparation method thereof - Google Patents
N-type TOPCon battery and preparation method thereof Download PDFInfo
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- CN113611756B CN113611756B CN202110915346.4A CN202110915346A CN113611756B CN 113611756 B CN113611756 B CN 113611756B CN 202110915346 A CN202110915346 A CN 202110915346A CN 113611756 B CN113611756 B CN 113611756B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 claims abstract description 96
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 71
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 63
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 63
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 56
- 239000010703 silicon Substances 0.000 claims abstract description 56
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 55
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 42
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 42
- 230000003647 oxidation Effects 0.000 claims abstract description 37
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 229910052796 boron Inorganic materials 0.000 claims abstract description 32
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims abstract description 31
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 30
- 230000005641 tunneling Effects 0.000 claims abstract description 28
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 27
- 238000009792 diffusion process Methods 0.000 claims abstract description 25
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 23
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 238000010926 purge Methods 0.000 claims description 14
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 11
- 238000000231 atomic layer deposition Methods 0.000 claims description 11
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims 1
- 238000002161 passivation Methods 0.000 abstract description 28
- 230000000694 effects Effects 0.000 abstract description 12
- 235000012431 wafers Nutrition 0.000 description 17
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 16
- 229920005591 polysilicon Polymers 0.000 description 15
- 238000005530 etching Methods 0.000 description 14
- 229910021417 amorphous silicon Inorganic materials 0.000 description 12
- 239000003513 alkali Substances 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 9
- 238000005498 polishing Methods 0.000 description 9
- 238000005406 washing Methods 0.000 description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- 239000000654 additive Substances 0.000 description 6
- 230000000996 additive effect Effects 0.000 description 6
- 238000000137 annealing Methods 0.000 description 5
- 238000011065 in-situ storage Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 239000002253 acid Substances 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- 238000005245 sintering Methods 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910002796 Si–Al Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000005554 pickling Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000009423 ventilation Methods 0.000 description 1
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- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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Abstract
The embodiment of the application provides an N-type TOPCon cell and a preparation method thereof, and relates to the field of photovoltaic solar cells. The N-type TOPCon battery comprises a silicon substrate, wherein a boron diffusion layer, a front-side aluminum oxide layer and a front-side silicon nitride layer are arranged on the front side of the silicon substrate from inside to outside, and a tunneling oxide layer, a doped polycrystalline silicon layer, a back-side silicon oxide layer, a back-side silicon nitride layer and a back-side aluminum oxide layer are arranged on the back side of the silicon substrate from inside to outside. The preparation method comprises the steps of forming a boron diffusion layer on the front surface of a silicon substrate, and sequentially forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back surface; preparing a back silicon oxide layer and a back silicon nitride layer on the doped polycrystalline silicon layer in sequence by adopting a method combining an ozone oxidation method and a plasma chemical vapor deposition method; simultaneously depositing aluminum oxide on the boron diffusion layer and the back silicon nitride layer to respectively form a front aluminum oxide layer and a back aluminum oxide layer; and forming a front silicon nitride layer. The preparation method has the advantages of simple process, good passivation effect and high battery efficiency.
Description
Technical Field
The application relates to the field of photovoltaic solar cells, in particular to an N-type TOPCon cell and a preparation method thereof.
Background
The passivation Contact solar cell is a currently popular technology in the photovoltaic industry, and the main result is an N-type TOPCon cell adopting a TOPCon (Tunnel Oxide Passivated Contact) technology, wherein the TOPCon technology is to generate an ultrathin tunnelable Oxide layer and a highly doped polysilicon layer on the surface of the cell. In particular, in recent years, various large photovoltaic companies and equipment manufacturers have been invested in the technology, so that the N-type TOPCon battery has been rapidly developed, and the mass production is on the day. In order to realize the industrialization of the N-type TOPCon battery, the continuous improvement of the battery efficiency becomes a research target of various large enterprises, and the optimization of the passivation effect of the battery becomes an important part for improving the battery efficiency.
At present, due to the limitation of a preparation process of a passivation film, some N-type TOPCon batteries are easy to prepare double-sided passivation films, so that aluminum oxide layers are directly prepared on the front side and the back side of the battery to serve as the passivation films, the aluminum oxide layer on the back side is in contact with silicon, a large amount of negative fixed charges can be generated at an interface, and the field passivation of the back side is influenced. In addition, since thermal oxidation is required for preparing the silicon oxide film, experimental data show that the high temperature during thermal oxidation damages the N-type TOPCon cell and causes the cell efficiency to be low, and therefore, many TOPCon cells can be prepared by eliminating the silicon oxide film as a passivation film or by adopting other complicated processes.
Therefore, a scheme for designing and preparing a passivation film of the N-type TOPCon battery, which has the advantages of simple and convenient process, easy realization and good passivation effect, is needed.
Disclosure of Invention
The embodiment of the application aims to provide an N-type TOPCon battery and a preparation method thereof, and the N-type TOPCon battery is simple in process, good in passivation effect and high in battery efficiency.
In a first aspect, an embodiment of the present application provides an N-type TOPCon cell, which includes a silicon substrate, a boron diffusion layer, a front-side aluminum oxide layer, and a front-side silicon nitride layer disposed from inside to outside on a front surface of the silicon substrate, and a tunneling oxide layer, a doped polysilicon layer, a back-side silicon oxide layer, a back-side silicon nitride layer, and a back-side aluminum oxide layer disposed from inside to outside on a back surface of the silicon substrate.
In the technical scheme, the front aluminum oxide layer and the front silicon nitride layer form a front passivation film, and the tunneling oxide layer, the back silicon nitride layer and the back aluminum oxide layer form a back passivation film. The front-side aluminum oxide layer and the front-side silicon nitride layer are combined together, so that a good front-side passivation effect can be achieved, and particularly, the aluminum oxide is in contact with the silicon substrate, so that the hanging unsaturated bonds on the surface of the silicon substrate can be reduced, and the electron hole pair recombination can be reduced; the tunneling oxide layer, the back silicon nitride layer and the back aluminum oxide layer are combined together, so that a better back passivation effect can be achieved, and particularly, the silicon oxide layer and the silicon nitride layer are combined to isolate poly silicon and aluminum oxide in the tunneling oxide layer, so that Si-Al is prevented from being formed 2 O 3 The reverse effect of the aluminum oxide layer on the back surface on passivation is eliminated, so that the formed N-type TOPCon battery has good passivation effect and high battery efficiency.
In one possible implementation, the thickness of the back side silicon oxide layer is 1-3 nm;
and/or the thickness of the back side silicon nitride layer is 70-100 nm;
and/or the thickness of the back alumina layer is 3-7 nm.
In one possible implementation, the thickness of the front side alumina layer is 3-7 nm;
and/or the thickness of the front silicon nitride layer is 70-100 nm.
In one possible implementation, the depth of the boron diffusion layer is 700-;
and/or the thickness of the tunneling oxide layer is 0.5-3 nm.
And/or the thickness of the doped polysilicon layer is 40-150 nm.
In a second aspect, an embodiment of the present application provides a method for preparing an N-type TOPCon battery provided in the first aspect, which includes the following steps:
forming a boron diffusion layer on the front side of the silicon substrate, and sequentially forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back side of the silicon substrate;
preparing a back silicon oxide layer and a back silicon nitride layer on the doped polycrystalline silicon layer in sequence by adopting a method combining an ozone oxidation method and a plasma chemical vapor deposition method;
simultaneously depositing aluminum oxide on the boron diffusion layer and the back silicon nitride layer to respectively form a front aluminum oxide layer and a back aluminum oxide layer;
and forming a front-side silicon nitride layer on the front-side aluminum oxide layer.
In the technical scheme, the method combining the ozone oxidation method and the plasma chemical vapor deposition method is adopted to sequentially prepare the back silicon oxide layer and the back silicon nitride layer on the tunneling oxide layer, and the ozone oxidation is added in the production process of the back silicon nitride layer to grow the single-sided silicon oxide layer on the back, so that the process is simple and can be used for mass production of the N-type TOPCon battery; and the prepared N-type TOPCon battery has good passivation effect and high battery efficiency.
In a possible implementation mode, an ozone generator is additionally arranged on equipment for realizing the plasma chemical vapor deposition method, firstly, the ozone oxidation method is adopted to prepare the back silicon oxide layer, and then, the plasma chemical vapor deposition method is adopted to prepare the back silicon nitride layer.
In the technical scheme, the back silicon oxide and the back silicon nitride are prepared by only adding the ozone generator on the chemical vapor deposition equipment, namely adding the ozone generator on the back film machine table to realize a two-in-one mode of ozone oxidation and chemical vapor deposition, so that the method is compatible with the existing TOPCon battery production line, saves the cost, has small influence on the productivity and is easy to popularize on a large scale.
In one possible implementation, the process conditions of the ozone oxidation process are: the temperature is 100 ℃ and 400 ℃, the pressure is 3-800mbar, and the time is 3-20 min.
In the technical scheme, the silicon oxide is prepared in a relatively low-temperature environment, the N-type TOPCon battery cannot be damaged, and the formed back silicon oxide layer can play a good passivation effect; the quality of the prepared silicon oxide film is equivalent to that of a silicon oxide film prepared by conventional oxygen saturated thermal oxidation, and the silicon oxide film has good uniformity.
In one possible implementation, the process conditions of the plasma chemical vapor deposition method are as follows: the temperature is 450-500 ℃, the pressure is 3-800mbar, and the time is 3-20 min.
In a possible implementation manner, the manner of depositing the aluminum oxide is to use a single atomic layer deposition method, and the process conditions of the single atomic layer deposition method are as follows: the temperature is 200 ℃ and 250 ℃, and the process comprises the following steps: TMA, 4-8 s-purge 7-10s-H 2 And O, 4-8 s-purging for 7-10s, wherein the cycle number is 22-51.
In the technical scheme, the process conditions are simple, and the compact aluminum oxide layer can be rapidly deposited on the front side and the back side of the battery.
In one possible implementation manner, the front-side silicon nitride layer is prepared by a plasma chemical vapor deposition method under the following process conditions: the temperature is 450-500 ℃, and the pressure is 200-300 Pa.
Drawings
To more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic diagram of a prior art N-type topon battery;
fig. 2 is a schematic structural diagram of an N-type TOPCon battery according to an embodiment of the present disclosure.
Icon: 01-a silicon substrate; 02-boron diffusion layer; 03-front alumina layer; 04-front side silicon nitride layer; 05-tunneling an oxide layer; 06-doping a polycrystalline silicon layer; 07-backside aluminum oxide layer; 08-back side silicon nitride layer; 110-silicon substrate, 120-boron diffusion layer; 130-front side alumina layer; 140-front side silicon nitride layer; 150-tunneling oxide layer; 160-doped polysilicon layer; 170-back side silicon oxide layer; 180-back side silicon nitride layer; 190-backside aluminum oxide layer.
Detailed Description
In the process of implementing the application, the applicant discovers that: TOPCon is a tunneling oxide layer passivation contact solar cell technology based on a selective carrier principle, the TOPCon cell structure is an N-type silicon substrate, usually, a layer of ultrathin silicon oxide is prepared on the back surface of a cell, then a doped silicon thin layer is deposited, and the ultrathin silicon oxide and the doped silicon thin layer form a passivation contact structure together, so that surface recombination and metal contact recombination are effectively reduced.
At present, the tunneling oxide layer, silicon oxide, silicon nitride and aluminum oxide are used as good passivation films in the battery. For TOPCon cells, the back side is typically passivated with double-sided aluminum oxide, front side silicon nitride, and back side silicon nitride after tunneling oxidation and doping of polysilicon. The structure of the N-type TOPCon cell is shown in fig. 1, and comprises an N-type silicon substrate 01, wherein a boron diffusion layer 02(p + emitter), a front aluminum oxide layer 03 and a front silicon nitride layer 04 are sequentially arranged on the front surface of the silicon substrate 01, and a tunneling oxide layer 05, a doped polycrystalline silicon layer 06(N + poly silicon), a back aluminum oxide layer 07 and a back silicon nitride layer 08 are sequentially arranged on the back surface of the silicon substrate 01.
For this N-type TOPCon cell, the front alumina layer 03 has a very good passivation effect, while the back alumina layer 07 affects the field passivation of the cell due to the large amount of fixed negative charges present at the silicon interface of the alumina and doped polysilicon layer 06. If only one side of the front side alumina layer 03 is desired to be formed, the current technology is very complicated, and the silicon wafers are usually back-to-back and formed by ALD (atomic layer deposition), which also causes severe wraparound plating on the back side, which affects the appearance, yield and efficiency of the cell.
In addition, applicants have also found that although silicon oxide passivates dangling bonds at the silicon interface and has the property of a fixed positive charge, it carries better chemical and field passivation for the back side of an N-type cell. However, the conventional silicon oxide layer is prepared by oxygen saturation and thermal oxidation, but experiments show that high temperature can damage the N-type TOPCon cell when thermal oxidation is carried out, so that the cell efficiency is low, and therefore, many photovoltaic companies remove the silicon oxide layer when preparing the TOPCon cell.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the embodiments of the present application will be clearly and completely described below. The examples, in which specific conditions are not specified, were carried out according to conventional conditions or conditions recommended by the manufacturer. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products available commercially.
The following is a detailed description of the N-type TOPCon battery and the method of manufacturing the same according to the embodiments of the present application.
Referring to fig. 2, an embodiment of the present invention provides an N-type TOPCon cell, which includes a silicon substrate 110, a boron diffusion layer 120, a front aluminum oxide layer 130, and a front silicon nitride layer 140 disposed on a front surface of the silicon substrate 110 from inside to outside, and a tunneling oxide layer 150, a doped polysilicon layer 160, a back silicon oxide layer 170, a back silicon nitride layer 180, and a back aluminum oxide layer 190 disposed on a back surface of the silicon substrate 110 from inside to outside.
Wherein the silicon substrate 110 is an n-type silicon substrate 110; the depth of the boron diffusion layer 120(P + emitter) is 700-1400nm, illustratively 700mm, 800nm, 900nm, 1000nm, 1100nm, 1200nm, 1300nm, or 1400 nm; the front aluminum oxide layer 130 has a thickness of 3-7nm, illustratively 3nm, 4nm, 5nm, 6nm, or 7 nm; the front side silicon nitride layer 140 has a thickness of 70-100nm, illustratively 70nm, 80nm, 90nm, or 100 nm.
The tunneling oxide layer 150 has a thickness of 0.5-3nm, illustratively 0.5nm, 1nm, 1.5nm, 2nm, 2.5nm, or 3 nm; the doped polysilicon layer 160(n + poly silicon) has a thickness of 40-150nm, illustratively 40nm, 50nm, 70nm, 90nm, 100nm, 110nm, 130nm, or 150 nm; the thickness of the back silicon oxide layer 170 is 1-3nm, illustratively 1nm, 1.5nm, 2nm, 2.5nm, or 3 nm; the back side silicon nitride layer 180 has a thickness of 70-100nm, illustratively 70nm, 80nm, 90nm, or 100 nm; the back aluminum oxide layer 190 has a thickness of 3-7nm, illustratively 3nm, 4nm, 5nm, 6nm, or 7 nm.
The embodiment of the present application further provides a method for preparing the N-type TOPCon battery, which includes the following steps:
(1) the pre-treatment of the silicon substrate 110 was carried out according to the conventional route for preparing TOPCon cells: texturing, boron diffusion, etching, tunneling oxidation, in-situ doping of amorphous silicon, annealing, and deswirling, namely preparing the silicon substrate 110, texturing the silicon substrate 110, forming the boron diffusion layer 120 on the front surface by boron diffusion, etching and tunneling oxidation to form the tunneling oxidation layer 150 on the back surface of the silicon substrate 110, in-situ doping of amorphous silicon, annealing, and deswirling to form the doped polysilicon layer 160. The specific process is as follows:
texturing: placing the N-type silicon wafer into a texturing groove, wherein the volume concentration of KOH in the groove is 1-20%, the temperature is 40-80 ℃, and 2-20L of additive is added, then washing with water, pickling (the volume concentration of HF is 1-30%), washing with water, slowly pulling, drying, and drying at the temperature of 80-105 ℃.
B, expanding boron: placing the textured silicon wafer in a boron expansion tube, wherein the ventilation temperature is 700-.
Etching: etching the boron-expanded silicon wafer in a chain type acid etching machine, and etching HNO in a groove 3 The volume concentration is 1-20%, and the volume concentration of HF is 1-20%.
Tunneling oxidation: thermal oxidation is adopted, the oxidation temperature is 500-700 ℃, and the tunneling oxide layer 150 on the back surface is obtained.
In-situ doping of amorphous silicon: by means of pH 3 And SiH 4 The mixed gas is prepared by PECVD with the process temperature of 200 ℃ and 600 ℃.
Annealing: the silicon wafer after the amorphous silicon is processed for 1-120min at the temperature of 700-1000 ℃.
Unwinding degree: growing silicon oxide on the back surface of the annealed silicon wafer, washing off the silicon oxide in the front surface roughness area by using HF (volume concentration is 1-40%), and then putting the silicon wafer into an alkali polishing groove (KOH volume concentration is 1-20%, temperature is 40-90 ℃, and alkali polishing additive is 2-20L) to carry out alkali polishing to remove the front surface polysilicon roughness, so as to obtain a doped polysilicon layer 160 on the tunneling oxide layer 150 on the back surface.
(2) After the step (1) is completed, a back silicon oxide layer 170 and a back silicon nitride layer 180 are sequentially formed on the doped polysilicon layer 160 by a method of combining an ozone oxidation method and a Plasma Enhanced Chemical Vapor Deposition (PECVD).
The method for realizing the combination of the ozone oxidation method and the plasma chemical vapor deposition method is usually to additionally arrange an ozone generator on equipment for realizing the plasma chemical vapor deposition method, for example, the ozone generator is additionally arranged beside tubular PECVD equipment, oxygen is introduced, then high-voltage discharge is carried out to prepare ozone, and the tubular PECVD equipment can realize single-sided coating; by using the equipment, the back silicon oxide layer 170 is prepared by adopting an ozone oxidation method, and then the back silicon nitride layer 180 is prepared by adopting a plasma chemical vapor deposition method.
Firstly, the ozone oxidation method is realized by utilizing chemical vapor deposition equipment additionally provided with an ozone generator, and the process conditions of the ozone oxidation method are as follows: the temperature is 100 ℃ and 400 ℃, the pressure is 3-800mbar, and the time is 3-20 min.
Then the chemical vapor deposition equipment is utilized to realize the plasma chemical vapor deposition method, generally other process conditions of the ozone oxidation method are continued, only the temperature is increased, and the gas type is changed from O 3 Changing into silane and ammonia, and the process conditions of the plasma chemical vapor deposition method are as follows: the temperature is 450-500 ℃, the pressure is 3-800mbar, and the time is 3-20 min.
(3) After the step (2) is completed, aluminum oxide is simultaneously deposited on the boron diffusion layer 120 and the back silicon nitride layer 180 to form a front aluminum oxide layer 130 and a back aluminum oxide layer 190, respectively, and the thicknesses of the front aluminum oxide layer 130 and the back aluminum oxide layer 190 are approximately equal because the front aluminum oxide layer 130 and the back aluminum oxide layer 190 are simultaneously deposited.
In the embodiment of the present application, a method for depositing aluminum oxide is an Atomic Layer Deposition (ALD) method, and process conditions of the ALD method are as follows: the temperature is 200-250 ℃, and the process comprises the following steps: TMA, 4-8 s-purge 7-10s-H 2 O, 4-8 s-purge 7And (4) 10s, wherein the treatment mode of each period is that TMA is firstly introduced for 4-8s, purging is carried out for 7-10s, then steam is introduced for 4-8s, purging is carried out for 7-10s, and the cycle number is 22-51. Wherein TMA is Al (CH) 3 ) 3 TMA and water together produce an aluminum oxide film.
(4) After the double-sided deposition of aluminum oxide in step (3) is completed, a front-side silicon nitride layer 140 is formed on the front-side aluminum oxide layer 130.
In the embodiment of the present application, the front surface silicon nitride layer 140 is prepared by a plasma chemical vapor deposition method, and the process conditions are as follows: the temperature is 450-500 ℃, and the pressure is 200-300 Pa.
(5) And the subsequent steps are printing, sintering and testing according to a TOPCon conventional route.
The features and properties of the present application are described in further detail below with reference to examples.
Example 1
This example provides a N-type topocon battery, which is prepared according to the following preparation method:
(1) texturing: the n-type silicon substrate 110 is placed in a texturing tank, the volume concentration of KOH in the tank is 5%, the temperature is 60 ℃, and the additive is 10L, and then the n-type silicon substrate is washed by water, pickled (the volume concentration of HF is 10%), washed by water, slowly pulled, dried, and dried at the drying temperature of 90 ℃.
B, expanding boron: and (3) placing the silicon wafer after texturing in a boron extension tube, and forming a boron diffusion layer 120 with the thickness of 800nm on the front surface at the source temperature of 800 ℃ for 600s, the junction pushing temperature of 1000 ℃ for 2000 s.
Etching: etching the back of the silicon wafer with expanded boron in a chain type acid etching machine, and etching HNO in a groove 3 The volume concentration is 10%, and the volume concentration of HF is 10%.
Tunneling oxidation: and forming a tunneling oxide layer 150 with the thickness of 2nm on the back surface by thermal oxidation at the oxidation temperature of 600 ℃.
In-situ doping amorphous silicon: by means of pH 3 And SiH 4 The mixed gas is prepared by a PECVD mode, the thickness of the amorphous silicon is 100nm, and the process temperature is 350 ℃.
And (3) annealing: the silicon wafer with the amorphous silicon is subjected to constant temperature keeping at 850 ℃ for 60 min.
Unwinding and plating: growing silicon oxide on the back surface of the annealed silicon wafer, washing the silicon oxide in the front surface waviness area by using HF (volume concentration is 20%), and then putting the silicon wafer into an alkali polishing groove (KOH volume concentration is 5%, temperature is 60 ℃, and alkali polishing additive is 10L) to carry out alkali polishing to remove the front surface amorphous silicon waviness.
(2) After the step (1) is completed, adding an ozone generator beside the tubular PECVD equipment, and firstly preparing the back silicon oxide layer 170 by using the tubular PECVD equipment with the ozone generator, wherein the process conditions of the ozone oxidation method are as follows: the temperature was 300 deg.c, the pressure was 500mbar, and the time was 10min, resulting in a back side silicon oxide layer 170.
And then, preparing the back silicon nitride layer 180 by using a plasma chemical vapor deposition method by using tubular PECVD equipment, namely, heating to 450 ℃ for 15min to obtain the back silicon nitride layer 180 with the thickness of 80 nm.
(3) After the step (2) is completed, depositing aluminum oxide on the boron diffusion layer 120 and the back silicon nitride layer 180 simultaneously by using ALD to form a front aluminum oxide layer 130 and a back aluminum oxide layer 190 respectively, wherein the process conditions are as follows: the temperature is 200 ℃, and the process comprises the following steps: TMA, 6 s-purge 9s-H 2 And O, 6 s-purging for 9s, wherein the cycle number is 37, and a front aluminum oxide layer 130 with the thickness of 5nm and a back aluminum oxide layer 190 with the thickness of 5nm are obtained.
(4) After the double-sided deposition of aluminum oxide in the step (3) is completed, a front-side silicon nitride layer 140 is formed on the front-side aluminum oxide layer 130 by adopting a PECVD technology, and the process conditions are as follows: the temperature was 470 ℃ and the pressure was 250Pa, resulting in a front side silicon nitride layer 140 with a thickness of 90 nm.
(5) And the subsequent steps are printing, sintering and testing according to a TOPCon conventional route.
Example 2
This example provides a N-type TOPCon cell, which is prepared according to the following preparation method:
1) texturing: the n-type silicon substrate 110 was placed in a texturing bath at a KOH volume concentration of 5%, a temperature of 60 ℃ and an additive amount of 10 liters, followed by water washing, acid washing (HF volume concentration of 10%), water washing, slow pulling, baking and baking temperature of 90 ℃.
B, expanding boron: and (3) placing the silicon wafer after texturing in a boron extension tube, and forming a boron diffusion layer 120 with the thickness of 800nm on the front surface at the source temperature of 800 ℃ for 600s, the junction pushing temperature of 1000 ℃ for 2000 s.
Etching: etching the back of the boron-expanded silicon wafer in a chain type acid etching machine, and etching HNO in a groove 3 The volume concentration is 10%, and the HF volume concentration is 10%.
Tunneling oxidation: and forming a tunneling oxide layer 150 with the thickness of 2nm on the back surface by thermal oxidation at the oxidation temperature of 600 ℃.
In-situ doping amorphous silicon: by means of pH 3 And SiH 4 The mixed gas is prepared by a PECVD mode, the thickness of the amorphous silicon is 100nm, and the process temperature is 350 ℃.
Annealing: the silicon wafer with the amorphous silicon is subjected to constant temperature of 850 ℃ for 60 min.
Unwinding and plating: growing silicon oxide on the back surface of the annealed silicon wafer, washing the silicon oxide in the front surface waviness area by using HF (volume concentration is 20%), and then putting the silicon wafer into an alkali polishing groove (KOH volume concentration is 5%, temperature is 60 ℃, and alkali polishing additive is 10L) to carry out alkali polishing to remove the front surface amorphous silicon waviness.
(2) After the step (1) is finished, adding an ozone generator beside the tubular PECVD equipment, and preparing the back silicon oxide layer 170 by using the ozone oxidation method by using the tubular PECVD equipment with the ozone generator, wherein the process conditions of the ozone oxidation method are as follows: the temperature was 320 deg.c, the pressure was 500mbar, and the time was 15min, resulting in a back side silicon oxide layer 170.
And then, preparing the back silicon nitride layer 180 by using a plasma chemical vapor deposition method by using tubular PECVD equipment, namely, heating to 450 ℃ for 15min to obtain the back silicon nitride layer 180 with the thickness of 80 nm.
(3) After the step (2) is completed, depositing aluminum oxide on the boron diffusion layer 120 and the back silicon nitride layer 180 simultaneously by ALD to form a front aluminum oxide layer 130 and a back aluminum oxide layer 190, respectively, wherein the process conditions are as follows: the temperature is 200 ℃, and the process comprises the following steps: TMA, 6 s-purge 9s-H 2 And O, 6 s-purging for 9s, wherein the cycle number is 37, and a front aluminum oxide layer 130 with the thickness of 5nm and a back aluminum oxide layer 190 with the thickness of 5nm are obtained.
(4) After the double-sided deposition of aluminum oxide in the step (3) is completed, a front-side silicon nitride layer 140 is formed on the front-side aluminum oxide layer 130 by adopting a PECVD technology, and the process conditions are as follows: the temperature was 470 ℃ and the pressure was 250Pa, resulting in a front side silicon nitride layer 140 with a thickness of 90 nm.
(5) The subsequent steps are printing, sintering and testing according to a TOPCon conventional route.
Comparative example 1
Referring to fig. 1, the present comparative example provides an N-type TOPCon battery, which is prepared as follows:
(1) the same as step (1) of example 1, and will not be described again.
(2) After the step (1) is finished, depositing aluminum oxide on the boron diffusion layer 02 and the doped polycrystalline silicon layer 06 by ALD to respectively form a front aluminum oxide layer 03 and a back aluminum oxide layer 07, wherein the process conditions are as follows: the temperature is 200 ℃ and 250 ℃, and the process comprises the following steps: TMA, 6 s-purge 9s-H 2 And O, 6 s-purging for 9s, wherein the cycle number is 37, and a front aluminum oxide layer 03 with the thickness of 5nm and a back aluminum oxide layer 07 with the thickness of 5nm are obtained.
(3) After the aluminum oxide is deposited on the two sides in the step (2), a front silicon nitride layer 04 and a back silicon nitride layer 08 are simultaneously formed on the front aluminum oxide layer 03 and the back aluminum oxide layer 07 by adopting a PECVD technology, and the process conditions are as follows: the temperature was 450 ℃ and the pressure was 200Pa, resulting in a front silicon nitride layer 04 with a thickness of 90nm and a back silicon nitride layer 08 with a thickness of 80 nm.
(4) And the subsequent steps are printing, sintering and testing according to a TOPCon conventional route.
TABLE 1 test data for different examples and comparative examples
As can be seen from table 1, compared with the conventional N-type TOPCon battery in comparative example 1, the passivation film scheme adopted by the N-type TOPCon battery in the embodiment of the present application greatly improves the battery passivation, increases both the open-circuit voltage and the short-circuit current, and has a significant improvement effect.
In summary, the N-type TOPCon battery and the preparation method thereof in the embodiments of the present application have the advantages of simple process, good passivation effect and high battery efficiency.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (8)
1. A preparation method of an N-type TOPCon battery is characterized in that the N-type TOPCon battery comprises a silicon substrate, wherein a boron diffusion layer, a front aluminum oxide layer and a front silicon nitride layer are arranged on the front surface of the silicon substrate from inside to outside, and a tunneling oxide layer, a doped polycrystalline silicon layer, a back silicon oxide layer, a back silicon nitride layer and a back aluminum oxide layer are arranged on the back surface of the silicon substrate from inside to outside, and the preparation method comprises the following steps:
forming a boron diffusion layer on the front side of the silicon substrate, and sequentially forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back side of the silicon substrate;
preparing a back silicon oxide layer and a back silicon nitride layer on the doped polycrystalline silicon layer in sequence by adopting a method combining an ozone oxidation method and a plasma chemical vapor deposition method, adding an ozone generator on equipment for realizing the plasma chemical vapor deposition method, preparing the back silicon oxide layer by adopting the ozone oxidation method, and preparing the back silicon nitride layer by adopting the plasma chemical vapor deposition method;
simultaneously depositing aluminum oxide on the boron diffusion layer and the back silicon nitride layer to respectively form a front aluminum oxide layer and a back aluminum oxide layer;
a front side silicon nitride layer is formed on the front side aluminum oxide layer.
2. The method for preparing the N-type TOPCon battery according to claim 1, wherein the process conditions of the ozone oxidation method are as follows: the temperature is 100-400 ℃, the pressure is 3-800mbar, and the time is 3-20 min.
3. The method for preparing an N-type TOPCon cell according to claim 1, wherein the process conditions of the plasma chemical vapor deposition method are as follows: the temperature is 450-500 ℃, the pressure is 3-800mbar, and the time is 3-20 min.
4. The method for preparing an N-type TOPCon cell as claimed in claim 1, wherein the depositing of the alumina is by a single atomic layer deposition process under the following process conditions: the temperature is 200 ℃ and 250 ℃, and the process comprises the following steps: TMA, 4-8 s-purge 7-10s-H 2 And O, 4-8 s-purging for 7-10s, wherein the cycle number is 22-51.
5. The method of claim 1, wherein the front side silicon nitride layer is formed by plasma CVD under the following conditions: the temperature is 450-500 ℃, and the pressure is 200-300 Pa.
6. The method of claim 1, wherein the back side silicon oxide layer has a thickness of 1-3 nm;
and/or the thickness of the back silicon nitride layer is 70-100 nm;
and/or the thickness of the back alumina layer is 3-7 nm.
7. The method of claim 1, wherein the front side alumina layer has a thickness of 3-7 nm;
and/or the thickness of the front silicon nitride layer is 70-100 nm.
8. The method as claimed in claim 1, wherein the depth of the boron diffusion layer is 700-1400 nm;
and/or the thickness of the tunneling oxide layer is 0.5-3 nm;
and/or the thickness of the doped polycrystalline silicon layer is 40-150 nm.
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