CN113594151A - 半导体封装及其制造方法 - Google Patents
半导体封装及其制造方法 Download PDFInfo
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Abstract
本发明提供了一种半导体封装及其制造方法,包括:基板,包括围绕芯片安装区的多个阻挡结构;芯片,倒装焊接在芯片安装区上;第一密封剂,在芯片安装区上包覆芯片;第二密封剂,在基板上包覆第一密封剂。依照本发明的半导体封装及其制造方法,在基板上每个芯片周围采用阻挡结构防止湿气渗透、增强粘合力并同时防止密封剂溢流,从而有效地提高了封装的可靠性。
Description
技术领域
本发明涉及一种半导体封装及其制造方法,特别是一种能够有效防止湿气渗入并同时防止密封剂溢流的半导体封装及其制造方法。
背景技术
微电子技术的迅猛发展,集成电路复杂度的增加,一个电子***的大部分功能都可能集成在一个单芯片内(即片上***),这就相应地要求微电子封装具有更高的性能、更多的引线、更密的内连线、更小的尺寸或更大的芯片腔、更大的热耗散功能、更好的电性能、更高的可靠性、更低的单个引线成本等。
随着半导体技术的日新月异,圆片工序技术亦不断改良,以满足半导体产业的需求。另一方面,由于圆片工序技术的不断改良,传统的封装测试技术亦逐渐受到市场淘汰,使得封装测试技术亦推陈出新,以应付半导体产业的变化。
具体而言,现有技术中往往在同一个半导体封装内安装多于一个的半导体元器件,尤其是不同种类的芯片,例如存储芯片与逻辑控制芯片、发光芯片(LED、激光器等)与光传感器芯片(光电二极管等等)、数字IC与模拟IC、有源器件与无源器件(例如R、L、C构成的网络等等)。这些元器件工作在不同的应用条件下,对于封装性能提出了个性化的不同需求,为此需要在同一个封装内采用不同性能的密封剂。
在针对这些封装进行的器件温湿环境可靠性实验中,湿气渗入是影响其气密性导致失效的重要原因之一。湿气渗入器件主要有两条途径:通过塑封料包封层本体,或者通过塑封料包封层与封装基板间的间隙。上述现有的封装技术中,由于芯片安装工序的不同,一个芯片所采用已有的密封剂在后续封装其他芯片过程中极易受到温度、压力的影响而降低与基板之间的粘合力,湿气容易从这些细缝侵入而导致半导体元件失效。此外,不同密封剂的流动性能有差异,在先的密封剂容易受到在后的密封工艺影响而溢流,流动的密封剂可能会导致尚未安装芯片处的基板上焊盘被污染或遮蔽,影响了后续半导体元件的互联可靠性。
发明内容
因此,本发明的目的在于克服以上技术障碍而提供一种创新性的半导体封装及其制造方法,在基板上每个芯片周围采用阻挡结构防止湿气渗透、增强粘合力并同时防止密封剂溢流,从而有效地提高了封装的可靠性。
本发明提供了一种半导体封装,包括:
基板,包括围绕芯片安装区的多个阻挡结构;
芯片,倒装焊接在芯片安装区上;
第一密封剂,在芯片安装区上包覆芯片;
第二密封剂,在基板上包覆第一密封剂。
其中,芯片包括相同或不同类型的多个芯片,多个阻挡结构围绕每个芯片。其中,不同类型的多个芯片周围的多个阻挡结构内或表面上加入不同的添加剂,或者不同类型的多个芯片上的第一密封剂中加入不同的添加剂。其中,添加剂包括导电颗粒、有色颗粒、反光颗粒、化学改性剂、耐火剂颗粒、高硬度颗粒、波长转换颗粒或导热颗粒。
其中,多个阻挡结构是对基板表面加工得到的粗糙表面或凹凸结构,或者是在基板表面上形成的挡堤结构。
其中,多个阻挡结构是在基板法线上具有厚度的水平的周期性或非周期性结构,或者是在基板法线上具有高度差的曲线分布结构。
其中,多个阻挡结构在平视图中是相互平行的线段或曲线,或者是多个线段或曲线交联构成的格栅。
其中,在平视图中,芯片或第一密封剂与多个阻挡结构部分地重叠。
本发明进一步提供了一种半导体封装制造方法,包括步骤:
在基板上形成围绕一个或多个芯片安装区的多个阻挡结构;
将一个或多个芯片倒装安放在基板的一个或多个芯片安装区上;
在一个或多个芯片安装区内,形成一个或多个第一密封剂以覆盖一个或多个芯片;
在基板上形成第二密封剂,覆盖所有第一密封剂。
其中,多个阻挡结构的厚度为10至100微米。
依照本发明的半导体封装及其制造方法,在基板上每个芯片周围采用阻挡结构防止湿气渗透、增强粘合力并同时防止密封剂溢流,从而有效地提高了封装的可靠性。
本发明所述目的,以及在此未列出的其他目的,在本申请独立权利要求的范围内得以满足。本发明的实施例限定在独立权利要求中,具体特征限定在其从属权利要求中。
附图说明
以下参照附图来详细说明本发明的技术方案,其中:
图1显示了根据本发明一个实施例的半导体封装的剖视图;
图2显示了图1的半导体封装中基板表面的平视图;
图3显示了根据本发明另一实施例的半导体封装的剖视图;
图4显示了图3的半导体封装中基板表面的平视图;以及
图5显示了根据本发明实施例的半导体封装制造方法的流程图。
具体实施方式
以下参照附图并结合示意性的实施例来详细说明本发明技术方案的特征及其技术效果,公开了有效提高封装可靠性的半导体封装及其制造方法。需要指出的是,类似的附图标记表示类似的结构,本申请中所用的术语“第一”、“第二”、“上”、“下”等等可用于修饰各种器件结构。这些修饰除非特别说明并非暗示所修饰器件结构的空间、次序或层级关系。
如图1、图2所示,根据本发明一个优选实施例的半导体封装包括基板1、一个或多个芯片2、第一密封剂6A、第二密封剂6B。基板1例如是印刷电路板(PCB),其包括有机(例如树脂)或无机材料构成的多个绝缘层,按照布线需要设置在各个绝缘层之间的金属互连层或再布线层(RDL),以及在基板顶表面上的多个焊盘1B。此外,基板1也可以是引线框架(lead frame),具有被密封剂包裹的金属迹线和迹线顶表面上的焊盘。
芯片2可以是各种常用的半导体芯片,例如基于CMOS工艺制造的硅基逻辑/存储电路、基于双极或BiMOS工艺制造的功率器件、基于III-V或II-VI族化合物的发光二极管(LED)或光电二极管(LD)等等。芯片2的底部包括用作芯片2内部的电信号输入/输出的多个金属迹线或焊盘3,例如用Al、Cu、Mo、W、Pt、Ni及其合金制成。
采用吸嘴从晶圆上取芯同时将芯片的凸块4粘贴在芯片安装区域或基板焊接区域。具体地,芯片2的焊盘3上通过电镀、化学镀、键合、压合、导电胶粘合等等工艺而提供了金属凸块(bump)4,优选为Cu、Sn、Al、Ag、Ni、Au、Pt、Pd及其合金,用于在芯片2倒装回流焊期间提供足够的机械支撑,避免焊球移位,并且同时还优选可焊接材料以促进与焊锡球之间的接合强度。金属凸块4上形成有焊球5,通过焊球5与基板1表面的焊盘1B接触、焊接从而实现物理连接和电连接。金属凸块4的截面通常为圆形,以便焊球5在回流过程中均匀地分布在凸块表面上而不会从尖锐的角部或突出部向侧壁溢流。焊球5的材料可以是有铅焊料或无铅焊料。优选地,焊球5与基板1顶面焊盘1B之间还可以具有助焊剂或锡膏(未示出),提高与基板之间的焊接可靠性。
在半导体封装包括不同种类的多个芯片2的情况下,每个芯片2所需的密封环境可能不同,例如LED、LD等芯片对于密封剂的透光率、波长转换性等光学功能有较高要求,而控制逻辑、存储器对于密封剂的防渗透和抗电磁干扰有较高要求,因此需要在同类型的芯片安放之后采用同类型的密封剂逐次密封,然后再对于另一类芯片采用另一种密封剂批量密封。在此过程中,由于密封剂的流动性不同,极易对基板上焊盘1B造成污染或遮蔽,并且由于密封剂的热稳定性不同,后续工艺也容易造成在先密封剂剥离脱落。
为此,本申请在芯片2安装之前的提供基板1的步骤过程中,至少在每个芯片安装区域的周边设置了多个阻挡结构1A,用于增强基板与密封剂之间的粘合力从而防止密封剂剥离脱落,能够有效地减少湿气从封装与基板之间界面缝隙渗透。此外,阻挡结构1A还能够防止密封剂向外溢流,能够有效地确保基板焊盘不受影响,确保电互联的可靠性。
多个阻挡结构1A例如是对于基板1直接采用机械切割或激光烧蚀等减法工艺形成的粗糙表面、凹凸结构,也可以是在基板1平坦表面上通过涂覆、印刷阻挡材料(例如环氧类树脂)的加法工艺而形成的挡堤、围坝结构。如图1所示,从侧面看,多个阻挡结构1A在基板法线上可以是具有一定厚度(例如小于密封剂6A厚度的5%,诸如为10至100微米并优选20至70微米的水平性的周期性或非周期性结构,虽然图1中所示为基本上水平的带状结构,但是实际上也可以在法线方向上具有高度差,例如是中间***而两侧凹陷、两侧***而中间凹陷、或者一部分***和另一部分凹陷交错重复的各种曲线分布,从而通过有效地延长了湿气渗透路径长度而增强了湿气阻挡能力。而如图2所示,从顶面看,多个阻挡结构1A至少围绕了芯片安装区域(图中焊盘1B外的方框所示,对应于图1中密封剂6A分布区域),其平面形状不限于图2中所示,可以是各种直线或曲线段或者由其所形成的周期性或非周期性结构,例如是阵列。优选地,多个阻挡结构1A分布在基板1边缘,从而有效地缩短了湿气从侧面渗透的距离。优选地,多个阻挡结构1A从芯片安装区域(对应于图1中第一密封剂6A所分布区域)向内侧延伸一定距离(例如小于等于密封剂6A与基板焊盘1B外侧间距的50%),由此使得在平视图中第一密封剂6A(乃至芯片2)与多个阻挡结构1A部分地重叠,从而更进一步增强了基板1与第一密封剂6A之间的粘合力,避免了不同工序期间不同种类的第一密封剂6A可能存在的剥离问题。
优选地,为了满足不同种类的芯片2对于封装的个性化需求,多个阻挡结构1A内或表面上还可以加入添加剂:为了有效提高抗电磁干扰能力而加入石墨粉、石墨烯片段、银粉等导电颗粒构成接地环路;为了防止顶发光型LED侧面或底面漏光而加入黑色素、染料等有色颗粒构成吸光层,或者加入银粉、镁粉、氧化锌、氧化钛等反光颗粒构成反光层以提高底发光或侧发光型LED的出光效率;为了提高基板与密封剂之间的粘合强度,可以针对基板所采用的有机绝缘材料和密封剂所采用的有机绝缘材料选用合适的交联剂、偶联剂或表面改性剂,在基板与密封剂之间产生交联分子链;为了提高耐热性或耐压性,可以添加耐火剂颗粒或高硬度颗粒,例如氧化锆、氧化钛、氧化锰、氧化铈等等。
在倒装安放了芯片2之后,通过旋涂、喷涂、丝网印刷等低温或常温工艺,施加第一密封剂6A,完全地包裹了芯片2、焊盘3、凸块4和焊球5,并且同时地覆盖了基板1上的焊盘1B(并且优选地部分地覆盖了基板1上的多个阻挡结构1A的一部分),将芯片2固定在基板上。第一密封剂6A可以是常用的各种封装有机材料,例如环氧树脂、酚醛树脂、酰胺树脂、聚酯树脂等等。优选地,为了满足不同种类的芯片2对于封装的个性化需求,不同芯片2上的第一密封剂6A内添加不同的添加剂:添加导电颗粒以抗电磁干扰,添加波长转换颗粒(有机染料或色素,量子点,磷光体或荧光体等等)以改变LED发射光的颜色,添加导热颗粒(氧化铝、氮化铝、氮化钛等绝缘导热陶瓷颗粒)以提高散热性能,添加有色颗粒或反光颗粒以改变LED光学性能,等等。
在完成了各个半导体芯片2的倒装焊接之后,在整个基板1上施加第二密封剂6B,完全覆盖了基板1剩余面积以及所有的第一密封剂6A,完成最终的半导体封装。优选地,第二密封剂6B所覆盖的阻挡结构1A的宽度大于等于第一密封剂6A所覆盖的阻挡结构1A的宽度的5倍、并小于等于其30倍,从而有效地增强了第二密封剂6B整体上与基板1之间的结合强度并协调了第一密封剂6A与第二密封剂6B之间界面处的应力分布,防止两者界面处可能存在的剥离现象。
随后,依照封装结构所实现的电学功能,采用机械锯片切割或者激光扫射切割,将各个封装体划片分离成半成品,并对各个半成品进行可靠性测试例如环境类温湿/偏压测试,选出合格产品完成最终的成品包装。在此过程中,优选地也可以利用多个阻挡结构作为划片区域,由于阻挡结构依照密封剂6A的需求不同而具有各种添加剂,这些添加剂会有效地降低划片切口处的损伤,确保封装体的可靠性。
图3、图4示出了依照本发明另外实施例的半导体封装的剖视图和顶视图,其中基板1上具有多个半导体芯片2,每个半导体芯片2被各自的第一密封剂6A包围,而第二密封剂6B则覆盖了所有的第一密封剂6A以及剩余的基板1,其中多个阻挡结构1A不仅分布在基板1四周边缘,而且也分布在各个半导体芯片2之间基板1上从而在平视图中包围了各个半导体芯片2。
如图5所示,依照本发明上述优选实施例的半导体封装的制造方法包括以下步骤:
在基板1上形成围绕(一个或多个)芯片安装区的多个阻挡结构;
将(一个或多个)芯片2倒装在基板1上;
在芯片2上基板1的多个阻挡结构1A内侧形成(一个或多个)第一密封剂6A;
在基板1和(所有)第一密封剂6A上形成第二密封剂6B。
依照本发明的半导体封装及其制造方法,在基板上每个芯片周围采用阻挡结构防止湿气渗透、增强粘合力并同时防止密封剂溢流,从而有效地提高了封装的可靠性。
尽管已参照一个或多个示例性实施例说明本发明,本领域技术人员可以知晓无需脱离本发明范围而对器件结构做出各种合适的改变和等价方式。此外,由所公开的教导可做出许多可能适于特定情形或材料的修改而不脱离本发明范围。因此,本发明的目的不在于限定在作为用于实现本发明的最佳实施方式而公开的特定实施例,而所公开的器件结构及其制造方法将包括落入本发明范围内的所有实施例。
Claims (10)
1.一种半导体封装,包括:
基板,包括围绕芯片安装区的多个阻挡结构;
芯片,倒装焊接在芯片安装区上;
第一密封剂,在芯片安装区上包覆芯片;
第二密封剂,在基板上包覆第一密封剂。
2.根据权利要求1所述的半导体封装,其中,芯片包括相同或不同类型的多个芯片,多个阻挡结构围绕每个芯片。
3.根据权利要求2所述的半导体封装,其中,不同类型的多个芯片周围的多个阻挡结构内或表面上加入不同的添加剂,或者不同类型的多个芯片上的第一密封剂中加入不同的添加剂。
4.根据权利要求3所述的半导体封装,其中,添加剂包括导电颗粒、有色颗粒、反光颗粒、化学改性剂、耐火剂颗粒、高硬度颗粒、波长转换颗粒或导热颗粒。
5.根据权利要求1所述的半导体封装,其中,多个阻挡结构是对基板表面加工得到的粗糙表面或凹凸结构,或者是在基板表面上形成的挡堤结构。
6.根据权利要求1所述的半导体封装,其中,多个阻挡结构是在基板法线上具有厚度的水平的周期性或非周期性结构,或者是在基板法线上具有高度差的曲线分布结构。
7.根据权利要求1所述的半导体封装,其中,多个阻挡结构的厚度为10至100微米。
8.根据权利要求1所述的半导体封装,其中,在平视图中,芯片或第一密封剂与多个阻挡结构部分地重叠。
9.一种半导体封装制造方法,包括步骤:
在基板上形成围绕一个或多个芯片安装区的多个阻挡结构;
将一个或多个芯片倒装安放在基板的一个或多个芯片安装区上;
在一个或多个芯片安装区内,形成一个或多个第一密封剂以覆盖一个或多个芯片;
在基板上形成第二密封剂,覆盖所有第一密封剂。
10.根据权利要求9所述的半导体封装制造方法,其中,形成第二密封剂之后,利用多个阻挡结构的一部分作为划片区域,切割分离各个芯片。
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