CN113495812B - Maintenance and inspection method after memory packaging - Google Patents

Maintenance and inspection method after memory packaging Download PDF

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Publication number
CN113495812B
CN113495812B CN202010248373.6A CN202010248373A CN113495812B CN 113495812 B CN113495812 B CN 113495812B CN 202010248373 A CN202010248373 A CN 202010248373A CN 113495812 B CN113495812 B CN 113495812B
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memory module
tested
integrated circuit
memory
data center
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CN113495812A (en
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林正隆
梁万栋
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EOREX CORP
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EOREX CORP
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2294Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/263Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

A maintenance and inspection method after memory packaging is to provide a test integrated circuit, connect the test integrated circuit with each memory module to be tested, connect with a data center management unit through an online unit, when executing a functional test to inspect the functional state of each memory module to be tested, detect and analyze each memory module to be tested by the test integrated circuit to obtain the functional test result of each memory module to be tested, and store the functional test result to the data center management unit through the online unit. Therefore, the invention uses the data center management unit to provide a large amount of data storage space for storing and recording the function test result, and can provide a large amount of maintenance of batches at one time through the display information of the function states of the mass storage modules, thereby effectively expanding a larger maintenance repair range and reducing the cost.

Description

Maintenance and inspection method after memory packaging
Technical Field
The present invention relates to a method for repairing and checking a packaged memory, and more particularly, to a method for repairing and checking a packaged memory, which connects functional test results of each memory module to be tested obtained by testing to an external data center (data center) management unit through an on-line unit, and can provide a lot of repair at a time, thereby effectively expanding a larger maintenance repair range and reducing cost.
Background
Post package repair (post package repair, PPR) refers to a circuit method that can repair dynamic random access memory (dynamic random access memory, DRAM) after packaging. The most basic approach is to directly use field programmable logic arrays (field programmable gate array, FPGA) on automated test equipment (automatic test equipment, ATE) to directly test and repair DRAMs of devices under test (device under test, DUT), which is basically the original manufacturer of IC particles.
However, to the application end, the IC particles are assembled on the module board after being sold, the main board is provided with the DRAM through the slot or directly soldered on the main board, the current practice is to store the fail bit cell (bit cell) address into a serial presence detect (serial presence detect, SPD), and the SPD is used to detect the DRAM of a plurality of DUTs and automatically access the status information thereof. However, the storage capacity of SPD is small, so the number of bit cells that it can repair is quite limited.
In view of the limited storage capacity of the SPD in the prior art, if there are many places damaged, it is impossible to store a plurality of pieces of information, so that the number range of repairable pieces is limited. Therefore, it is generally not satisfactory for the user to use in practice.
Disclosure of Invention
The main objective of the present invention is to overcome the above-mentioned problems encountered in the prior art, and to provide a method for repairing and checking after memory package, which does not need to have a detection and amplification capacity for a sequence, and can use the original SPD, and only needs to connect the functional test result of each memory module to be tested by testing an Integrated Circuit (IC) to an external data center management unit through an online unit, where the data center management unit can manage and provide a large amount of data storage space for storing and recording the functional test result by an online central control computer or a cloud server, and can provide a large amount of repair for batch at a time by displaying information of the functional states of mass memory modules in the data center management unit, so as to effectively expand a larger maintenance and repair range and reduce cost.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows: a method for post-package repair inspection of a memory, the method comprising the steps of:
step one: providing a test integrated circuit and connecting the test integrated circuit with a plurality of memory modules to be tested;
step two: starting an on-line unit and connecting the test integrated circuit with a data center management unit through the on-line unit;
step three: performing function detection analysis on each memory module to be tested by using the test integrated circuit to obtain a function test result of each memory module to be tested, and storing the function test result to the data center management unit through the online unit;
step four: the position of the known damaged memory module in each memory module to be tested can be known through the record of each function test result in the data center management unit, and the subsequent maintenance of the memory unit on the memory module is provided.
In the method for repairing and checking the packaged memory according to the present invention, the test integrated circuit is a motherboard mounted on an additional circuit Board (Load Board), each of the functional test results of the memory modules to be tested corresponds to a serial number (serial number), and the location of the known damaged memory module in each of the memory modules to be tested is obtained through the record of the serial number corresponding to each of the functional test results.
In the method for repairing and checking the packaged memory, the data center management unit is a cloud server or an online storage space managed by a central control computer.
In the method for repairing and checking the packaged memory according to the present invention, the connection unit is connected in a wired or wireless manner, and the wireless manner may be a built-in or external device having a WiFi module or a bluetooth module.
Drawings
Fig. 1 is a schematic flow chart of the present invention.
FIG. 2 is a block schematic diagram of the present invention.
Reference numeral control:
memory module 1 to be tested
Data center management unit 2
Testing integrated circuit 3
An on-line unit 31.
Detailed Description
Fig. 1 and fig. 2 show a flow chart of the present invention and a block diagram of the present invention, respectively. As shown in the figure: the invention relates to a maintenance and inspection method after memory packaging, which is implemented by a maintenance and inspection device after memory packaging, and comprises the following steps:
step one s1: a test Integrated Circuit (IC) 3 is provided, which test integrated circuit 3 is connected to a number of memory modules under test (device under test, DUT) 1.
Step two s2: the test integrated circuit 3 is connected to an on-line unit 31, the on-line unit 31 may be a built-in or external device having a WiFi module or a bluetooth module, the on-line unit 31 is turned on to connect the test integrated circuit 3 to a data center (data center) management unit 2, and the data center management unit 2 may be a cloud server or an online storage space managed by a central control computer.
Step three, s3: when a functional test is performed to check the functional status of each memory module under test 1, the test integrated circuit 3 is used to perform a test analysis on each memory module under test 1 to obtain a functional test result of each memory module under test 1, and the functional test result is stored in the data center management unit 2 through the on-line unit 31.
Step four, s4: the location of the known damaged memory module in each memory module 1 to be tested can be known through the record of each functional test result in the data center management unit 2, and the subsequent maintenance of the memory unit on the memory module can be provided. Thus, a novel method for repairing and checking the packaged memory is formed by the disclosed process.
In one embodiment, the test integrated circuit 3 may be a Motherboard (MB) mounted on an additional circuit Board (Load Board), and the Motherboard further includes a serial presence detect (serial presence detect, SPD) chip (not shown) through which each of the functional test results of the memory modules 1 to be tested corresponds to a serial number.
In one embodiment, after the functional test results of each memory module under test 1 are obtained by the test and comparison, the test integrated circuit 3 can directly perform the repair operation on line according to the functional test results, and each functional test result in the functional test results of each memory module under test can be stored without storing a serial number (serial number) corresponding to the memory module under test 1.
When the invention is used, the SPD does not need to be amplified, the original SPD can be used, the functional test result of each memory module 1 to be tested is only needed to be tested by the test integrated circuit 3 and is connected to the external data center management unit 2 through the connection unit 31, the position of the known damaged memory module in each memory module 1 to be tested can be known through the record of the serial number corresponding to each functional test result, and the memory unit on the memory module can be maintained later. Therefore, the data center management unit 2 can manage and provide a large amount of data storage space for storing and recording functional test results by an online central control computer or a cloud server, and can provide a large amount of maintenance of batches at one time through the display information of the functional states of a large amount of memory modules in the data center management unit 2, so that a larger maintenance and repair range is effectively expanded, and the cost is reduced.
In summary, the method for repairing and checking the memory after packaging according to the present invention can effectively improve various disadvantages of the prior art, connect the functional test results of each memory module to be tested obtained by testing to the external data center management unit through the on-line unit, manage and provide a large amount of data storage space to store and record the functional test results by using the on-line central control computer or the cloud server, and provide a large amount of batch maintenance once through the display information of the functional states of the mass memory modules in the data center management unit, thereby effectively expanding a larger maintenance and repair range and reducing cost, further making the present invention more advanced, more practical and more in line with the requirements of users, and conforming to the requirements of the patent application of the present invention.
However, the foregoing is merely illustrative of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention; therefore, all such simple and equivalent changes and modifications as made by the claims and the disclosure of the present invention shall fall within the scope of the present invention.

Claims (1)

1. A method for post-package repair inspection of a memory, implemented by a post-package repair inspection device, the method comprising the steps of:
step one: providing a test integrated circuit, wherein the test integrated circuit is a main board arranged on an additional circuit board, the main board comprises an SPD chip, and the test integrated circuit is connected with a plurality of memory modules to be tested;
step two: starting an online unit, and enabling the test integrated circuit to be connected with a data center management unit through the online unit, wherein the online unit is a built-in or externally connected device with a WiFi module or a Bluetooth module, and the data center management unit is a cloud server or an online storage space managed by a central control computer;
step three: performing function detection analysis on each memory module to be tested by using the test integrated circuit to obtain a function test result of each memory module to be tested, enabling each function test result in the function test results of each memory module to be tested to correspond to a serial number by using the SPD chip, and storing the function test result to the data center management unit by using the online unit;
step four: the position of the known damaged memory module in each memory module to be tested can be known through the record of the serial number corresponding to each functional test result in the data center management unit, and the memory unit on the known damaged memory module is directly repaired on line according to the functional test result.
CN202010248373.6A 2020-04-01 2020-04-01 Maintenance and inspection method after memory packaging Active CN113495812B (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1991782A (en) * 2005-12-30 2007-07-04 英业达股份有限公司 RAM module mounting condition detecting method and system
CN102402473A (en) * 2011-10-28 2012-04-04 武汉供电公司变电检修中心 Computer hardware and software fault diagnosis and repair system
CN105955874A (en) * 2016-05-03 2016-09-21 浪潮电子信息产业股份有限公司 Method for testing performance of server memory based on cloud platform
CN110297726A (en) * 2019-07-03 2019-10-01 上海兆芯集成电路有限公司 With the computer system and memory modules control method that serially there is detection data
CN110491440A (en) * 2019-07-02 2019-11-22 深圳市金泰克半导体有限公司 A kind of internal storage testing method and system
CN110825321A (en) * 2018-08-14 2020-02-21 三星电子株式会社 Storage device and operation method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190041645A (en) * 2017-10-13 2019-04-23 삼성전자주식회사 Memory modules, methods of operating memory modules and test systems of memory modules

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1991782A (en) * 2005-12-30 2007-07-04 英业达股份有限公司 RAM module mounting condition detecting method and system
CN102402473A (en) * 2011-10-28 2012-04-04 武汉供电公司变电检修中心 Computer hardware and software fault diagnosis and repair system
CN105955874A (en) * 2016-05-03 2016-09-21 浪潮电子信息产业股份有限公司 Method for testing performance of server memory based on cloud platform
CN110825321A (en) * 2018-08-14 2020-02-21 三星电子株式会社 Storage device and operation method thereof
CN110491440A (en) * 2019-07-02 2019-11-22 深圳市金泰克半导体有限公司 A kind of internal storage testing method and system
CN110297726A (en) * 2019-07-03 2019-10-01 上海兆芯集成电路有限公司 With the computer system and memory modules control method that serially there is detection data

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