CN113451413B - Thin film transistor device and preparation method thereof - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
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- Manufacturing & Machinery (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses a thin film transistor device and a preparation method thereof. The pixel defining layer in the thin film transistor device is configured to block light rays with the wavelength less than 470 nanometers, which are emitted from one side of the pixel defining layer, so that more oxygen vacancy defects are prevented from being generated in a channel of the oxide semiconductor layer in the thin film transistor device due to the fact that the oxide semiconductor layer is irradiated by light with the wavelength less than 470 nanometers, and therefore threshold voltage negative shift can be effectively prevented, and stability of the device is improved.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a thin film transistor device and a preparation method thereof.
Background
A TFT (Thin Film Transistor) device type display screen is a mainstream display device on various notebook computers and desktop computers, and each liquid crystal pixel point on the display screen is driven by a Thin Film Transistor integrated behind the pixel point, so the TFT device type display screen is also an active matrix liquid crystal display device. The TFT device type display has the advantages of high responsivity, high brightness, high contrast, and the like, and has a display effect close to that of a CRT (Cathode Ray Tube) type display.
In a conventional TFT device type display screen, an oxide semiconductor (e.g., indium gallium zinc oxide) is generally used as an active layer in a TFT device, and the use of indium gallium zinc oxide as the active layer in the TFT device has many advantages, such as high electron mobility, high transmittance, and low cost.
At present, the functional layer (e.g., the pixel defining layer) on the oxide semiconductor layer generally uses organic materials, which do not have the blocking effect of uv/short wavelength visible light, and thus the uv and short wavelength visible light cannot be effectively prevented from irradiating the oxide semiconductor layer, thereby increasing the electrical instability of the TFT device.
Accordingly, there is a need for improvements and developments in the art.
Disclosure of Invention
In view of the foregoing deficiencies of the prior art, an object of the present invention is to provide a thin film transistor device and a method for manufacturing the same, which are used to solve the problem that light irradiation affects the stability of an oxide semiconductor layer in the conventional thin film transistor device.
A thin film transistor device, comprising:
a substrate;
a gate formed on the substrate;
the first protective layer is formed on the substrate and covers the grid;
an oxide semiconductor layer formed on the first protective layer and disposed corresponding to the gate electrode;
a source and a drain formed on the oxide semiconductor layer;
the second protective layer is formed on the source electrode and the drain electrode;
the flat layer is formed on the second protective layer;
an anode pattern layer formed on the planarization layer; the anode pattern layer is electrically connected with the drain electrode through a contact hole penetrating through the flat layer and the second protective layer;
a pixel defining layer formed on the anode pattern layer; the projection of the pixel defining layer on the substrate covers the oxide semiconductor layer, and the pixel defining layer is configured to block light with a wavelength less than 470 nanometers from one side of the pixel defining layer.
In one embodiment, the source electrode and the drain electrode of the thin film transistor device each include a titanium metal layer, an aluminum metal layer, and a molybdenum metal layer, which are sequentially stacked.
In one embodiment, the material of the oxide semiconductor layer includes indium gallium zinc oxide or rare earth metal oxide.
In one embodiment, the thin film transistor device, wherein the pixel defining layer comprises an organic material doped with a black polymer or a colored dye.
In one embodiment, the thin film transistor device, wherein the colored dye includes one or more of phthalocyanine dyes and pyrrolopyrrole dione organic dyes.
In one embodiment, the thin film transistor device, wherein the black polymer comprises perylene.
In one embodiment, the thin film transistor device, wherein the wavelength of light blocked by the pixel defining layer is between 300 nm and 470 nm.
A method of fabricating a thin film transistor device, comprising:
providing a substrate;
depositing a first metal layer on the substrate, and patterning the first metal layer to form a gate;
depositing a first protective layer on the substrate and the gate, wherein the first protective layer covers the gate;
depositing an oxide on the protective layer, and performing patterning treatment on the oxide to form an oxide semiconductor layer corresponding to the gate electrode;
forming a source electrode and a drain electrode on the oxide semiconductor layer;
forming a second protective layer and a flat layer on the source electrode and the drain electrode in sequence;
patterning the second protective layer and the flat layer to form a contact hole penetrating through the flat layer and the second protective layer;
forming an anode pattern layer on the planarization layer, wherein the anode pattern layer is electrically connected with the drain electrode through the contact hole;
and forming a pixel defining layer on the anode pattern layer, wherein the projection of the pixel defining layer on the substrate covers the oxide semiconductor layer, and the pixel defining layer is configured to block light with the wavelength less than 470 nanometers from one side of the pixel defining layer.
In one embodiment, the method for manufacturing a thin film transistor device, wherein the forming of the source and drain electrodes on the oxide semiconductor layer includes:
continuously depositing a titanium metal layer, an aluminum metal layer and a molybdenum metal layer on the oxide semiconductor layer;
the method comprises the steps of firstly etching a molybdenum metal layer and an aluminum metal layer by using a wet etching process, and then etching a titanium metal layer by using a dry etching process to form a source electrode and a drain electrode.
In one embodiment, the process for forming the pixel defining layer includes any one of magnetron sputtering, chemical vapor deposition, atomic deposition, spin coating, and inkjet printing.
Has the advantages that: in the thin film transistor device, the pixel defining layer is configured to block light with a wavelength smaller than 470 nanometers which is incident from one side of the pixel defining layer, so that more oxygen vacancy defects are prevented from being generated in a channel due to the fact that an oxide semiconductor layer in the thin film transistor device is irradiated by the light with the wavelength smaller than 470 nanometers, and therefore threshold voltage negative shift can be effectively prevented, and stability of the device is improved.
Drawings
Fig. 1 is a graph of electrical performance of a conventional thin film transistor device.
Fig. 2 is a schematic structural diagram of a conventional thin film transistor device.
Fig. 3 is a schematic structural diagram of a thin film transistor device according to the present invention.
Fig. 4 is a schematic structural diagram of a device after a gate is fabricated in the fabrication method of the present invention.
Fig. 5 is a schematic structural diagram of the device after the first protective layer is prepared in the preparation method of the present invention.
Fig. 6 is a schematic view of the device structure after the oxide semiconductor layer is prepared in the preparation method of the present invention.
Fig. 7 is a schematic structural diagram of a device after source and drain electrodes are prepared in the preparation method of the invention.
Fig. 8 is a schematic structural diagram of the device after the second protective layer is prepared in the preparation method of the present invention.
Fig. 9 is a schematic structural diagram of a device after a planarization layer is prepared in the preparation method of the present invention.
Fig. 10 is a schematic view of the device structure after an anode pattern layer is prepared in the preparation method of the present invention.
Fig. 11 is a schematic structural diagram of a device after a pixel defining layer is prepared in the preparation method of the present invention.
Description of reference numerals:
1: substrate, 2: a gate, 3: first protective layer, 4: oxide semiconductor layer, 5: source, drain, 6: second protective layer, 7: flat layer, 8: anode pattern layer, 9: a pixel definition layer.
Detailed Description
The present invention provides a thin film transistor device, and the present invention will be described in further detail below in order to make the objects, technical solutions, and effects of the present invention clearer and clearer. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Each liquid crystal pixel point on the liquid crystal display is driven by a thin film transistor integrated behind the liquid crystal display, so that screen information can be displayed at high speed, high brightness and high contrast, and a TFT-LCD (thin film transistor liquid crystal display) is one of the liquid crystal displays. The TFT device type screen is also widely applied to medium-high-end color screen mobile phones and is divided into 65536 colors, 16 ten thousand colors and 1600 ten thousand colors, and the display effect is very excellent. However, as shown in fig. 1, a TFT prepared by using indium gallium zinc oxide as an oxide semiconductor layer material according to a conventional method is prone to excite defect states such as oxygen vacancy in an oxide channel after being irradiated by light with a wavelength of less than 470nm during operation, thereby negatively shifting a threshold voltage.
The thin film transistor device may employ an Etch Stopper (ES) structure and a Back Channel Etching (BCE) structure as shown in fig. 2. The ES device has the advantages of small series resistance, no damage to a back channel, large opening current, low off-state current and the like; the BCE structure has the advantages of simple process and less photomask. The BCE structure is more commonly used on the premise that the device performance meets the requirements.
As shown in fig. 3, the present invention provides a thin film transistor device, comprising:
a substrate 1;
a gate 2 formed on the substrate 1;
a first protective layer 3 formed on the substrate 1 and covering the gate 2;
an oxide semiconductor layer 4 formed on the first protective layer 3 and provided corresponding to the gate electrode 2;
source and drain electrodes 5 formed on the oxide semiconductor layer 4;
a second protective layer 6 formed on the source and drain electrodes 5;
a planarization layer 7 formed on the second protective layer 6;
an anode pattern layer 8 formed on the planarization layer 7; the anode pattern layer 8 is electrically connected with the drain electrode through a contact hole penetrating through the flat layer 7 and the second protective layer 6;
a Pixel Definition Layer (PDL) 9 formed on the anode pattern layer 8; the projection of the pixel defining layer 9 on the substrate 1 covers the oxide semiconductor layer 4, and the pixel defining layer 9 is configured to block light with a wavelength less than 470nm incident from one side of the pixel defining layer.
In the thin film transistor device of the present invention, the pixel defining layer 9 side may refer to a side of the pixel defining layer 9 away from the oxide semiconductor layer 4. Light having a wavelength of less than 470nm in the present invention is generally UV light (ultraviolet light) and short wavelength visible light (higher energy visible light).
The pixel defining layer 9 of the present invention is configured to block light having a wavelength of less than 470nm incident from one side of the pixel defining layer, and prevent the oxide semiconductor layer in the thin film transistor device from generating more oxygen vacancy defects in the channel due to the irradiation of light having a wavelength of less than 470 nm.
In one implementation of the invention, the thin film transistor device includes: the pixel structure includes a substrate 1, a gate 2, a first protective layer (insulating layer) 3, an oxide semiconductor layer (active layer) 4, a source, a drain 5, a second protective layer (metal protective layer) 6, a planarization layer 7, an anode pattern layer 8, and a pixel defining layer 9, which are stacked in this order from bottom to top.
In the thin film transistor device, the source and drain electrodes 5 are composed of a source electrode and a drain electrode, and a position between the source electrode and the drain electrode corresponds to a channel region of the oxide semiconductor layer 4.
In addition, the thin film transistor device may further include a region having a stacked structure of: the second protective layer 6 is stacked on the source and drain electrodes, and the second protective layer 6 is stacked on the oxide semiconductor layer 4 in the channel region.
In one embodiment, the thin film transistor device further has the following regions: the first protective layer 3 is a region where the oxide semiconductor layer 4 is not stacked. A source electrode and a drain electrode 5 may be stacked on the first protective layer 3 in a region where the oxide semiconductor layer 4 is not stacked, i.e., a Capacitor Structure (CST) in the thin film transistor device is formed.
In one embodiment, the thin film transistor device further has the following regions: the area of the first protective layer 3 in contact with the second protective layer 6. Since the oxide semiconductor layer 4 and the source and drain electrodes 5 which are not stacked exist on the first protective layer 3 in the thin film transistor device, a region where the first protective layer 3 is in contact with the second protective layer 6 is formed.
In one embodiment, the thin film transistor device further has the following regions: a second protective layer 6 and a disconnected region of a planarization layer 7 through which the anode layer pattern layer is laminated on the source and drain electrodes 5, wherein the disconnected region is to allow the deposited anode to contact the source and drain electrodes, thereby achieving electrical conduction.
In one implementation of the present invention, the material of the Gate (Gate layer) 2 is a metal conductive material. The main material of the gate 2 is a conductive material with low conductivity, and specifically, the metal conductive material is one of copper, aluminum, molybdenum and titanium. In one implementation of the invention, the materials of the first protective layer 3 and the second protective layer 6 are both SiOxWherein 0 is<x is less than or equal to 2. The first holderThe protective layer 3 and said second protective layer 6 may be identical SiOxOr may be different SiOxI.e. SiO of the first protective layer 3 and the second protective layer 6xX in (2) may be the same or different. Further, SiOxWhere 1.65. ltoreq. x.ltoreq.1.75, alternatively x may be 1.70.
Indium Gallium Zinc Oxide (IGZO) is formed from In2O3、Ga2O3And ZnO is a transparent amorphous oxide semiconductor material formed by radio frequency magnetron sputtering. IGZO is a mixed semiconductor (the forbidden band width is 3.5V) In which ZnO is used as a main framework and heavy metal elements such as Ga and In are simultaneously doped, and the atomic ratio of IGZO materials is generally In: ga: zn is 1:1:1, IGZO has many excellent properties due to the unique electronic structure, for example, the electron mobility of IGZO can reach 10cm2V-1s-1Above, and amorphous silicon tends to be less than 1cm2V-1s-1. IGZO also has the advantage of high transmittance in the visible region, and can be used to prepare transparent display devices and flexible circuits. The IGZO is prepared at low temperature, so the production cost is low, and the TFT device prepared by the IGZO has a high on-off ratio and a small sub-threshold swing. In one implementation of the present invention, the material of the oxide semiconductor layer 4 is indium gallium zinc oxide. Of course, the material of the oxide semiconductor layer 4 according to the present invention is not limited to indium gallium zinc oxide, and other metal oxides, such as rare earth metal oxide, may be used.
In one implementation manner of the present invention, each of the source and the drain 5 includes a titanium metal layer 501, an aluminum metal layer 502, and a molybdenum metal layer 503, which are stacked in sequence. Specifically, the source and drain electrodes 5(SD layers) are a Ti layer 501, an Al layer 502, and a Mo layer 503, which are stacked in this order. That is, a Ti layer 501, an Al layer 502, and a Mo layer 503 are stacked in this order and provided on the oxide semiconductor layer 4. The Al layer 502 serves as a conductive layer, and the Ti layer 501 and the Mo layer 503 serve as functional layers; also, the resistance of Ti and Mo is relatively high compared to Al. Based on this, in the source and drain electrodes 5, the thickness of the Al layer 502 may be greater than the thickness of the Ti layer 501 and the thickness of the Mo layer 503, i.e., the thickness of the Al layer 502 is the largest.
The Planar Layer (PLN)7 is made of organic matter. In one implementation of the present invention, the planarization layer 7 is made of one of polyimide and benzocyclobutane.
In one implementation of the present invention, the material of the anode pattern layer 8 is an ITO material. ITO (indium Tin oxides) is an N-type oxide semiconductor, i.e., Indium Tin Oxide (ITO), and an ITO thin film layer is a transparent conductive layer of an ITO semiconductor.
In one embodiment of the present invention, the pixel defining layer 9 is a colored pixel defining layer or a black pixel defining layer. The colored pixel defining layer or the black pixel defining layer can absorb or reflect light with the wavelength less than 470 nanometers, so that the effect of effectively blocking the light with the wavelength less than 470 nanometers which is emitted from one side of the pixel defining layer is achieved, and more oxygen vacancy defects are prevented from being generated in a channel due to illumination of IGZO in the thin film transistor device.
The pixel definition layer 9 of the present invention can achieve the purpose of blocking light with a wavelength less than 470nm by using a colored organic material. Specifically, the colored organic material of the present invention may be a self-colored organic material (the organic material itself is colored); the colored organic material may also be a colored organic material obtained by doping other colored substances. The organic material may be Bank material, and the Bank material may be positive photoresist, such as cresol novolac resin. Wherein, the color refers to non-colorless transparent color.
In one embodiment, the pixel defining layer 9 includes an organic material doped with a black polymer or a colored dye. Specifically, the black polymer at least comprises a polymer material which can completely absorb light or only reflect non-visible light with the wavelength less than 390 nm; the colored dye at least comprises a dye capable of reflecting visible light with a wavelength less than 470 nm. The pixel definition layer 9 of the present invention includes an organic material doped with one or more black polymers or colored dyes, and absorbs or reflects light with a wavelength less than 470nm, thereby blocking light with a wavelength less than 470nm incident from one side of the pixel definition layer 9.
In one implementation of the invention, the colored organic material is an organic material doped with a colored dye. The invention converts the colorless and transparent organic material into the colored organic material or changes the color of the original organic material by doping the colored dye in the organic material. It can be seen that the organic material doped with the colored dye can conveniently change the organic material for obtaining the required color by changing the type and the dosage of the colored dye, and can realize the purpose of blocking light rays in a specific wavelength range.
In one implementation of the present invention, the present invention obtains a black organic material by doping a black organic-based dye in the organic material. The black organic material can block almost all wavelengths of light including light with a wavelength less than 470 nanometers, so that the oxide semiconductor layer 3 of the device is protected, and the stability of the device is improved.
In one embodiment of the present invention, the black organic dye is perylene. The perylene has good light-blocking effect and stable chemical property.
In one implementation mode of the invention, the colored dye is one or more of phthalocyanine dyes and pyrrolopyrrole diketone organic dyes. Experiments show that compared with other organic dyes, the phthalocyanine dye and the pyrrolopyrrole diketone organic dye can effectively block ultraviolet light and most visible light.
In one implementation mode of the present invention, the colored organic material is a non-black colored organic material, and can be specifically prepared by doping the organic material with the above-mentioned colored dye. The non-black colored organic material is only capable of transmitting infrared light with lower energy, i.e. the non-black colored organic material can block short wavelength light and most visible light. In other words, the non-black colored organic material can transmit light with a wavelength greater than or equal to 470nm and block light with a wavelength less than 470 nm. Compared with a black organic material for blocking almost all light, the non-black colored organic material can realize the function of infrared light alignment while realizing the protection of devices, and is easier to realize the patterning of the organic material.
It should be noted that the dye of the present invention refers to a colored chemical substance, and is not limited to a conventional chemical dye, and the colored chemical substance can be doped into an organic material to block light with a wavelength of less than 470 nm.
The present invention can configure the wavelength range in which the corresponding pixel defining layer 9 blocks light according to the oxide employed for the oxide semiconductor layer 4. Specifically, the respective pixel defining layers 9 are configured to specifically block light rays in the wavelength ranges corresponding to the oxides susceptible to oxygen vacancy defects, based on the difference in the degree of sensitivity of the oxides to oxygen vacancy defects generated by light rays of different wavelengths. In one implementation of the present invention, the wavelength of the light blocked by the pixel defining layer is between 300 nanometers and 470 nanometers.
The invention also provides a preparation method of the indium gallium zinc thin film transistor device, wherein the preparation method comprises the following steps:
s101, providing a substrate 1;
s102, depositing a first metal layer on the substrate 1, and patterning the first metal layer to form a grid 2;
s103, depositing a first protective layer 3 on the substrate 1 and the grid 2, wherein the first protective layer 3 covers the grid 2;
s104, depositing an oxide on the first protective layer 3, and patterning the oxide to form an oxide semiconductor layer 4 corresponding to the grid 2;
s105, forming a source electrode and a drain electrode 5 on the oxide semiconductor layer 4;
s106, sequentially forming a second protective layer 6 and a flat layer 7 on the source electrode 5 and the drain electrode 5;
s107, patterning the second protective layer 6 and the flat layer 7 to form a contact hole penetrating through the flat layer 7 and the second protective layer 6;
s108, forming an anode pattern layer 8 on the flat layer 7, wherein the anode pattern layer 8 is electrically connected with the drain electrode through the contact hole;
s109, forming a pixel defining layer 9 on the anode pattern layer 8, wherein the projection of the pixel defining layer 9 on the substrate 1 covers the oxide semiconductor layer 4, and the pixel defining layer 9 is configured to block light with a wavelength less than 470nm incident from one side of the pixel defining layer 9.
The pixel defining layer 9 prepared by the invention is configured to block light with a wavelength less than 470 nanometers which is incident from one side of the pixel defining layer 9, so that more oxygen vacancy defects can be prevented from being generated in a channel of the oxide semiconductor layer 9 in the thin film transistor device due to the irradiation of the light with the wavelength less than 470 nanometers, the negative shift of the threshold voltage can be effectively prevented, and the stability of the device can be further improved.
More specifically, the method for preparing the indium gallium zinc oxide TFT substrate comprises the following steps:
s101, providing a substrate 1;
s102, depositing a first metal layer on the substrate 1, and performing patterning on the first metal layer to form a Gate 21(Gate layer), as shown in fig. 4;
s103, depositing SiO on the grid 2xMaterial, the first protective layer 3 is prepared as shown in FIG. 5, wherein 0<x≤2；
S104, depositing an indium gallium zinc oxide on the first protection layer 3, and patterning the indium gallium zinc oxide to form an oxide semiconductor layer 44 corresponding to the gate electrode 2, as shown in fig. 6;
s105, continuously depositing a Ti layer 501, an Al layer 502 and a Mo layer 503 on the oxide semiconductor layer 4, and preparing a source electrode and a drain electrode 5(SD) after gluing, exposing, developing and etching, as shown in FIG. 7;
s106, depositing SiO on the source electrode and the drain electrode 5xMaterial, a second protective layer 6 is prepared as shown in fig. 8, wherein 0<x is less than or equal to 2; then depositing one of polyimide and benzocyclobutane on the second protective layer 6 to prepare a flat layer 7 (PLN);
s107, patterning the second protective layer 6 and the flat layer 7 to form a contact hole penetrating through the flat layer 7 and the second protective layer 6, as shown in FIG. 9;
s108, depositing an ITO material on the flat layer 7, and after gluing, exposing, developing and etching, electrically connecting the anode pattern layer 8 with the drain electrode through the contact hole to prepare and form an anode pattern layer 8 as shown in FIG. 10;
s109, depositing a bank material doped with a colored dye or a black polymer on the anode pattern layer 8 to form a pixel defining layer 9, wherein a projection of the pixel defining layer 9 on the substrate 1 covers the oxide semiconductor layer 4.
S101 is specifically to deposit a metal conductive material on a substrate, sequentially perform processes of glue coating, exposure, development, and etching to form a Gate 2(Gate layer), where the Gate 2 is mainly made of a conductive material with low conductivity, such as copper (Cu), aluminum (Al), molybdenum (Mo), and titanium (Ti). The processes of photoresist coating, exposure, development and etching for patterning are mature processes in the field, and thus are not described again.
In one embodiment of the present invention, the forming of the source and drain electrodes 5 on the oxide semiconductor layer 4 includes:
a titanium metal layer 501, an aluminum metal layer 502 and a molybdenum metal layer 503 are continuously deposited on the oxide semiconductor layer 4;
the molybdenum metal layer 503 and the aluminum metal layer 502 are etched by using a wet etching process, and then the titanium metal layer 501 is etched by using a dry etching process to form the source and the drain 5.
Specifically, a metal Ti/Al/Mo is continuously deposited on the oxide semiconductor layer 4, and a source drain 5(SD) is formed by sequentially performing coating, exposure, development, and etching. Wherein, Ti is used as an etching barrier layer in the Al/Mo etching process to protect IGZO from being eroded by etching liquid aluminum acid, and etching liquid BCl is used after the Al/Mo etching is finished3/Cl2 The Ti layer 501 is etched.
In one implementation of the present invention, the forming process of the pixel defining layer 9 includes any one of magnetron sputtering, chemical vapor deposition, atomic deposition, spin coating, and inkjet printing processes.
The technical solution of the present invention will be described below by specific examples.
The preparation method of the indium gallium zinc thin film transistor device comprises the following steps:
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.
Claims (6)
1. A thin film transistor device, comprising:
a substrate;
a gate formed on the substrate;
the first protective layer is formed on the substrate and covers the grid;
an oxide semiconductor layer formed on the first protective layer and disposed corresponding to the gate electrode;
a source electrode and a drain electrode formed on the oxide semiconductor layer;
the second protective layer is formed on the source electrode and the drain electrode;
the flat layer is formed on the second protective layer;
an anode pattern layer formed on the planarization layer; the anode pattern layer is electrically connected with the drain electrode through a contact hole penetrating through the flat layer and the second protective layer;
a pixel defining layer formed on the anode pattern layer; the projection of the pixel defining layer on the substrate covers the oxide semiconductor layer, and the pixel defining layer is configured to block light with a wavelength less than 470 nanometers from one side of the pixel defining layer;
the source electrode and the drain electrode respectively comprise a titanium metal layer, an aluminum metal layer and a molybdenum metal layer which are sequentially stacked;
providing the source and drain electrodes in a region where the oxide semiconductor layer is not stacked on the first protective layer; the source and the drain are composed of a source electrode and a drain electrode, the position between the source electrode and the drain electrode corresponds to a channel region of the oxide semiconductor layer, the second protective layer is laminated on the oxide semiconductor layer in the channel region, and the titanium metal layers are respectively positioned on two sides of the channel region and cover the edge of the oxide semiconductor layer; the second protective layer and the flat layer are provided with a disconnected region, the disconnected region is positioned between the two gates, and the anode layer pattern layer is laminated on the source electrode and the drain electrode through the disconnected region;
the pixel defining layer comprises an organic material doped with black macromolecules or colored dyes, the black macromolecules comprise macromolecular materials which completely absorb light or only reflect non-visible light with the wavelength less than 390nm, and the colored dyes comprise dyes which reflect visible light with the wavelength less than 470 nm; the pixel defining layer extends into the off region.
2. The thin film transistor device according to claim 1, wherein a material of the oxide semiconductor layer comprises indium gallium zinc oxide or rare earth metal oxide.
3. The thin film transistor device of claim 1, wherein the colored dye comprises one or more of a phthalocyanine-based dye, a pyrrolopyrrole-dione-based organic dye.
4. The thin film transistor device of claim 1, wherein the black polymer comprises perylene.
5. A method of fabricating a thin film transistor device, comprising:
providing a substrate;
depositing a first metal layer on the substrate, and patterning the first metal layer to form a gate;
depositing a first protective layer on the substrate and the gate, wherein the first protective layer covers the gate;
depositing an oxide on the protective layer, and performing patterning treatment on the oxide to form an oxide semiconductor layer corresponding to the gate electrode;
forming a source electrode and a drain electrode on the oxide semiconductor layer;
sequentially forming a second protective layer and a flat layer on the source electrode and the drain electrode;
patterning the second protective layer and the flat layer to form a contact hole penetrating through the flat layer and the second protective layer;
forming an anode pattern layer on the planarization layer, wherein the anode pattern layer is electrically connected to the drain electrode through the contact hole;
forming a pixel defining layer on the anode pattern layer, wherein the projection of the pixel defining layer on the substrate covers the oxide semiconductor layer, and the pixel defining layer is configured to block light with a wavelength less than 470 nanometers from one side of the pixel defining layer;
the forming of the source and drain electrodes on the oxide semiconductor layer includes:
continuously depositing a titanium metal layer, an aluminum metal layer and a molybdenum metal layer on the oxide semiconductor layer;
etching the molybdenum metal layer and the aluminum metal layer by using a wet etching process, and etching the titanium metal layer by using a dry etching process to form a source electrode and a drain electrode;
providing the source and drain electrodes in a region where the oxide semiconductor layer is not stacked on the first protective layer; the source and the drain are composed of a source electrode and a drain electrode, the position between the source electrode and the drain electrode corresponds to a channel region of the oxide semiconductor layer, the second protective layer is laminated on the oxide semiconductor layer in the channel region, and the titanium metal layers are respectively positioned on two sides of the channel region and cover the edge of the oxide semiconductor layer; the second protective layer is provided with a disconnected region which is positioned between the two gates, and the anode layer pattern layer is laminated on the source electrode and the drain electrode through the disconnected region;
the pixel defining layer comprises an organic material doped with black macromolecules or colored dyes, the black macromolecules comprise macromolecular materials which completely absorb light or only reflect non-visible light with the wavelength less than 390nm, and the colored dyes comprise dyes which reflect visible light with the wavelength less than 470 nm; the pixel defining layer extends into the off region.
6. The method for manufacturing a thin film transistor device according to claim 5, wherein the forming process of the pixel defining layer comprises any one of magnetron sputtering, chemical vapor deposition, atomic deposition, spin coating, and inkjet printing processes.
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