CN113193869B - Ultra-low phase noise frequency synthesizer based on acoustic surface filter - Google Patents

Ultra-low phase noise frequency synthesizer based on acoustic surface filter Download PDF

Info

Publication number
CN113193869B
CN113193869B CN202110507745.7A CN202110507745A CN113193869B CN 113193869 B CN113193869 B CN 113193869B CN 202110507745 A CN202110507745 A CN 202110507745A CN 113193869 B CN113193869 B CN 113193869B
Authority
CN
China
Prior art keywords
frequency
signal
oscillator
frequency signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110507745.7A
Other languages
Chinese (zh)
Other versions
CN113193869A (en
Inventor
句博文
云恩学
李青林
郝强
刘国宾
高玉平
张首刚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Time Service Center of CAS
Original Assignee
National Time Service Center of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Time Service Center of CAS filed Critical National Time Service Center of CAS
Priority to CN202110507745.7A priority Critical patent/CN113193869B/en
Publication of CN113193869A publication Critical patent/CN113193869A/en
Application granted granted Critical
Publication of CN113193869B publication Critical patent/CN113193869B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

The invention provides an ultralow phase noise frequency synthesizer based on an acoustic surface filter, wherein a microwave signal generated by a constant-temperature crystal oscillator is divided into a plurality of paths through a frequency distributor, one path is used as a main frequency signal, the other path is used as a reference clock signal and is output to a direct digital frequency synthesizer to generate a secondary frequency signal; mixing the primary frequency signal and the secondary frequency signal through a mixer, and performing band-pass filtering on the output radio frequency signal through an acoustic surface filter to obtain a sum frequency signal; the sum frequency signal is amplified by power and then is sent to a phase discriminator, and is compared with the radio frequency signal output by the medium oscillator after passing through the frequency divider to obtain an error signal, the output signal of the phase discriminator is input into the voltage control end of the medium oscillator through the loop filter, and the frequency of the medium oscillator is locked to the local oscillator, so that the required target frequency is finally obtained. The invention has simple structure, the phase noise is close to the limit of theoretical frequency multiplication noise, and the invention is suitable for small and miniaturized microwave atomic clocks.

Description

Ultra-low phase noise frequency synthesizer based on acoustic surface filter
Technical Field
The invention belongs to the field of microwaves and atomic clocks, and particularly relates to a frequency synthesizer technology which can realize an ultralow phase noise microwave source and is applied to a miniaturized and miniaturized Coherent Placement Trapping (CPT) atomic clock.
Background
The Coherent Placement Trapping (CPT) based on the quantum interference principle can realize a miniaturized atomic clock, and is the only atomic clock for realizing the chip at present. Microminiature atomic clocks are ideal for applications such as micro-nano satellites, unmanned aerial vehicles, portable GNSS receivers, submarines, etc. where volume, weight, power consumption are limited and precise time is required.
Currently, small Coherent Population Trapping (CPT) atomic clocks in the world have a short term frequency stability of 10 -11 τ -1/2 In the order of magnitude of the magnitude,chip CPT atomic clock at 10 -10 τ -1/2 The magnitude, in which the phase noise of microwaves is an important influencing factor, influences the frequency stability of atomic clocks by intermodulation effects, and can be expressed in particular as:
wherein f c 、f m The frequency is Zhong Yue and the microwave modulation frequency,is the frequency deviation 2f of the microwave m Power spectral density of phase noise at. Based on 87 CPT atomic clock of Rb as an example, zhong Yueqian frequency f c Wavelength of about 6.83468GHz, microwave modulation frequency f m Typically around 100Hz, to provide a CPT atomic clock with a short term frequency stability of 10 -13 τ -1/2 The magnitude of the phase noise of the microwaves is required to be below-100 dBc/Hz@200Hz, which puts higher demands on the phase noise of the microwaves.
In the microwave source method for realizing ultra-low phase noise, the scheme based on the photo-generated microwaves and the ultra-low temperature sapphire oscillator (CSO) is difficult to apply to a microminiature atomic clock because of huge volume, high power consumption, complex system and high cost. The microwave source based on the ultra-low noise constant temperature crystal oscillator (OCXO) is a better and feasible solution because of small volume, power consumption and weight.
At present, microwave frequency synthesis based on OCXO increases complexity of a frequency synthesis link in order to realize lower phase noise. Taking the technical scheme of article A low phase noise microwave frequency synthesis for a high-performance cesium vapor cell atomic clock as an example, the frequency synthesizer is complex in structure due to the use of multiple filtering amplification and multiple mixing processing, and the phase noise is deteriorated due to the introduction of multiple amplifiers. The link structure of the frequency synthesizer is optimized for the microminiature CPT atomic clock, and the phase noise of the link structure is close to the ideal frequency multiplication performance, so that the link structure is very necessary for developing the high-performance microminiature CPT atomic clock.
Disclosure of Invention
In order to solve the problems of complex structure, poor phase noise and the like of the traditional OCXO-based microwave frequency synthesizer, the invention provides the ultra-low phase noise frequency synthesizer based on the acoustic surface filter, which is applied to a Coherent Population Trapping (CPT) atomic clock.
The technical scheme adopted for solving the technical problems is as follows: an ultra-low phase noise frequency synthesizer based on an acoustic surface filter comprises a constant temperature crystal oscillator, a frequency distributor, a direct digital frequency synthesizer, a mixer, an acoustic surface band-pass filter, a power amplifier, a phase discriminator, a loop filter, a frequency divider and a dielectric oscillator.
The microwave signal generated by the constant temperature crystal oscillator is divided into a plurality of paths through a frequency distributor, wherein one path is used as the frequency f 0 The other path is used as a reference clock signal to be output to a direct digital frequency synthesizer to generate a frequency f 1 Is a secondary frequency signal of (2); mixing the primary frequency signal and the secondary frequency signal through a mixer, and performing band-pass filtering on the output radio frequency signal through an acoustic surface filter to obtain a sum frequency signal; the sum frequency signal is used as a reference signal to be sent to a phase discriminator after passing through a power amplifier, and is subjected to phase comparison with a radio frequency signal which is output by a medium oscillator and passes through a frequency divider to obtain an error signal, the output signal of the phase discriminator is input into a voltage control end of the medium oscillator through a loop filter, the frequency of the medium oscillator is locked to a local oscillator, and the required target frequency f is finally obtained s
The constant temperature crystal oscillator adopts a 100MHz constant temperature crystal oscillator.
The microwave signal generated by the constant temperature crystal oscillator is output by a frequency divider, and a 10MHz standard frequency signal is output by a frequency divider.
The frequency f of the secondary frequency signal 1 =f s /N-f 0 Wherein the frequency division factor N is an integer, f is taken 1 Is the minimum value f of (2) 1min =Min[f s /N-f 0 ]At this time, the frequency division factorSub-taking optimum value N opt
The center frequency of the sound surface filter is f 0 +f 1 Or f 0 -f 1 With passband bandwidth less than (f 1 /3) band-pass pair f 0 ,f 0 +/-2f 1 The harmonic clutter suppression is greater than 60dB.
The dielectric oscillator, the frequency divider, the loop filter and the phase discriminator are replaced by a phase-locked loop chip with a voltage-controlled oscillator.
The beneficial effects of the invention are as follows:
1. the invention can realize the frequency synthesis of ultra-low phase noise. The frequency synthesizer mixes the frequencies before outputting the radio frequency, avoids introducing unnecessary frequencies, can avoid frequency conversion loss and increases the power of output frequency signals.
2. Compared with the traditional band-pass filter, the acoustic surface band-pass filter can realize the precise filtering of amplitude-frequency characteristics and phase-frequency characteristics of required frequency precision, and has the advantages of narrow passband width, small passband fluctuation, low insertion loss, high out-of-band suppression, pure output frequency spectrum and harmonic clutter suppression of more than 60dB.
3. Simple structure, lower overall power consumption and high flexibility. The dielectric oscillator, the frequency divider and the phase discriminator adopted in the structure can be replaced by a phase-locked loop chip with a voltage-controlled oscillator (VCO) with extremely small volume and power consumption, so that the power consumption can be further reduced, the frequency stability of the chip atomic clock is improved, and the high-performance chip atomic clock is realized.
Drawings
FIG. 1 shows the application of the present invention to 87 Structural schematic diagram of Rb (Rb) CPT (coherent population trapping) atomic clock for generating 3.417GHz microwaves based on 100MHz crystal oscillator
Fig. 2 is a schematic diagram of the pre-filter spectrum of the mixer of the present invention.
Fig. 3 is a schematic diagram of the pre-filter spectrum of the mixer of the present invention.
Fig. 4 is a graph of a typical phase noise test for a 3.417GHz microwave generated by the present invention.
Wherein 1-constant temperature Crystal Oscillator (OCXO), 2-frequency distributor, 3-N 0 Frequency dividers, 4-direct digital frequency synthesizers (DDS), 5-mixers,6-acoustic surface bandpass filters (SAW), 7-power amplifiers, 8-phase detectors, 9-loop filters, 10-N dividers, 11-dielectric oscillators.
Detailed Description
The invention will be further described with reference to the accompanying drawings and examples, which include but are not limited to the following examples, and all techniques realized based on the present disclosure are within the scope of the invention.
The invention provides an ultralow phase noise frequency synthesizer based on an acoustic surface filter, which comprises a constant temperature crystal oscillator (OXCO) 1 with 100MHz, a frequency distributor 2 with an input end connected with a 100MHz crystal oscillator signal, a direct digital frequency synthesizer 4 with an input end connected with an output end of the frequency distributor, a mixer 5 with an input end connected with an output end of the direct digital frequency synthesizer and an output end of the frequency distributor, an acoustic surface filter (SAW) 6 with an input end connected with an output end of the mixer, a power amplifier 7 with an input end connected with an output end of the filter, a phase detector 8 with an input end connected with the power amplifier, a loop filter 9 with an input end connected with the phase detector, a medium oscillator 11 with an input end connected with the loop filter, an N frequency divider 10 with an input end connected with the medium oscillator, and an output end of the N frequency divider connected with an input end of the phase detector.
The invention generates a main frequency (f) by using an OCXO and a DDS with ultra-low phase noise 0 ) And the secondary frequency (f 1 ) A signal, optimally setting the frequency (f) of the secondary frequency signal 1min ) The method comprises the steps of carrying out a first treatment on the surface of the Mixing the primary frequency signal and the secondary frequency signal, obtaining a sum frequency (or difference frequency) signal after the high-Q value sound surface band-pass filtering, and locking the DRO through a phase discriminator to realize ultra-low phase noise microwaves close to an ideal frequency multiplier.
Wherein the frequency of the secondary frequency signal is f 1 =f s /N-f 0 Wherein the frequency division factor N is an integer, f s To represent the desired target frequency, f is required to minimize the phase noise of the sub-frequency signal generated by the DDS 1 To the minimum; at the same time, f is needed in order to optimize the phase noise of the sum (or difference) signal output by the mixer 1 /(f 0 +f 1 ) To a minimum, both require f 1 To the minimum, thereby taking f 1 Is the minimum value f of (2) 1min =Min[f s /N-f 0 ]At this time, the frequency division factor takes an optimal value: n (N) opt
Taking Coherent Population Trapping (CPT) atomic clock based on half-wave modulation (half of Zhong Yue migration frequency) as an example, as shown in fig. 1, a constant temperature crystal oscillator (OXCO) with 100MHz is adopted, a frequency distributor with an input end connected with a 100MHz crystal oscillator signal, a direct digital frequency synthesizer with an input end connected with an output end of the frequency distributor, a mixer with an input end connected with an output end of the direct digital frequency synthesizer and an output end of the frequency distributor, an acoustic surface filter (SAW) with an input end connected with an output end of the mixer, a power amplifier with an input end connected with an output end of the filter, a phase detector with an input end connected with the power amplifier, a loop filter with an input end connected with the phase detector, a medium oscillator with an input end connected with the loop filter, an N frequency divider with an input end connected with the medium oscillator, and an output end of the N frequency divider is connected with an input end of the phase detector.
In the present embodiment, the input 100MHz microwave signal (f 0 ) The low-noise 100MHz constant temperature crystal oscillator 1 is generated and divided into a plurality of paths after passing through a frequency distributor 2, wherein the first path is used as a main frequency signal of 100MHz; the second path is used as a reference clock signal to be output to a direct digital frequency synthesizer (DDS) 3 to generate a frequency-modulated and tunable secondary frequency signal of 0.5MHz (f 1 ) Because the frequency is far lower than the reference clock signal (f 1 ≤f 0 100), low phase noise can be achieved. The third path is through the frequency divider with low phase noise, the frequency division factor is N 0 =f 0 /10 7 And outputting a 10MHz standard frequency signal. The first path of primary frequency signal and the second path of secondary frequency signal are respectively connected to a local oscillator and an intermediate frequency port of the mixer 4 for mixing, so as to generate a radio frequency signal of 100MHz+0.5MHz, the output radio frequency signal is subjected to high Q value band-pass filtering of an acoustic surface filter (SAW) 5, a sum frequency signal is obtained, and other signals are effectively filtered. After passing through the low noise power amplifier 7, the sum frequency signal is sent to the phase discriminator 8 as a reference signal, and is compared with the radio frequency signal of the dielectric oscillator 11 after passing through the frequency divider (the frequency division factor is N) 10, and an error signal is obtained,the medium oscillator frequency is locked to the local oscillator through a loop filter 9 and a proportional integral circuit, and the required target frequency f is finally obtained s 3.417GHz. And within the feedback bandwidth, the phase noise of the microwave signal output by the medium oscillator is mainly determined by the local oscillator.
The embodiment adopts f with better frequency deviation of 100Hz (corresponding to the modulation frequency of the atomic clock) accessory phase noise 0 Local oscillation of =100 MHz, for 87 Rb atom, f s =3417.34MHz,f 1min =0.51MHz,N opt =34; for the following 85 Rb atom, f s =3035.7MHz,f 1min =1.19MHz,N opt =15; for the following 133 Cs atoms, f s =4596.3MHz,f 1min =0.08MHz,N opt =46; in the case of CPT atomic clock employing full-wave modulation, compared with the case of half-wave modulation, the target frequency f is outputted s Doubling, f 1min Unchanged, N opt Doubling.
The invention uses PLL and DRO to multiply frequency, the PLL performs phase locking, so that the frequency signal output by DRO is directly synchronized to the filtered mixer output sum frequency (or difference frequency) signal.
The loop filter performs low-pass filtering on the voltage error signal output by the phase discriminator and then sends the voltage error signal as a control signal to the voltage control end of the medium oscillator, so that the frequency of the medium oscillator is locked to the local oscillator.
The SAW filter of the present invention is an acoustic surface filter, and FIG. 2 shows a comparison of the front and rear of the filtering using an acoustic surface filter (SAW), an acoustic surface bandpass filter is employed, the center frequency of which is f 0 +f 1 (or f) 0 -f 1 ) The temperature coefficient of the center frequency is smaller (less than or equal to 1 ppm/DEG C), other components are filtered out in order to obtain the sum frequency (or difference frequency) component signals output by the mixer, the Q value is higher (more than or equal to 100), and the 3dB passband bandwidth is far smaller than f 1 (less than f 1 And 3) the passband ripple is smaller (less than or equal to 1 dB), and the out-of-band rejection is larger (more than or equal to 60 dB).
The final output signal of the invention is DRO signal, so that the module output has better clutter suppression performance under the action of the loop filter. A digital frequency divider and a digital phase detector with low phase noise base are selected, so that the loop outputs lower phase noise finally, which is close to the theoretical phase noise, namely, is deteriorated according to 20log N based on the input 100.5MHz signal phase noise.
The frequency source with low phase noise provided by the embodiment realizes model machine development in a modularized mode, and each component module is independent in structure, can form a whole machine and can also be independently used. And the output signal achieves the purpose of ultralow phase noise by using a phase noise meter APPH20G test, and has excellent performance.
In conclusion, the 3.417GHz frequency synthesizer system has the characteristics of simple structure, phase noise approaching to the limit of theoretical frequency multiplication noise, small stray, high frequency table resolution, easy debugging and the like, and can be applied to Coherent Population Trapping (CPT) atomic clocks with high performance.
The present invention is not limited to the above-described embodiments, but various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the claims of the present application.

Claims (2)

1. The ultra-low phase noise frequency synthesizer based on acoustic surface filter includes constant temperature crystal oscillator, frequency distributor, direct digital frequency synthesizer, mixer, acoustic surface band-pass filter, power amplifier, phase discriminator, loop filter, frequency divider and medium oscillator, and features that the microwave signal produced by the constant temperature crystal oscillator is divided into several paths via the frequency distributor, one of which is used as frequency f 0 The other path is used as a reference clock signal to be output to a direct digital frequency synthesizer to generate a frequency f 1 Is a secondary frequency signal of (2); mixing the primary frequency signal and the secondary frequency signal through a mixer, and performing band-pass filtering on the output radio frequency signal through an acoustic surface filter to obtain a sum frequency signal; the sum frequency signal is used as a reference signal to be sent to a phase discriminator after passing through a power amplifier, and is subjected to phase comparison with a radio frequency signal which is output by a medium oscillator and passes through a frequency divider, so as to obtain an error signal, and the output signal of the phase discriminatorThe voltage control end of the medium oscillator is input through the loop filter, the frequency of the medium oscillator is locked to the local oscillator, and the required target frequency f is finally obtained s
The frequency f of the secondary frequency signal 1 =f s /N-f 0 Wherein the frequency division factor N is an integer, f is taken 1 Is the minimum value f of (2) 1min =Min[f s /N-f 0 ]At this time, the frequency division factor takes the optimal value N opt
The center frequency of the sound surface filter is f 0 +f 1 Or f 0 -f 1 With a bandpass bandwidth less than (f) 1 3) band-pass outer pair f 0 ,f 0 +/-2f 1 The harmonic clutter suppression is greater than 60dB.
2. The ultra-low phase noise frequency synthesizer based on an acoustic surface filter according to claim 1, wherein the dielectric oscillator, frequency divider, loop filter and phase discriminator are replaced by a phase-locked loop chip with a voltage controlled oscillator.
CN202110507745.7A 2021-05-10 2021-05-10 Ultra-low phase noise frequency synthesizer based on acoustic surface filter Active CN113193869B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110507745.7A CN113193869B (en) 2021-05-10 2021-05-10 Ultra-low phase noise frequency synthesizer based on acoustic surface filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110507745.7A CN113193869B (en) 2021-05-10 2021-05-10 Ultra-low phase noise frequency synthesizer based on acoustic surface filter

Publications (2)

Publication Number Publication Date
CN113193869A CN113193869A (en) 2021-07-30
CN113193869B true CN113193869B (en) 2024-04-05

Family

ID=76980952

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110507745.7A Active CN113193869B (en) 2021-05-10 2021-05-10 Ultra-low phase noise frequency synthesizer based on acoustic surface filter

Country Status (1)

Country Link
CN (1) CN113193869B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115065361B (en) * 2022-08-19 2022-12-06 深圳芯盛思技术有限公司 Frequency synthesizer architecture for optimizing phase noise

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101771382A (en) * 2009-12-18 2010-07-07 武汉虹信通信技术有限责任公司 Method and device for realizing frequency fine tuning by utilizing direct digital synthesis technology
CN105553475A (en) * 2015-12-18 2016-05-04 中国电子科技集团公司第四十一研究所 High frequency point frequency source synthetic circuit based on digital frequency division and harmonic frequency mixing
CN107202577A (en) * 2017-06-08 2017-09-26 南京理工大学 A kind of micro- PNT systems based on GNSS, chip atomic clock and micro- inertial navigation

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6627489B2 (en) * 2015-12-21 2020-01-08 セイコーエプソン株式会社 Timing signal generator and electronic equipment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101771382A (en) * 2009-12-18 2010-07-07 武汉虹信通信技术有限责任公司 Method and device for realizing frequency fine tuning by utilizing direct digital synthesis technology
CN105553475A (en) * 2015-12-18 2016-05-04 中国电子科技集团公司第四十一研究所 High frequency point frequency source synthetic circuit based on digital frequency division and harmonic frequency mixing
CN107202577A (en) * 2017-06-08 2017-09-26 南京理工大学 A kind of micro- PNT systems based on GNSS, chip atomic clock and micro- inertial navigation

Also Published As

Publication number Publication date
CN113193869A (en) 2021-07-30

Similar Documents

Publication Publication Date Title
CN104135280B (en) Harmonic generation and mixing frequency source circuit
EP2873152B1 (en) Ultra low phase noise signal source
JPH01151823A (en) Frequency synthesizer
CN106067815B (en) Frequency synthesizer based on DDS and fractional frequency division phase-locked loop
TW201020715A (en) Frequency generation techniques
CN113193869B (en) Ultra-low phase noise frequency synthesizer based on acoustic surface filter
CN211830747U (en) Link structure of ultralow phase noise and low stray stepping frequency source
CN113541678A (en) Double-loop mixing phase-locking circuit, device and phase-locking method
CN113726334A (en) S-band low-phase-noise low-spurious fine-stepping frequency source component and using method
CN117081583B (en) Frequency source for improving phase noise
CN105634483A (en) Millimeter wave frequency source for mercury ion microwave frequency standard
KR101007210B1 (en) High frequency synthesizer for airbone with compact size
CN109412591B (en) X-waveband fine-stepping frequency synthesis generation method and system
RU195894U1 (en) Frequency synthesizer
CN115940938A (en) Low-phase-noise fast broadband frequency sweeping frequency source
CN113162617B (en) Low-phase-noise X-band frequency source and modulation method thereof
CN211830748U (en) C-band high-performance frequency synthesis system
US6198354B1 (en) System for limiting if variation in phase locked loops
RU2517424C1 (en) Frequency synthesiser with switched frequency reduction channels
CN105978563A (en) Digital phase-locked modulation frequency multiplier for rubidium atomic frequency standard
CN214412703U (en) Phase-locked loop device for signal frequency division
TW200527914A (en) Television tuner and method of processing a received RF signal
KR970008805B1 (en) Pll frequency synthesizer
CN114448433B (en) Low-noise microwave excitation source for cesium atomic clock
US3866137A (en) Phase locked frequency divider circuitry

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant