CN113111619A - Power supply network simulation method and system based on spectrogram sparseness - Google Patents
Power supply network simulation method and system based on spectrogram sparseness Download PDFInfo
- Publication number
- CN113111619A CN113111619A CN202110412255.9A CN202110412255A CN113111619A CN 113111619 A CN113111619 A CN 113111619A CN 202110412255 A CN202110412255 A CN 202110412255A CN 113111619 A CN113111619 A CN 113111619A
- Authority
- CN
- China
- Prior art keywords
- tree
- edge
- node
- equivalent weight
- sparse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/90—Details of database functions independent of the retrieved data types
- G06F16/901—Indexing; Data structures therefor; Storage structures
- G06F16/9024—Graphs; Linked lists
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2113/00—Details relating to the application field
- G06F2113/04—Power grid distribution networks
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Databases & Information Systems (AREA)
- Data Mining & Analysis (AREA)
- Geometry (AREA)
- Evolutionary Computation (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Software Systems (AREA)
- Pure & Applied Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computing Systems (AREA)
- Algebra (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Abstract
The invention provides a power supply network simulation method based on spectrogram sparseness, which is characterized in that a weighted undirected graph, a right end item and a netlist Laplace matrix corresponding to the weighted undirected graph are established through an SPICE netlist of a power supply network, and sparse subgraphs of the weighted undirected graph are obtained; establishing a sparse Laplace matrix corresponding to the sparse subgraph, and removing rows and columns corresponding to the grounding point in the Laplace matrix of the netlist and the sparse Laplace matrix; and for the sparse Laplace matrix LPPerforming Cholesky decomposition to obtain a triangular matrix; setting a convergence threshold value to connect the triangular matrixSolving a linear equation set L by operating a preconditioned conjugate gradient method as a preconditionerGAnd obtaining an approximate solution x to obtain a simulation result of the power supply network. The invention adopting the scheme ensures the similarity with the original image, simultaneously accelerates the integral running time of the iterative solution by more than four times, and greatly shortens the time for simulating the power supply network in the chip.
Description
Technical Field
The application relates to a method and a system for simulating an on-chip power supply network based on spectrogram sparseness, and belongs to the technical field of integrated circuit physical verification and analysis.
Background
In the back-end design process of an integrated circuit, in order to verify the correctness of the design, the circuit needs to be simulated. Simulation of the power supply network, as one of the circuit simulations, is an important step in the back-end flow of the integrated circuit. The power supply network is an interconnection network that connects an external power supply to all transistors on the chip. As process nodes go below 7nm, the number of transistors on the chip becomes greater and greater, the power supply network becomes more and more complex, and the size of the matrix to be solved in the power supply network simulation becomes greater and greater. Therefore, in the back-end design of the integrated circuit, the power supply network simulation takes more and more time, and the demand for computing resources is more and more. This has made simulation of very large scale power supply networks an important and challenging research topic in EDA (electronic design automation) back-end design.
When the power supply network is simulated, each section of interconnection line is represented by a resistor, an external power supply is represented by a voltage source, and transistor connection in a chip is represented by a current source, so that a large-scale circuit network comprising the voltage source, the current source and a resistor element needs to be solved. Under the condition of setting the magnitude of a voltage source and a current source, the voltage value of each circuit node needs to be obtained, so that whether the voltage of a node of a connecting transistor meets the design requirement (whether the voltage is higher than the threshold value of normal operation of a certain transistor) or not is judged. If the power supply network is regarded as a graph and the reciprocal of the resistance is regarded as the edge weight of the graph, then the simulation of the power supply network is to solve the laplace matrix (the row and the column corresponding to the grounding point are removed) corresponding to the graph into a linear equation set of a coefficient matrix, wherein the coefficient matrix is a symmetrical positive definite matrix and is very sparse. Solutions to sparse symmetric positive definite matrices are generally divided into two broad categories, one being direct solutions and one being iterative solutions. The direct solution means that Cholesky decomposition is performed on the matrix first, and then two triangular matrices are solved. The direct solution has the advantages of stability and accurate solution, but has the disadvantage of excessive memory consumption, and the direct solution does not have good expandability because of the filling phenomenon of Cholesky decomposition. The other idea is an iterative solution, which has the advantages of low memory consumption and capability of expanding to an ultra-large scale, but has the disadvantages of low stability and slow convergence or even non-convergence for a matrix with a more pathological state. In order to accelerate the convergence of the iterative solution, preconditioners are usually introduced, and an effective preconditioner is the key of the efficient iterative solution.
Spectrogram sparsification aims to find a sparse subgraph from the original image, which can preserve the spectral properties of the original image as much as possible. The Laplace matrix of the sparse subgraph can be used as a precondition to accelerate convergence of a conjugate gradient method (PCG). Spectrogram sparsification generally comprises two steps: obtaining a key spanning tree of a spectrum from an original image; and adding a small number of spectrum key non-tree edges back to obtain a sparse subgraph. A spectrogram sparsifying method based on spectral perturbation analysis is provided in a document GRASS which is published in 2020 by IEEE Transactions on Computer-aid Design of Integrated Circuits and Systems, and can find out key non-tree edges under the spectral meaning, further find out a sparse subgraph which can better retain the spectral properties of the original image, and effectively accelerate the convergence speed of the PCG. However, the laplacian matrix solving includes three processes of pre-condition sub-construction, pre-condition sub-matrix decomposition and PCG, and a large amount of time is spent in the pre-condition sub-construction process of the GRASS, so that the total time complexity of the laplacian matrix solving is still high.
Disclosure of Invention
The present application is directed to solving, at least to some extent, one of the technical problems in the related art.
To this end, a first objective of the present application is to propose a power supply network simulation method based on spectrogram sparseness.
A second object of the present application is to propose a computer device.
A third object of the present application is to propose a non-transitory computer-readable storage medium.
In order to achieve the above object, an embodiment of the first aspect of the present application provides a power supply network simulation method based on spectrogram sparseness, which includes the following steps:
step S10, obtaining the SPICE netlist of the power supply network, establishing a weighted undirected graph G and a right end item b corresponding to the SPICE netlist, and establishing a netlist Laplace matrix L corresponding to the weighted undirected graph GG；
Step S20, performing spectrogram sparsification on the weighted undirected graph G to obtain a sparse subgraph P;
step S30, establishing a sparse Laplacian matrix L corresponding to the sparse subgraph PPThe net list Laplace matrix LGAnd the sparse Laplace matrix LPRemoving the rows and columns corresponding to the grounding points;
and for the sparse Laplace matrix LPPerforming Cholesky decomposition to obtain a triangular matrix;
step S40, setting a convergence threshold value, and solving a linear equation set L by using the triangular matrix as a precondition and running a precondition conjugate gradient methodGAnd obtaining an approximate solution x to obtain a simulation result of the power supply network.
Optionally, in an embodiment of the present application, the step S20 includes the following steps:
step S21, calculating the equivalent weight of each edge in the weighted undirected graph G, obtaining a maximum equivalent weight spanning tree T according to the equivalent weight and a maximum spanning tree algorithm, and enabling the sparse subgraph P to be the maximum equivalent weight spanning tree T;
step S22, using Tarjan offline nearest common ancestor algorithm to calculate nearest common ancestor LCA (i, j) of two end points of non-tree edge e (i, j) in the maximum equivalent weight value spanning tree T, and simultaneously, using depth-first search to calculate distance dist (r, i) of two end points of root node r to non-tree edge e (i, j) in the maximum equivalent weight value spanning tree T, and calculating equivalent resistance through LCA (i, j) and dist (r, i), where the calculation formula of the equivalent resistance is:
Reff(i,j)＝dist(r,i)+dist(r,j)-2*dist(r,LCA(i,j))
wherein i and j are both nodes of the maximum equivalent weight value spanning tree T, Reff (i, j) is an equivalent resistance, dist (r, i) is the distance from the root node r to the node i, dist (r, j) is the distance from the root node r to the node j, and LCA (i, j) is the nearest common ancestor of two end points of the non-tree edge e (i, j) in the maximum equivalent weight value spanning tree T;
step S23, calculating the spectrum criticality of the non-tree edge e (i, j) in the maximum equivalent weight spanning tree T, i.e. w (i, j) × Reff(i, j) where w (i, j) is the weight of the edge, Reff(i, j) is the equivalent resistance of the edge; sequencing non-tree edges e (i, j) in the maximum equivalent weight value generation tree T according to the sequence from large to small of the spectrum criticality to obtain a non-tree edge sequence OffTreeEdgeLists;
step S24, setting a loop variable k to make k equal to 0, and repeatedly executing the following steps, when the loop variable k is equal to the preset number of non-tree edges, stopping the loop:
step S241, taking out the kth from the non-tree-edge sequence offtreededgelists to obtain a non-tree edge e (i, j) ═ offtreededgelists [ k ];
step S242, if the non-tree edge e is marked, making k equal to k +1, and executing step S241;
step S243, if the non-tree edge e is not marked, starting from the node i and the node j, respectively, running β -level width-first search in the current sparse subgraph P, marking the non-tree edge between the searched node and other nodes, adding the non-tree edge e to the sparse subgraph P, making k equal to k +1, and executing step S241.
Optionally, in an embodiment of the present application, the equivalent weight is calculated according to the weight of the edge, the node degree of the edge endpoint, and the distance from the edge endpoint to the root node, and a maximum equivalent weight spanning tree is obtained according to the equivalent weight.
Optionally, in an embodiment of the present application, the equivalent weight is positively correlated with the node degree of the edge node, and negatively correlated with the distance from the end point to the root node, and a calculation formula of the equivalent weight is:
wherein i1And j1Is an edge e1Two end points of (d), deg (i)1) Is a node i1Degree of (d), deg (j)1) Is node j1Degree of (d), uwtist (r, i)1) From root node r to node i1Uwtist (r, j)1) From root node r to node j1Of (a) an unweighted distance, Weff(e1) Is e1Equivalent weight of W (e)1) Is e1The weight of (2).
Optionally, in an embodiment of the present application, in step S10, resistance, voltage source and current source information is obtained through the SPICE netlist, and the right end item b includes the current source and the voltage source.
To achieve the above object, a second aspect of the present application provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the method according to the first aspect of the present application is implemented.
To achieve the above object, a non-transitory computer-readable storage medium is provided in an embodiment of the third aspect of the present application, on which a computer program is stored, and the computer program, when executed by a processor, implements the method described in the embodiment of the first aspect of the present application.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic flow chart of a power supply network simulation method based on spectrogram sparseness according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present application and should not be construed as limiting the present application.
The following describes a power supply network simulation method based on spectrogram sparseness according to the present application with reference to the attached drawings.
Fig. 1 is a schematic flow chart of a power supply network simulation method based on spectrogram sparseness according to an embodiment of the present application.
As shown in fig. 1, an embodiment of the present application provides a power supply network simulation method based on spectrum sparsity, which includes the following steps:
step S10, obtaining the SPICE netlist of the power supply network, establishing the weighted undirected graph G and the right end item b corresponding to the SPICE netlist through the SPICE netlist, and establishing the netlist Laplace matrix L corresponding to the weighted undirected graph GG(ii) a Obtaining information of a resistor, a voltage source and a current source through the SPICE netlist, wherein a right end item b comprises the current source and the voltage source;
step S20, carrying out spectrogram sparsification on the weighted undirected graph G to obtain a sparse subgraph P;
step S30, establishing a sparse Laplacian matrix L corresponding to the sparse subgraph PPThe net list Laplace matrix LGAnd sparse Laplace matrix LPRemoving the rows and columns corresponding to the grounding points;
and for the sparse Laplace matrix LPPerforming Cholesky decomposition to obtain a triangular matrix;
step S40, setting a convergence threshold value, and solving a linear equation set L by using the triangular matrix as a precondition and running a precondition conjugate gradient methodGAnd obtaining an approximate solution x to obtain a simulation result of the power supply network.
Therefore, the method and the device for establishing the power supply network have the advantages that the weighted undirected graph G and the right end item b corresponding to the SPICE netlist of the power supply network are established through the SPICE netlist of the power supply network, and the Laplace matrix L of the netlist corresponding to the weighted undirected graph G is establishedG(ii) a Then, carrying out spectrogram sparsification on the weighted undirected graph G to obtain a sparse subgraph P, and establishing a sparse subgraph PSparse Laplace matrix L corresponding to sparse graph PP(ii) a The net list Laplace matrix LGAnd sparse Laplace matrix LPRemoving the corresponding row and column of the middle point and the grounding point, and obtaining the sparse Laplace matrix L by a reordering algorithmPAccording to the net list Laplace matrix L of the reordering vector pairGAnd a sparse laplacian matrix L ofPReordering the right-end item b of the sum, and reordering the reordered sparse Laplace matrix LPPerforming Cholesky decomposition to obtain a triangular matrix; and operating a preconditioned conjugate gradient method by using the triangular matrix as a preconditioner to obtain an approximate solution x, thereby obtaining a simulation result of the power supply network.
According to the method and the device, the triangular matrix is obtained by using the spectrogram sparsification algorithm, and the triangular matrix is used as a precondition of a precondition conjugate gradient method, so that a fast and effective spectrogram sparsification algorithm is constructed. Compared with the existing spectrogram thinning method, the method provided by the embodiment of the application has the advantages that the similarity between the obtained sparse subgraph and the original graph is guaranteed, meanwhile, the running time is accelerated by more than ten times, the integral running time of the iterative solution is accelerated by more than four times, and the time for simulating the power supply network in the chip is greatly shortened.
Further, step S20 in this embodiment of the present application includes the following steps:
step S21, calculating the equivalent weight of each edge in the weighted undirected graph G, obtaining a maximum equivalent weight spanning tree T according to the equivalent weight and a maximum spanning tree algorithm, and enabling the sparse subgraph P to be the maximum equivalent weight spanning tree T; the equivalent weight and maximum spanning tree algorithm in the embodiment of the application is a Kruskal algorithm.
Step S22, for all non-tree edges e (i, j), using Tarjan offline nearest common ancestor algorithm to calculate nearest common ancestor LCA (i, j) of two endpoints of the non-tree edge e (i, j) in the maximum equivalent weight spanning tree T, and at the same time, using depth-first search to calculate distance dist (r, i) of two endpoints of the root node r to the non-tree edge e (i, j) in the maximum equivalent weight spanning tree T, and calculating equivalent resistance through LCA (i, j) and dist (r, i), where the calculation formula of the equivalent resistance is:
Reff(i,j)＝dist(r,i)+dist(r,j)-2*dist(r,LCA(i,j))
wherein i and j are nodes of the maximum equivalent weight spanning tree T, Reff(i, j) is an equivalent resistance, dist (r, i) is the distance from the root node r to the node i, dist (r, j) is the distance from the root node r to the node j, and LCA (i, j) is the nearest common ancestor of two end points of the non-tree edge e (i, j) in the maximum equivalent weight value generation tree T.
Step S23, calculating the spectrum criticality of the non-tree edge e (i, j) in the maximum equivalent weight value generating tree T, and sequencing the non-tree edges e (i, j) in the maximum equivalent weight value generating tree T according to the sequence from large to small of the spectrum criticality to obtain a non-tree edge sequence OffTreeEdgLists.
In particular, for all non-tree edges e ═ (i, j), the spectral criticality w (e) × R is calculatedeff(i, j), sequencing the non-tree edges from large to small according to the spectrum criticality to obtain a non-tree edge sequence OffTreeEdgeLists.
Step S24, setting a loop variable k, making k equal to 0, and repeatedly executing the following steps, when the loop variable k is equal to the preset number of non-tree edges, stopping the loop, that is, in the embodiment of the present application, one variable is used to record the number of recovered non-tree edges, and the number of recovered non-tree edges is compared with the number of non-tree edges required by the user, and when the number of recovered non-tree edges recorded by the loop variable k meets the number of non-tree edges required by the user, stopping the loop.
The embodiment of the application repeatedly executes the following steps: firstly, taking out the kth tree edge from a non-tree edge sequence OffTreeEdgLists to obtain a non-tree edge e (i, j) ═ OffTreeEdgLists [ k ];
then, whether the non-tree edge e is marked or not is recorded by an array,
if the non-tree edge e is marked, let k be k +1, execute step S241;
if the non-tree edge e is not marked, starting from the node i and the node j respectively, running beta-layer width-first search in the current sparse subgraph P, marking the non-tree edge e between the searched node and other nodes, adding the marked non-tree edge e into the sparse subgraph P, and executing the step S241 when k is equal to k + 1.
Further, in step S21 of this embodiment of the present application, an equivalent weight of each edge in the weighted undirected graph G is calculated, a maximum equivalent weight spanning tree T is obtained according to the equivalent weight and a maximum spanning tree algorithm, and the sparse subgraph P is made to be the maximum equivalent weight spanning tree T, where an equivalent weight is calculated according to a weight of an edge in the maximum equivalent weight spanning tree T, a node degree of an edge endpoint, and a distance from the edge endpoint to a root node, the equivalent weight is positively correlated with the node degree of the edge endpoint and negatively correlated with a distance from the endpoint to the root node, and a calculation formula of the equivalent weight is:
wherein i1And j1Is an edge e1Two end points of (d), deg (i)1) Is a node i1Degree of (d), deg (j)1) Is node j1Degree of (d), uwtist (r, i)1) From root node r to node i1Uwtist (r, j)1) From root node r to node j1Of (a) an unweighted distance, Weff(e1) Is e1Equivalent weight of W (e)1) Is e1The weight of (2).
Netlist SPICE of the power supply network in the embodiment of the present application: representing a guaranteed file format of the circuit;
laplace matrix: any weighted undirected graph can define a matrix, which is a symmetric semi-positive definite matrix and has the following elements:
according to the method and the device, the information of the resistance, the voltage source and the current source is obtained through the netlist of the power supply network, and the netlist Laplace matrix L corresponding to the netlist is establishedGAnd a weighted undirected graph G, and the right-hand item b; performing spectrogram sparsification on the weighted undirected graph G to obtain a sparse subgraph P; establishing a sparse Laplace matrix L corresponding to the sparse subgraph PPIn the netlist Laplace matrix LGAnd the sparse Laplace matrix LPRemoving rows and columns corresponding to the grounding points, for the sparse Laplace matrix LPCalculating a reordering vector by using a reordering algorithm, and performing Laplace matrix L on the netlistGThe sparse Laplace matrix LPAnd reordering the right-end item b, and reordering the reordered sparse Laplace matrix LPPerforming Cholesky decomposition to obtain a triangular matrix; and setting a convergence threshold, operating a preconditioned conjugate gradient method by using the triangular matrix as a preconditioner to obtain an approximate solution, and performing inverse sorting on the approximate solution to obtain a simulation result of the power supply network.
Therefore, an important problem of the power supply network simulation method based on spectrogram sparsity is as follows: laplace matrix L of paired netlistsGSparse laplacian matrix LPAnd reordering the right-end item b, and reordering the reordered sparse Laplace matrix LPAnd performing Cholesky decomposition to obtain a triangular matrix. In order to solve the above problems, the embodiment of the application provides a spectrogram sparsifying method based on spectral disturbance analysis, which can find a key non-tree edge under the spectral significance, further find a sparse subgraph capable of well retaining the original spectrogram property, and effectively accelerate the convergence rate of the preconditioned conjugate gradient method PCG. The spectrogram thinning algorithm comprises two steps of firstly obtaining a spanning tree from an original image, and then adding a small number of non-tree edges into the tree to obtain a sparse subgraph. Compared with the existing spectrogram thinning method, the method ensures the similarity between the obtained sparse subgraph and the original graph, and accelerates the running time by more than ten times, so that the overall running time of the iterative solution is accelerated by more than four times, and the time for simulating the power supply network in the chip is greatly shortened.
The invention comprises the following specific points: firstly, in the process of tree building, in addition to the weight of the edge, more information such as the degree of the node of the edge and the distance from the node of the edge to the root node is considered to obtain the equivalent weight of the edge, and the maximum equivalent weight spanning tree can be obtained by using the equivalent weight. Compared with the common maximum weight value spanning tree, the maximum equivalent weight value spanning tree has lower extension degree, is more suitable for serving as a framework of a sparse subgraph, and meanwhile, the time complexity is not obviously increased. Second, in the edge addition process, the product of the edge weight and the equivalent resistance in the tree is used as a measure of the criticality of the non-tree edge spectrum. Meanwhile, the spectrum similarity of the non-tree edge is defined based on the reduction of the equivalent resistance in the edge adding process, and the spectrum similarity is considered in the edge adding process, so that the addition of other non-tree edges similar to the added edge spectrum is avoided. Therefore, under the condition of adding the same number of non-tree edges (namely the sparse subgraphs have the same scale), the similarity between the subgraphs and the original graph is greatly improved.
In order to implement the foregoing embodiments, the present invention further provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and running on the processor, and when the processor executes the computer program, the method described in the foregoing embodiments is implemented.
In order to implement the above embodiments, the present invention also proposes a non-transitory computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method of the above embodiments.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present application in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc. Although embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and that variations, modifications, substitutions and alterations may be made to the above embodiments by those of ordinary skill in the art within the scope of the present application.
Claims (7)
1. A power supply network simulation method based on spectrogram sparseness is characterized by comprising the following steps:
step S10, obtaining the SPICE netlist of the power supply network, establishing the weighted undirected graph G and the right end item b corresponding to the SPICE netlist through the SPICE netlist, and establishing the netlist Laplace matrix L corresponding to the weighted undirected graph GG；
Step S20, performing spectrogram sparsification on the weighted undirected graph G to obtain a sparse subgraph P;
step S30, establishing a sparse Laplacian matrix L corresponding to the sparse subgraph PPThe net list Laplace matrix LGAnd the sparse Laplace matrix LPRemoving the rows and columns corresponding to the grounding points;
and for the sparse Laplace matrix LPPerforming Cholesky decomposition to obtain a triangular matrix;
step S40, setting a convergence threshold value, and solving a linear equation set L by using the triangular matrix as a precondition and running a precondition conjugate gradient methodGAnd obtaining an approximate solution x to obtain a simulation result of the power supply network.
2. The method of claim 1, wherein the step S20 includes the steps of:
step S21, calculating the equivalent weight of each edge in the weighted undirected graph G, obtaining a maximum equivalent weight spanning tree T according to the equivalent weight and a maximum spanning tree algorithm, and enabling the sparse subgraph P to be the maximum equivalent weight spanning tree T;
step S22, using Tarjan offline nearest common ancestor algorithm to calculate nearest common ancestor LCA (i, j) of two end points of non-tree edge e (i, j) in the maximum equivalent weight value spanning tree T, and simultaneously, using depth-first search to calculate distance dist (r, i) of two end points of root node r to non-tree edge e (i, j) in the maximum equivalent weight value spanning tree T, and calculating equivalent resistance through LCA (i, j) and dist (r, i), where the calculation formula of the equivalent resistance is:
Reff(i,j)＝dist(r,i)+dist(r,j)-2*dist(r,LCA(i,j))
wherein i and j are nodes of the maximum equivalent weight spanning tree T, Reff(i, j) is an equivalent resistance, dist (r, i) is the distance from the root node r to the node i, dist (r, j) is the distance from the root node r to the node j, and LCA (i, j) is the nearest common ancestor of two end points of the non-tree edge e (i, j) in the maximum equivalent weight value generation tree T;
step S23, calculating the spectrum criticality of the non-tree edge e (i, j) in the maximum equivalent weight spanning tree T, i.e. w (i, j) × Reff(i, j) where w (i, j) is the weight of the edge, Reff(i, j) is the equivalent resistance of the edge; sequencing non-tree edges e (i, j) in the maximum equivalent weight value generation tree T according to the sequence from large to small of the spectrum criticality to obtain a non-tree edge sequence OffTreeEdgeLists;
step S24, setting a loop variable k such that k is 0, repeatedly executing the following steps, and when a preset number of non-tree edges have been added, stopping the loop:
step S241, taking out the kth from the non-tree-edge sequence offtreededgelists to obtain a non-tree edge e (i, j) ═ offtreededgelists [ k ];
step S242, if the non-tree edge e is marked, making k equal to k +1, and executing step S241;
step S243, if the non-tree edge e is not marked, starting from the node i and the node j, respectively, running β -level width-first search in the current sparse subgraph P, marking the non-tree edge between the searched node and other nodes, adding the non-tree edge e to the sparse subgraph P, making k equal to k +1, and executing step S241.
3. The method of claim 2, wherein the equivalent weight is calculated according to the weight of the edge, the node degree of the edge end point, and the distance from the edge end point to the root node, and the maximum equivalent weight spanning tree is obtained according to the equivalent weight.
4. The method of claim 3, wherein the equivalent weight is positively correlated with the node degree of the edge node and negatively correlated with the distance from the end point to the root node, and the calculation formula of the equivalent weight is:
wherein i1And j1Is an edge e1Two end points of (d), deg (i)1) Is a node i1Degree of (d), deg (j)1) Is node j1Degree of (d), uwtist (r, i)1) From root node r to node i1Uwtist (r, j)1) From root node r to node j1Of (a) an unweighted distance, Weff(e1) Is e1Equivalent weight of W (e)1) Is e1The weight of (2).
5. The method of claim 1 wherein in step S10, resistance, voltage source and current source information is obtained from the SPICE netlist, the right end item b including the current source and the voltage source.
6. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method of any one of claims 1-5 when executing the computer program.
7. A non-transitory computer-readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the method of any one of claims 1-5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110412255.9A CN113111619A (en) | 2021-04-16 | 2021-04-16 | Power supply network simulation method and system based on spectrogram sparseness |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110412255.9A CN113111619A (en) | 2021-04-16 | 2021-04-16 | Power supply network simulation method and system based on spectrogram sparseness |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113111619A true CN113111619A (en) | 2021-07-13 |
Family
ID=76718023
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110412255.9A Pending CN113111619A (en) | 2021-04-16 | 2021-04-16 | Power supply network simulation method and system based on spectrogram sparseness |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113111619A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115600441A (en) * | 2022-12-14 | 2023-01-13 | 深圳鸿芯微纳技术有限公司（Cn） | Data processing method, device and equipment of chip circuit and storage medium |
| CN116882329A (en) * | 2023-09-06 | 2023-10-13 | 杭州行芯科技有限公司 | Netlist reduction method, time sequence verification method, electronic equipment and storage medium |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1564321A (en) * | 2004-03-26 | 2005-01-12 | 清华大学 | High speed high precision transient simulation method able to process tree net hybrid power supply structure in VLSI |
| CN102663166A (en) * | 2011-12-08 | 2012-09-12 | 清华大学 | Method and system for simulating on-chip power supply network |
| CN103500284A (en) * | 2013-10-11 | 2014-01-08 | 清华大学 | On-chip power supply network vector-free verification method and system |
| CN108984483A (en) * | 2018-07-13 | 2018-12-11 | 清华大学 | The electric system sparse matrix method for solving and system reset based on DAG and matrix |
-
2021
- 2021-04-16 CN CN202110412255.9A patent/CN113111619A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1564321A (en) * | 2004-03-26 | 2005-01-12 | 清华大学 | High speed high precision transient simulation method able to process tree net hybrid power supply structure in VLSI |
| CN102663166A (en) * | 2011-12-08 | 2012-09-12 | 清华大学 | Method and system for simulating on-chip power supply network |
| CN103500284A (en) * | 2013-10-11 | 2014-01-08 | 清华大学 | On-chip power supply network vector-free verification method and system |
| CN108984483A (en) * | 2018-07-13 | 2018-12-11 | 清华大学 | The electric system sparse matrix method for solving and system reset based on DAG and matrix |
Non-Patent Citations (1)
| Title |
|---|
| ZHIQIANG LIU 等: "feGRASS: Fast and Effective Graph Spectral Sparsification for Scalable Power Grid Analysis", 《IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115600441A (en) * | 2022-12-14 | 2023-01-13 | 深圳鸿芯微纳技术有限公司（Cn） | Data processing method, device and equipment of chip circuit and storage medium |
| CN116882329A (en) * | 2023-09-06 | 2023-10-13 | 杭州行芯科技有限公司 | Netlist reduction method, time sequence verification method, electronic equipment and storage medium |
| CN116882329B (en) * | 2023-09-06 | 2023-12-19 | 杭州行芯科技有限公司 | Netlist reduction method, time sequence verification method, electronic equipment and storage medium |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Yang et al. | A unified semi-supervised community detection framework using latent space graph regularization | |
| Vanhatalo et al. | Approximate inference for disease mapping with sparse Gaussian processes | |
| EP1964010B1 (en) | Parallel multi-rate circuit simulation | |
| CN113111619A (en) | Power supply network simulation method and system based on spectrogram sparseness | |
| CN101105841A (en) | Method for constructing gene controlled subnetwork by large scale gene chip expression profile data | |
| US11663383B2 (en) | Method and system for hierarchical circuit simulation using parallel processing | |
| Yu et al. | Modeling spatial extremes via ensemble-of-trees of pairwise copulas | |
| Zhao et al. | SAMG: Sparsified graph-theoretic algebraic multigrid for solving large symmetric diagonally dominant (SDD) matrices | |
| CN114004186A (en) | Spectrogram sparsification-based on-chip ultra-large-scale power supply network parallel simulation method | |
| Hakula et al. | On the hp-adaptive solution of complete electrode model forward problems of electrical impedance tomography | |
| CN105447214A (en) | Method and device for determining device parameters | |
| Mehra et al. | An adaptive spectral graph wavelet method for PDEs on networks | |
| Mannila et al. | Nestedness and segmented nestedness | |
| CN112513861B (en) | Method and system for hierarchical circuit simulation using parallel processing | |
| Lee et al. | Hexagonal grid methods with applications to partial differential equations | |
| Lê et al. | Improving the Kuo-Lu-Yeh algorithm for assessing two-terminal reliability | |
| CN115130415A (en) | Power supply network transient simulation method, device, equipment and medium | |
| CN115511262A (en) | Transformer quality detection method and device | |
| CN112861874B (en) | Expert field denoising method and system based on multi-filter denoising result | |
| Dax et al. | Imputing missing groundwater observations | |
| Kiiveri et al. | Fitting very large sparse Gaussian graphical models | |
| Febrianto et al. | A three-grid high-order immersed finite element method for the analysis of CAD models | |
| CN112257323B (en) | Automatic network separation method and device based on electromagnetic transient parallel computing and terminal equipment | |
| CN116402554B (en) | Advertisement click rate prediction method, system, computer and readable storage medium | |
| CN112098808B (en) | Circuit detection method, device and equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20210713 |
|
| WD01 | Invention patent application deemed withdrawn after publication |