CN1564321A - High speed high precision transient simulation method able to process tree net hybrid power supply structure in VLSI - Google Patents

Abstract

The method is capable of carrying out transient state emulation for hybrid power supply network by mixing tree and network in any proportion quickly. Comparing with general emulation method, the invention can treat irregular topological structure and multiple power supply source, considering input of resistance, capacitance, and inductance as stray parameter so as to provide high precision of emulation. Pretreatment technique and quick argument elimination technique based on incomplete Cholesky decomposition is adopted in the invention. Advantages are: raising efficiency greatly, high precision of emulation and stability of data, emulation of network of power source/ground wires in large scale independent on topology. The invention is also applicable to passive clock line, bus and signal network in IC.

Description

Can handle the high-speed, high precision transient state emulation mode of tree net hybrid power supply structure among the VLSI

Technical field

The electrical characteristics emulation of very lagre scale integrated circuit (VLSIC) (VLSI) supply network belongs to physical layout design field in the VLSI manufacturing process.It is design and optimizes the core subprocess that the ic power earth cord network must rely on, the efficient of this process and precision will directly have influence on the design cycle of entire chip, the performance and the life-span of finished chip, owing to the similitude of integrated circuit diagram and printed circuit version (PCB), this method also is applicable to the simulation analysis of the supply network on the frequency PCB simultaneously.

Background technology

1. the importance of chip power supply net design

Along with the continuous progress of very lagre scale integrated circuit (VLSIC) manufacturing process, the characteristic line breadth of finished chip is constantly dwindling, and the integration density of chip and operating frequency are also significantly improving simultaneously.Under such environment, bad power/ground supply network design can greatly influence the performance of chip, as causes circuit parameter variations, produces between disparate modules and crosstalks, and causes producing carrier effect and metal electro-migration effect etc.These bad electromagnet phenomenons can cause the circuit logic mistake, reduce the chip life-span, make the chip can't operate as normal, so the powerup issue of chip has become a major issue in the deep-submicron integrated circuit (IC) design.The investigation to the deep submicron integrated circuit design recently shows that 79% design has the problem of electric power network, need correct before flow, otherwise chip will be owing to the excessive and cisco unity malfunction of the voltage drop on the electric power network.In order to solve this difficult problem, top in the world design of electronic products automation (EDA) company has proposed the solution of oneself one after another, as VoltageStorm, SingalStorm, the ElectronStorm emulation tool that Candance company provides, the Eido that Mentor company provides, Eido RF, Eido Mach etc.

2. the cloth chart-pattern of chip layout

The power supply network design of chip is subjected to the constraint of chip cloth chart-pattern to a great extent.The cloth chart-pattern of so-called chip refers to each functional unit in the chip and put rule on silicon chip, and present industrial use many mainly comprises full custom and semicustom two big classes.Under the full custom model, circuit is divided into some electronic circuits, and each electronic circuit is a module, and generally, the profile of module and placement are all without limits.Chip area except module all is a wiring region.For the layout design of three layers and above Wiring technique, also can cabling above the module, just the cabling number of plies limits to some extent.Therefore, full customization cloth chart-pattern is except will following the most basic geometric design rules (minimum feature, spacing, cover, appear etc.), not having other any additional physical restriction, is representative (referring to accompanying drawing 1) with hand-designed Butut and building block automatic graph generation BBL (Building BlockLayout) wherein.The semi-custom designs pattern all has certain restriction to the direction of drawing of height, power cord location and the unit lead end of functional unit, and the unit also can only be placed on regulation the zone in or must by the row place.Semi-custom cloth chart-pattern is divided into some groups again, as (referring to accompanying drawings 3) such as standard cell Design Mode (referring to accompanying drawing 2), gate array Design Modes.

3. the physical form of chip power supply net

The physical form of chip power supply network on chip mainly contains four kinds: netted, tree-shaped, tree net mixes shape and general figure.Under netted power supply network, each functional unit obtains voltage and current from the crossover node of network, because each crossover node has at least 4 branch roads to power simultaneously, so reliability is than higher (referring to accompanying drawing 4); Under tree-shaped power supply network, each functional unit obtains voltage and current from the branch node of power supply tree, use this powering mode ratio to be easier to optimize the wiring area, that therefore uses in the industry manufacturing is many, but its reliability is not as netted power supply network (referring to accompanying drawing 5); The power supply network that the tree net mixes is the above two combination, have both advantages concurrently, but more complicated aspect the gauze design optimization, but a recent period of time, multi-layer metal wiring has become the developing direction that IC makes, by multiple layer metal technology, insecure shortcoming of original insoluble tree structure also can obtain certain solution by the power supply of multilayer subtree now, so can expect, in the future of chip technology to the development of higher integrated level and faster speed, the powering mode that the tree net mixes is bound to become main flow, this point has obtained the confirmation of some ASSOCIATE STATISTICS data, and it is the simple a kind of powering mode realization (referring to accompanying drawing 6) of adopting that present industrial quarters seldom has chip; The electric power-feeding structure of general figure is many to be produced by manual Butut, does not have certain rules, the most flexible in various electric power-feeding structures, but also is difficult to most handle, and often is used in the occasion that the wiring area is had higher requirements.

4. the means of current solution chip power supply problem

Make the power/grounding line that designs to satisfy in the chip each functional circuit to the requirement of voltage and current, promptly all wanting at any time to provide the stable voltage and current that satisfies a certain size requirement to each functional unit on the chip, just must carry out quantitative analysis on the electromagnetic performance, adjust accordingly according to the result who analyzes then power/grounding line.For the low frequency chip, usually only carry out the direct current static analysis and just can satisfy the requirement of Performance And Reliability.What dc analysis was primarily aimed at is the voltage of supply node and the current density on the gauze, general by extracting the dc parameter of gauze, as resistivity, live width, line length etc., set up the modal equation group according to kirchhoff electric current and voltage law then, obtain evaluation by finding the solution this equation group to the power/grounding line electrical property, whether have voltage and current on violation point, how many points are in violation of rules and regulations arranged if checking, estimate according to this and revise the topological structure of wiring originally, constantly repeat this process, obtain optimum wire structures at last, making it to satisfy does not have the requirement of point in violation of rules and regulations, and the wiring area that takies simultaneously also is minimum; And for high frequency chip, owing to be subjected to the interconnection line effects of distribution parameters, the electromagnetic performance of gauze can not be described by DC parameter merely.To design the power supply gauze that satisfies the Performance And Reliability requirement this moment and just must the interchange dynamic simulation that gauze carries out under the high frequency be calculated, make every effort to carry out a series of optimizing and revising by the topological structure that calculates power/grounding line.The model of describing the electromagnetic property of gauze under the high frequency has multiple, as resistance/inductance/capacitance (RLC) model of drawing by transmission line theory, but by no matter use what computation model, finally can be summed up as the mathematical problem of finding the solution a large-scale system of linear equations to the analysis of power/grounding line network under the high frequency.

5 current techniques and defective thereof

Academia has proposed many new methods in recent years, by finding the solution the large-scale system of linear equations that is obtained by the electric power network model electric power thus supplied of power net is made emulation, thereby further is optimized.Such method is a lot, as multi-grid method (Multi-grid method), stratification (Hierarchical method), pre-excellent conjugate gradient method (Precondition ConjugateGradient-PCG), the hierarchical model depression of order (Hierarchical Model Order Reduction), intersection implicit method of partial differential equation (Alternating Direction Implicate) or the like, but up to the present, still there is not the electric power-feeding structure that a kind of algorithm can be stablized and the net mixing is set in processing apace.Simultaneously, in this area, many in the world famous EDA company is also according to the new problem that occurs on making, provide and improve their solution, business software by themselves exploitation is analyzed power/grounding line, but these softwares generally all exist the speed of finding the solution slow, EMS memory occupation is many, be difficult to guarantee simultaneously disadvantages such as convergence and computational accuracy, and for using the structure that more and more general tree is netted the power supply gauze that mixes, these softwares also lack corresponding acceleration capacity, and the instrument that has at present even can emulation contain the supply network of inductance parasitic parameter.

Summary of the invention

The present invention is directed to the present situation that present commercial simulation software can not stablize fast and exactly the power supply network of setting the net mixed structure is carried out emulation, made improvement, proposed a kind ofly can be fast the tree net hybrid power supply net of arbitrary proportion to be carried out the transient state new Method of Simulation.This method has solved conventional emulation mode can not effectively handle the problem of irregular topology structure and many power supply sources, and has very high simulation accuracy.This method has been considered the input as parasitic parameter of resistance, electric capacity and inductance fully simultaneously, can reach very high simulation accuracy.Also adopted the preconditioning technique and the quick argument technology for eliminating that decompose based on incomplete Qiao Laisiji in the method, the efficient of method is greatly improved.Experimental result has proved that this algorithm has high simulation accuracy and numerical stability, can be in a short period of time the power/grounding line network of great scale be carried out emulation, simultaneously since with the independence of topological structure, this method also is applicable to the emulation of passive clock gauze, bus gauze and signal gauze in the high-frequency integrated circuit.The invention is characterized in: it is that computing platform uses the C language to realize that under the unix environment it depends on several steps with the SunV880 work station:

1) the topological link information and the electrical quantity information of the electric power network that provides with Spice net sheet form of program scanning

2) computer program utilizes the information that step 1) obtains, and sets up respectively and to describe that electricity is led, the tables of data of electric capacity, inductance and current source, voltage source parameter

3) program finds all tree structures in the whole electric power network by the scanning net meter file, and it is expressed as the node listing of a hierarchy type, generates a tabulation of describing the RL structure simultaneously

4) calculate the capacity cell in the power/grounding line network and the equivalent conductance size and the equivalent transient current source size of inductance element by the difference discrete method under following any time domain, promptly capacity cell and inductance element are converted to current source and resistive element in parallel approx, the equivalent current source of establishing initial time simultaneously is zero

4.1) trapezoidal Euler method

For electric capacity $I_c^{t+h}=G_c\·V_c^{t+h}-(G_c\·V_c^t+I_c^t)G_c=\frac{2C}{h}$

For inductance $I_L^{t+h}=G_L\·V_L^{t+h}+(G_L\·V_L^t+I_L^t)G_L=\frac{h}{2L}$

Wherein h is the simulation step length that the user imports, and unit is second

I _c ^T+h, V _c ^T+hBe respectively electric current and the terminal voltage on the t+h moment capacitive branch

I _c ^t, V _c ^tBe respectively electric current and the terminal voltage on the t moment capacitive branch; G _cIt is the equivalent conductance after the appearance element discretization

I _L ^t, V _L ^tBe respectively electric current and the terminal voltage on the t moment inductive branch; G _LIt is the equivalent conductance after the capacity cell discretization

If order ${\mathrm{IS}}_c^t=-(G_c\·V_c^t+I_c^t)$ Then $I_c^{t+h}=G_c\·V_c^{t+h}+{\mathrm{IS}}_c^t$

${\mathrm{IS}}_L^t=(G_L\·V_L^t+I_L^t)$ Then $I_L^{t+h}=G_L\·V_L^{t+h}+{\mathrm{IS}}_L^t$

4.2) linear multistep method

$I_c^{t+h}=G_c\·V_c^{t+h}-(G_c\·V_c^t+a_1{I}_c^t+a_2{I}_c^{t-h}+a_3{I}_c^{t-2h})$

$G_c=\frac{24C}{9h},$ $a_1=\frac{19}{9},$ $a_2=-\frac{5}{9},$ $a_3=\frac{1}{9}$

$I_L^{t+h}=G_L\·V_L^{t+h}+(b_1{V}_L^t+b_2{V}_L^{t-h}+b_3{V}_L^{t-2h}+I_L^t)$

$G_L=\frac{9h}{24L},$ $b_1=\frac{19h}{24L},$ $b_2=-\frac{5h}{24L},$ $b_3=\frac{h}{24L}$

If order ${\mathrm{IS}}_c^t=-(G_c\·V_c^t+a_1{I}_c^t+a_2{I}_c^{t-h}+a_3{I}_c^{t-2h})$ Then $I_c^{t+h}=G_c\·V_c^{t+h}+{\mathrm{IS}}_c^t$

If order ${\mathrm{IS}}_L^t=(b_1{V}_L^t+b_2{V}_L^{t-h}+b_3{V}_L^{t-2h}+I_L^t)$ Then $I_L^{t+h}=G_L\·V_L^{t+h}+{\mathrm{IS}}_L^t$

5) according to bottom-up order in the forest node stratification that obtains in the step 3), by searching discrete data table at the bottom of node annexation concordance list and electric capacity, the inductance element, being connected on each tree node, electric capacity that need change and inductance replace to corresponding electricity and lead and current source

6) according to the order of node in the above-mentioned forest node stratification, bottom from every tree, use the linear equivalent circuit theory that contains two ends, source resistor network repeatedly, the merging that current source after replacing and conductance element are made hierarchy type, make trees all on the power supply network all merger be that electricity on the root node is led and current source, it contains following two steps in sequence:

6.1) equivalent conductance of all electric capacity and inductance is merged on the root node, this step can carry out in step 3)

6.2) after each has upgraded the equivalent current source of all inductance and electric capacity constantly, again the equivalent current source of electric capacity and inductance on the tree node after upgrading is merged again, finally obtain the equivalent current source on the root node

7) program is carried out conversion according to the order that RL configuration index table provides with the above-mentioned principle of equal effects, eliminates the intermediate node in the power net, and generating an order with RL configuration index table is the RL structured parameter table that puts in order, m wherein, and n, o is calculated as follows:

m＝o·G，n＝1-m， $o=\frac{1}{G+G_L}$

Wherein, to be that RL is structural lead from charged G

G _LBe that the electricity that obtains after the L equivalence in the RL structure is led

8) again nodes all in the network is sorted, form new node annexation concordance list

9) according to the power/ground topological structure after simplifying, generate compute matrix and corresponding current source vector, form the system of linear equations of supply node voltage, electric current, it depends on following steps:

9.1) be the ground connection vertex ticks zero node, the ground connection node is gone out from node annexation concordance list.

9.2) obtain the system of linear equations of supply node voltage, electric current based on Kirchhoff's law and Ohm's law, be shown below $\underset{j\∈P}{\mathrm{\Σ}}{g}_{\mathrm{jk}}(v_j-v_k)+\underset{i=1,i\≠k}{\overset{N^1}{\mathrm{\Σ}}}{g}_{\mathrm{ik}}(v_i-v_k)=i_k$

Form is GV=I

G is the matrix of a N * M, is called compute matrix, wherein:

I is a N dimensional vector, and element is wherein represented the current value of each node to ground,

Wherein N ' is the node number of web frame in the power supply network, and M is a way of web frame

v _kIt is the magnitude of voltage of a node of delegation's representative in the matrix

v _iIt is the magnitude of voltage of other nodes

v _jIt is the magnitude of voltage of voltage source

P is the indexed set of the node that links to each other with voltage source

g _IkIt is the electric conductivity value that node k links to each other with other node i

g _JkIt is the electric conductivity value that node k links to each other with voltage source

10) find the solution the distribution that engine obtains simplifying the posterior nodal point supply power voltage by calling the pre-excellent conjugate gradient algorithms of decomposing based on incomplete Qiao Laisiji

$V_{\mathrm{RLnode}}^t=m\·V_{\mathrm{Gnode}}^t+n\·V_{\mathrm{Lnode}}^t-o\·{\mathrm{IS}}_L^t$

11) at two end nodes that obtain all RL structures after voltage sometime, according to RL simplify structure parameter list, recover this magnitude of voltage constantly of RL node one by one according to following formula, carry out the voltage that arithmetic just can recover all intermediate nodes by the intermediate node chain again

${V^t}_{\mathrm{middle}}=c\·V_{\mathrm{top}}^t-e{I}_{\mathrm{middle}}^t$

$V_{\mathrm{bottom}}^t=a\·V_{\mathrm{middle}}^t+d\·(I_L^t-I_{\mathrm{bottom}}^t)$

a＝G _L·d，b＝1-a，c＝G _top·e， $d=\frac{1}{G_L+G_{\mathrm{bottom}}},$ $e=\frac{1}{G_{\mathrm{top}}+G_{\mathrm{middle}}}$

Wherein G, G _LState as defined above.

12), reduce all tree node magnitudes of voltage by following formula according to the order and the tree structure abbreviation parameter list of node in the forest node stratification

13) the whole node voltages that obtain more than the basis distribute, and recomputate the current source vector

14), jump to step 10) and continue to carry out if do not reach predetermined simulation time.

The performance of the present invention and existing software relatively

1. computational accuracy relatively

Referring to accompanying drawing 19, wherein have jagged curve and be the emulation knot state of certain supply node magnitude of voltage in the power supply network that business software Hspice provides, the simulation result that provides for program of the present invention of smoother.As can be seen, not only ratio error is very little mutually with Hspice for the simulation result that provides of the present invention, and the result is also Paint Gloss.

2. computational efficiency relatively

Following table is a present invention and business software Hspice and the comparison of ICCG simulated program on simulation time, almost has only 1/10th of ICCG computing time of the present invention as can be seen, has compared two orders of magnitude then almost fast with Hspice.

Wherein the consuming time of TME is the consuming time of program of the present invention.

The node sum	Tree node percentage (%)	ICCG calculates (second) consuming time	TME calculates (second) consuming time	Hspice calculates (second) consuming time	Speed-up ratio
							Compare ICCG	Ratio
					????2,653	????25			????6.23	?????1.85	Do not survey	????3.37	Do not survey
????9,313	????25	????43.88	?????7.31	Do not survey			????6.00	Do not survey
					????41,413	????25			????301.40	?????51.80	????8597.6	????5.82	????165.97
????73,171	????25	????970.10	?????94.74	????16945.75			????10.24	????178.86
					????154,843	????25			????3639.29	?????219.39	????22594.34	????16.59	????102.98
????208,393	????25	????7737.32	?????322.55	Do not survey			????23.99	Do not survey
					????357,007	????25			????19622.79	?????544.64	Do not survey	????36.03	Do not survey
????660,157	????25	????50157.83	?????1104.36	Do not survey			????45.42	Do not survey
					????1,011,0	????25			????98038.98	?????1706.75	Do not survey	????57.44	Do not survey

Description of drawings

Fig. 1: building block automatic graph generation pattern (BBL) signal

Fig. 2: standard cell cloth chart-pattern signal

Fig. 3: gate array cloth chart-pattern signal

Fig. 4: tree-like power supply network signal

Fig. 5: net form power supply network signal

Fig. 6: tree-shaped and netted power supply network signal

Fig. 7: the simulation model of one 2 * 2 netted electric power-feeding structure

Fig. 8: the simulation model of 2 * 2 netted electric power-feeding structures after the discretization

Fig. 9: tree structure level scanning process schematic diagram in the power net

Figure 10: Norton equivalent circuit theory diagrams

Figure 11: thevenin equivalent circuit schematic diagram

Figure 12: the Norton equivalent circuit is in the conversion of thevenin equivalent circuit

Figure 13: RL structure and abbreviation schematic diagram thereof

Figure 14: electric capacity and inductance element difference discrete equivalent schematic

Figure 15: the replacement schematic diagram of second order element in the tree structure

Figure 16: the merging equivalent schematic of conductance element in the tree structure

Figure 17: current source merges equivalent schematic in the tree structure

Figure 18: the process schematic diagram that incomplete Qiao Laisiji decomposes

Figure 19: the comparison of simulation result of the present invention and the commercial Hspice of simulation software

Figure 20: simulated program flow chart

Embodiment

This method has been used the C language to develop under the unix environment and has been embodied as a high performance simulated program.The supply network electrical quantity description document that this simulated program provides with Spice net sheet form is as input, by parameters such as user interactions ground input simulation time and simulation step length, the electric current and voltage that finally provides each supply node on each moment supply network distributes as output.

Concrete realization environment is as follows:

Hardware system: Sun V880 WorkStation with 4CPU at 800MHz, 2GB Memory

Operating system: Sun Solaris 5.0

Programming language: ANSI C

Compiler: GNU gcc version: 3.3.1

Program debugging tool: GNU gdb version: 6.0

Auxiliary Core Generator: GNU make version: 3.79.1

Introduce the workflow of this simulated program below:

1. program scanning obtains the topological link information and the electrical quantity information of electric power network with the electric power network description document that Spice net sheet form provides.

1.1 Spice net meter file brief introduction

The Spice net meter file is by each node in the circuit is numbered, and uses the method for the pin numbering of each element of the book of final entry and relevant parameters value to describe the topological structure of circuit and electrical characteristics.For the two ends element in the electric power network equivalent-circuit model: resistance, inductance, electric capacity, voltage source, current source, this document have following description:

The element title	Grammer is described
		Resistance	Component type element number left end node number right-hand member node number resistance value
Inductance	Component type element number left end node number right-hand member node number inductance value
		Electric capacity	Component type element number left end node number right-hand member node number capacitance
Direct voltage source	Component type element number left end node number right-hand member node number magnitude of voltage
		The segmented current source	The component type element number left end node number right-hand member node number terminal voltage type terminal voltage size PWL{ moment, size of current }

Wherein the component type of resistance, inductance, electric capacity, voltage source, current source is respectively: R, L, C, V and I segmented current source middle-end voltage type have two kinds:

If direct current terminal voltage type is DC

If alternating current terminal voltage type is AC

The content number of repetition of { } expression in the bracket can be more than or equal to 1 arbitrarily time, but the amount dimension that can not think the acquiescence of each magnitude of physical quantity in 0 file is respectively: ohm (Ω), Henry (H), farad (F), Ford (V) and ampere (A).If employed physical quantity size is not the size of acquiescence dimension, what then showed before the concrete numerical value of physical quantity is illustrated, and is the description of times multiplying factor commonly used below:

Coefficient	f	p	n	u	?m	?MI
							Size	10 -15	10 -12	10 -9	10 -6	?10 -3	?25.4×10 6
Coefficient	K	MEG	G	T	?DB
							Size	10 3	10 6	10 9	10 12	?20logAi

Also need to illustrate be segmented current source in the file.The value that the I/O current value that the segmented current source engraves when described equals to provide in the file then uses approach based on linear interpolation to provide at two current values that provide between the moment.Comment line uses the guiding prefix in the net meter file: the descriptive information of * * necessity and the partial statistical information of circuit can appear in the comment line, must hand at first at file simultaneously and carry out the time step of time domain analysis and use following syntactic description analysis time altogether: the .tran time step bulk analysis time

Below be the net meter file content of one 2 * 2 pure net lattice structure power net, its corresponding actual power net is referring to accompanying drawing 7:

^**supply?voltage：5

^**#row：2

^**#RC/RLC?section?per?row：2

^**#p/g?strips?per?row：2

^**#max?depth?of?a?tree：0

^**#max?branches?in?each?tree?node：0

^**This?is?a?2×2?power?network

.tran?0.05ns?6ns

^**row：1

^**p/g?strip?connection

R1?1?6?0.76032

R2?3?8?0.76032

R3?5?10?0.76032

^**end?of?p/g?strip?connection

R4?1?11?0.0018128

I1?10?DC?0PWL(0?0.01ns?0.0525mA?2ns?0.5285mA?3ns?0.5145mA?4ns?0.35mA?5ns?0.0315mA)C1?1?0?1.12e-10

R5?1?2?0.18656

L1?2?3?1.46387e-12

C2?3?0?1.67e-10

I2?3?0DC?0PWL(0?0.01ns?0.294mA?2ns?0.665mA?3ns?0.3675mA?4ns?0.2555mA?5ns?0.0315mA)R6?3?4?0.18128

L2?4?5?1.43701e-12

C3?5?0?1.66e-10

I3?5?0DC?0PWL(0?0.01ns?0.231mA?2ns?0.728mA?3ns?0.5775mA?4ns?0.4235mA?5ns?0.0245mA)R7?5?11?0.0018304

^**row：2

R8?6?11?0.0017776

I4?6?0DC?0PWL(0?0.01ns?0.1575mA?2ns?0.637mA?3ns?0.651mA?4ns?0.329mA?5ns?0.0175mA)C4?6?0?1.94e-10

R9?6?7?0.17952

L3?7?8?1.35643e-12

C5?8?0?1.67e-10

I5?8?0DC?0PWL(0?0.01ns?0.189mA?2ns?0.6405mA?3ns?0.6335mA?4ns?0.371mA?5ns?0.028mA)R10?8?9?0.19008

L4?9?10?1.41015e-12

C6?10?0?1.43e-10

I6?10?0DC?0PWL(0?0.01ns?0.2345mA?2ns?0.476mA?3ns?0.5075mA?4ns?0.3255mA?5ns0.007mA)

R11?10?11?0.0018304

^**total?num?of?nodes：11

^**total?num?of?trees：0

^**supply?voltage

V1?11?0?5

.end

1.2 the foundation of component parameters table

In order to utilize the link information and the electrical quantity information of all electric power networks that net meter file provides, simulated program need be set up and describe the tables of data that electricity is led (inverse of resistance), electric capacity, inductance and current source, voltage source parameter respectively.In order to simplify later computational complexity, also can set up corresponding tables of data simultaneously at some the more special structures in the supply network.

1.2.1 the process of setting up of parameter list

1) because the electricity in the supply network is led, the size of electric capacity, inductance, voltage source does not change in time, so only need the run-down net meter file just can obtain, and the data of the size of the current source in the current source table one row are because therefore each electric current of drawing constantly difference of the load of supply network is the amount of a dynamic change, so need upgrade constantly in each different analysis.

The inductance parameters table is given an example, and other tables are similar

The inductance numbering	Head node	Tail node	Inductance size (H)
				?L1	?2	?3	?1.46387e-12
?L2	?4	?5	?1.43701e-12
				?L3	?7	?8	?1.35643e-12
?L4	?9	?10	?1.41015e-12

2) also to generate a node annexation concordance list by scanning net meter file simulated program, want to draw each node by this table and be connected, just can in different component parameters tables, find the concrete electrical quantity of this element according to the element number program that provides with those elements.

Node annexation concordance list

Node serial number	Connect resistance	Connect electric capacity	Connect inductance	Connect current source	Connect voltage source
						1	?R4，R5， ?R1	C1	Do not have	I1	Do not have
2	?R4	Do not have	L1	Do not have	Do not have

3) for the tree structure in the supply network, simulated program will find all tree structures in the whole electric power network by the scanning net meter file, and it is expressed as the node listing of a hierarchy type.The reason of making is the efficient of searching desired data when improving subsequent calculations like this, and related content is referring to 3.2 joints.The generative process of whole tree is carried out reduction in strict accordance with bottom-up method, owing in fact often have many trees to exist simultaneously in the electric power network, so in fact program can generate the node stratification of a forest.Supposing has a following forest structure in the electric power network, as shown in Figure 9, program can access following 4 tables

Table 1: the node that fallen by beta pruning the first time

??3

??4

??8

??9

??10

??11

??14

??15

Table 2: the node that fallen by beta pruning the second time

7

??6

??13

Table 3: the node that is fallen by beta pruning for the third time

????5

Table 4: the node that is fallen by beta pruning for the 4th time

????2

By above beta pruning, in the power net all tree structure all by on shift root node onto, all beta pruning table packs are to the node stratification that just forms forest together.

4) when carrying out the node stratification of forest, can carry out some pretreated operations simultaneously, purpose also is to improve the efficient of later stage calculating, and the detailed process method saves referring to 3.2.2

5) owing to also have a kind of more special syndeton in the electric power network, the RL structure, as shown in Figure 13, this structure can be simplified amount of calculation by the method that the back is introduced, detailed content is referring to 7.2 joints, so simulated program also generates a table of describing all RL structures simultaneously in the scanning net meter file.Accompanying drawing 7 is had:

RL configuration index table for example

The RL structure number	The node number of R end	The node number of L end
			RL1	?1	?3
RL2	?3	?5

2. the processing of particular components

Obtain after all element link informations of power net, program will be handled some special elements according to the requirement of algorithm, and the syndeton of whole electric power network is carried out certain change, to accelerate the computational speed of back.

2.1 what is a particular components

All capacity cell and inductance elements during particular components confession under directions electric network is described

2.2 it is why special

The circuit that contains electric capacity and inductance is a second-order circuit, if inductance and electric capacity are not carried out any processing, then the circuit equation group that all nodes are set up with Kirchhoff's law will be a second order ordinary differential system of linear equations that contains node voltage; Even introduce the auxiliary variable of inductive current as equation group, with system equation group depression of order is the ordinary differential system of linear equations of a single order, because generally the number of node is very big in the equivalent electric circuit of electric power network, the cost that will directly find the solution a so extensive linear differential equation group is very high, to on time domain, analyze simultaneously equivalent electric circuit, be not only the magnitude of voltage that will calculate all nodes on the time point, and needs calculate the magnitude of voltage of these nodes on many time points, even if use the method for numerical value to go to find the solution this differential equation group, efficient also is very low.

2.3 among the present invention to the processing method of particular components

The method that we take in the invention is to use the method (exact value that the symbol of soon differentiating originally draws is represented with the combination of a series of simple function) of finite difference that the characteristic equation of electric capacity and inductance element carry out time domain discreteization.After handling like this, at each constantly, we can with in electric capacity and the inductance only a coefficient processing relevant with the current time electric current and voltage become equivalent resistance, and handle becomes the time-varying current source with the relevant coefficient processing of previous or preceding several moment electric current and voltages.We just can obtain a network that only contains resistance and current source, can use very high-efficient algorithm and find the solution this large-scale resistive network so at each constantly.

Below we introduce and severally realize having the discretization method of different accuracy and computation complexity in our program.

1) trapezoidal Euler method

At first consider to describe the differential equation of linear inductance and electric capacity voltage-current characteristic:

$L\·\frac{{\mathrm{di}}_L}{\mathrm{dt}}=v_L---\left(2.1\right)$ $C\·\frac{{\mathrm{dv}}_C}{\mathrm{dt}}=i_c---\left(2.2\right)$

I wherein _LBe the electric current that flows through inductance element, v _LBe the voltage at inductance element two ends, L is the inductance value of this element, and unit is Henry; i _cBe the electric current that flows through capacity cell, v _cBe the voltage at capacity cell two ends, C is the electric capacity of this element, and unit is a farad.Can obtain following approximate formula by (2.1) and (2.2) being used trapezoidal Euler's method carry out the discretization processing:

$I_c^{t+h}=G_c\·V_c^{t+h}-(G_c\·V_c^t+I_c^t)G_c=\frac{2C}{h}---\left(2.3\right)$

$I_L^{t+h}=G_L\·V_L^{t+h}+(G_L\·V_L^t+I_L^t)G_L=\frac{h}{2L}---\left(2.4\right)$

More than in two formulas h be the simulation step length that the user imports, unit is second, I _c ^T+hAnd V _c ^T+hBe electric current and the terminal voltage on the t+h moment capacitive branch, I _c ^tAnd V _c ^tBe electric current and the terminal voltage on the t moment capacitive branch, G _cCan regard the equivalent conductance after the capacity cell discretization as; And I _L ^T+hAnd V _L ^T+hBe electric current and the terminal voltage on the t+h moment inductive branch, I _L ^tAnd V _L ^tBe electric current and the terminal voltage on the t moment inductive branch, G _LCan regard the equivalent conductance after the inductance element discretization as.

2) linear multistep method

Handle if adopt quadravalence implicit expression Adam Si linear multistep method that (2.1) and (2.2) are carried out discretization, then can obtain following approximate formula:

$I_c^{t+h}=G_c\·V_c^{t+h}-(G_c\·V_c^t+a_1{I}_c^t+a_2{I}_c^{t-h}+a_3{I}_c^{t-2h})$ $G_c=\frac{24C}{9h},$ $a_1=\frac{19}{9},$ $a_2=-\frac{5}{9},$ $a_3=\frac{1}{9}---\left(2.5\right)$

$I_L^{t+h}=G_L\&CenterDot;V_L^{t+h}+(b_1{V}_L^t+b_2{V}_L^{t-h}+b_3{V}_L^{t-2h}+I_L^t)$ $G_L=\frac{9h}{24L},$ ${\mathrm{<figure-callout\; id="1"\; label="b"\; filenames="A20041000346000291.png,A20041000346000341.png"\; state="\{\{state\}\}">b</figure-callout>}}_1=\frac{19h}{24L},$ $b_2=-\frac{5h}{24L},$ $b_3=\frac{h}{24L}---\left(2.6\right)$

Above voltage, electric current variable and go up subscript connotation identical with in (2.3), (2.4) in two formulas, just increased with t-h constantly, voltage that t-2h is relevant constantly, electric current variable and coefficient accordingly.

3) if will be with the parenthesis part of negative sign to be designated as IS in (2.3)-(2.6) _c ^t, the parenthesis part of band positive sign is designated as IS _L ^t, then through the inductance after the above discretization and electric capacity can be regarded as by resistance and the time time-dependent current source linear element formed because they can use reference representation (2.7), (2.8) are represented:

$I_c^{t+h}=G_c\&CenterDot;V_c^{t+h}+{\mathrm{IS}}_c^t---\left(2.7\right)$

$I_L^{t+h}=G_L\&CenterDot;V_L^{t+h}+{\mathrm{IS}}_L^t---\left(2.8\right)$

(2.7) and (2.8) mean that we can be converted to capacity cell and inductance element current source and resistive element in parallel approx, as shown in Figure 14.

2.4 the simulation accuracy after particular components is similar to

Can find that by trapezoidal Euler's method being carried out the Taylor expansion analysis its truncated error is O (h ³), but owing to there is the iterative computation of front and back multistep, its global error can arrive O (h greatly ²); And for quadravalence implicit expression Adam Si linear multistep method, its truncated error is O (h ⁵), owing to also have the iterative computation of multistep, so its global error can reach O (h ⁴), wherein h is the simulation step length of user's input.Generally speaking to arrive higher precision, calculate each just need know in voltage, the current value constantly more before voltage, the current value in the moment, this has not only increased the time overhead of algorithm, also increased the memory cost of algorithm, thereby in actual calculation, should select to use different difference schemes to carry out discretization according to different simulation accuracy requirements.From the error analysis of above difference model as can be known, the selection of simulation step length has very big influence to simulation accuracy.Generally speaking, h selects to such an extent that more little precision of calculation results is just high more, but for the difference method that does not have absolute that has, forces convergence into to retrain simulation step length in order to guarantee it, whole calculating will disperse very soon if h is too small, can not get correct result.In the present invention, we have provided the irrelevant absolute stable proof simultaneously of selection of trapezoidal Euler's discretization method and h.Why this proof has been explained still can be elective under nanosecond (ns) order of magnitude for trapezoidal Euler's method h; On the other hand, h neither select the smaller the betterly, be subjected to the influence of distributed constant C and L, rounding error increased during too small h not only can cause calculating, but also the equivalent conductance very big, inductance that the equivalent conductance that can cause electric capacity in (2.3)-(2.6) becomes becomes very little, this will bring the trouble in the calculating to the abbreviation of back, so the analysis precision of routine and computational speed have been carried out certain compromise after, what use in the analysis software that we realize is trapezoidal Euler's difference scheme, and getting h simultaneously is 0.05ns (0.05 * 10-9s).For application of practical project, because that h selects is smaller, O (h ²) precision very accurate.

2.5 the stability of trapezoidal Euler's method

For the differential equation (2.1) and (2.2) of the voltage-current relationship of describing inductance and electric capacity, because the equation right-hand member does not contain differential variable with showing, so need write out special error equation.Consider that (2.2) formula is through the discrete pairing error equation of trapezoidal Euler's form:

$\left|\frac{\mathrm{\&delta;}{I}_c^{t+h}}{{\mathrm{\&delta;I}}_c^t}\right|=\left|\frac{G_c\&CenterDot;{\mathrm{\&delta;V}}_c^{t+h}-(G_c\&CenterDot;\mathrm{\&delta;}{V}_c^t+{\mathrm{\&delta;I}}_c^t)}{{\mathrm{\&delta;I}}_c^t}\right|\&le;p$

δ I wherein _c ^T+h, δ I _c ^tBe the numerical error on t+h and t two moment capacitance current, δ V _c ^T+h, δ V _c ^tBe the numerical error on t+h and t two moment capacitance voltage, p needs satisfied error convergence speed, if can reach 10 ^-2Or 10 ^-3Just very desirable, we can obtain by the inequality above the abbreviation

$\frac{2C\left|x\right|}{h(p+1)}\&le;\left|{\mathrm{\&delta;I}}_c^t\right|\&le;\frac{2C\left|x\right|}{h(1-p)}$ Wherein $\left|x\right|=|{\mathrm{\&delta;V}}_c^{t+h}-{\mathrm{\&delta;V}}_c^t|$

As can be seen from the above equation, when the numerical error of single step at threshold values

Be accumulation to occur when following, will be but in a single day surpass threshold values by default convergence rate decay, so we can be by choosing the stability that certain threshold values can guarantee algorithm.Because we obtain magnitude of voltage on the electric capacity by the solution node voltage equation, and the numerical method of finding the solution system of linear equations can guarantee | x|≤M, so will satisfy $\frac{2C\left|x\right|}{h(p+1)}<\mathrm{\&eta;},$ η is the accumulated error upper limit, only needs $M<\frac{\mathrm{\&eta;h}(p+1)}{2C}$ That's all.When getting η=10 ^-5, analysis requires the size of h at the ns order of magnitude (10 ^-9) time, because the order of magnitude of distributed capacitance C is 10 ^-10About, so only require M＜10 ⁴That's all, the general numerical computation method of this size is easy to reach.If require the littler error accumulation upper limit, it is just passable only need to increase iterations raising numerical precision for iterative method.For (2.1) formula, similarly analyze also and can lead to the same conclusion, so we say that to adopt trapezoidal Euler's method to carry out choosing of the stability of discrete calculation and time step h irrelevant, as long as guarantee the solving precision of modal equation group, use trapezoidal Euler's discrete method in the analytical calculation of chip power network, can occur the situation of iteration diverges scarcely.

2.6 obtain the discrete parameter table of particular components

The equivalent conductance size that obtains after discrete owing to inductance and capacity cell does not change in time, and the size of current source is a time dependent amount, therefore need refresh in each different moment, and need use the previous moment or the magnitude of voltage in preceding several moment to refreshing of current source, so in the stage of scanning input net meter file, we can be according to the simulation step length h of user's input and the electrical quantity (capacitance or inductance value) of each particular components, the disposable discretization parameter that calculates particular components.It is 0 that the equivalent current source of initial time is made as.

The discrete data table of capacity cell (supposing that it is 0.05ns that the user imports simulation step length)

Element number	Equivalent conductance G c	Constantly	Equivalent current source IS c t
				C1	?4.48	?0ns	?0mA
C2	?6.68	?0ns	?0mA

3. the processing of tree structure

3.1 the replacement of electric capacity, inductance element

Finish after the calculating of discretization, program is not directly carried out next step calculating, but earlier capacity cells all in the power net and inductance element is replaced according to the element discrete data table that obtains in 2.6, replaces to corresponding electricity and leads and current source.

As shown in Figure 15

3.2 replace the merging of back to tree structure

3.2.1 need to carry out the merging of tree structure why

When we knew the modal equation that uses the solution by iterative method circuit, the quadratic power with the node number that the complexity of algorithm is approximate was directly proportional, if can reduce the node number in the circuit significantly, that just can greatly improve the speed of finding the solution certainly.The node voltage value of consideration on power supply network on each time point constituted the solution vector of circuit system equation, and this solution vector is the matrix of a 1xn, and its order has only 1, that is to say that in n the scholar who won the first place in provincial imperial examinations n-1 the scholar who won the first place in provincial imperial examinations being arranged is linear correlation.If we can know the relation between these scholars who won the first place in provincial imperial examinations,, just can obtain the value that all are separated as long as we solve the value that one of them is separated so.Yet expecting between these scholars who won the first place in provincial imperial examinations must all incidence coefficient and be not easy, if use Gaussian elimination method that coefficient matrix is turned to triangle by a series of computing or lower triangular matrix will bring very big computing expense.Even so, if but the coefficient that we can be relatively easy to obtain between the tighter scholar who won the first place in provincial imperial examinations of part coupling concerns, this part node is removed from waiting to ask the equation group, only stay next feature argument, then by the solution node number equation group behind the abbreviation greatly, we just can obtain the value of feature argument, again by the relation of the coefficient between feature argument and the merge node, just can access the global solution of full scale equation group.This thought is the core of our the fast variable elimination algorithm realized just.

The method of eliminating based on variable can effective key be and can and can calculate soon by the magnitude of voltage of yojan node under the situation of knowing the feature argument value in the coefficient correlation that finds the close-coupled scholar who won the first place in provincial imperial examinations under the situation of very little computing expense.By analyzing the equivalent-circuit model of power ground net, we find, the method of using equivalent electric circuit in the Circuit theory is a large amount of intermediate node and tree nodes in the reduction tree net hybrid power supply net efficiently just in time, obtain its coefficient correlation, as long as can design the suitable data structure simultaneously, the process of rebuilding the node voltage value only needs a spot of computing.

3.2.2 the merging process of tree structure

1) merges principle

The linearity of a suitable restriction of process contains source two end resistor network R can come equivalence with the combination in parallel of an independent current source and an individual resistors, and this equivalence becomes Norton equivalent.Wherein, the independent current source electric current is the short circuit current of source network, and promptly the load resistance of this net is 0 o'clock a electric current; And the equivalent electric guide rule is the internal conductance of network, is about to all independent voltage sources and independent voltage among the network R and all puts the port electricity of the network that calculates after 0 and lead, referring to accompanying drawing 10; The linearity of a suitable restriction of process contains source two end resistor network R can come equivalence with the tandem compound of an independent voltage source and an individual resistors, and this equivalence is called the Dai Weinan equivalence.Wherein, the voltage of equivalent voltage source is the open circuit voltage of former network R, the voltage when promptly port does not connect load; Equivalent resistance then is the interior resistance of former network, is about to the port resistance that all independent voltage sources and independent voltage among the network R are all put the network that calculates after 0, referring to accompanying drawing 11.

The Norton equivalent circuit and the thevenin equivalent circuit of a resistor network can transform mutually, referring to accompanying drawing 12.

A. the electric conductivity value in resistance value in the thevenin equivalent circuit and the Norton equivalent circuit multiplies each other and equals 1 G _AbR _Ab=1

B. the size of the independent current source in the Norton equivalent circuit equals the long-pending of electric conductivity value in the value of independent current source in the thevenin equivalent circuit and the Norton equivalent circuit.I _sc＝U _oc·G _ab

For all tree structures in the power supply network, we can begin to do the merger computing from the bottom of every tree.Our target is by using equivalent circuit theory above-mentioned repeatedly, with trees all in the power supply network all the electricity that becomes on the root node of merger lead and current source.Owing to obtained the hierarchical list of forest structure in the whole power supply network in the 3rd small step of 1.2.1,, only need handle just passable according to the node sequence that provides in the forest node stratification so there is no need to rescan whole supply network this moment.

Consider from efficient, our abbreviation will be divided into two the step carry out.Because the merging that electricity is led is not subjected to the influence of current source size, and the merging of current source is relevant with each current source, so the electricity that we can just merge on the branch when the hierarchical list of scanning net meter file spanning forest structure is in advance led, all electricity are led (equivalent conductance that comprises inductance and electric capacity) to merge on the root node, the abbreviation result in this stage uses in the calculating of each time point in the back, can regard a pre-treatment step as.Since each need obtain simultaneously constantly this moment on the root node equivalent conductance and the value of equivalent current source all nodes of whole tree could be fallen with the Norton equivalent circuit equivalent, so after each has upgraded the equivalent current source size of all inductance and electric capacity constantly, we must merge the equivalent current source of inductance and electric capacity on the tree node after upgrading once more, finally obtain equivalent current source new on the root node.Above-mentioned two abbreviation steps all must be used the hierarchical list of forest structure, otherwise just need to do again the scanning of the whole network table at every turn.Therefore, an outstanding hierarchical list design can improve the efficient of calculating greatly.

2) the pre-merging led of electricity

Below we look at how to obtain equivalent conductance on the tree structure root node first.This abbreviation process is a hierarchy type, and the node stratification of the forest that generates in strict accordance with the 3rd small step among the 1.2.1 carries out.Consider the abbreviation process of node on the branch, referring to accompanying drawing 16.G in the accompanying drawing ₁, G ₂G _kThe electricity over the ground of each branch that is connected on the BottomNode node that obtains behind each time abbreviation before being is led G _c, G _L, G _TopBe respectively that the equivalent conductance of electric capacity, the equivalent conductance of inductance and the metal connecting line electricity of branch are led.At first lead and merge being connected all electricity on the BottomNode node, G is led in the merging that obtains BottomNode node electricity over the ground _BottomAnd then lead and merge being connected electricity between MiddleNode node and the ground, cancellation BottomNode node obtains G _MiddleLead and merge being connected electricity between TopNode node and the ground at last, cancellation MiddleNode node obtains G ^*Wherein

$G_{\mathrm{bottom}}=\underset{i=1}{\overset{k}{\mathrm{\&Sigma;}}}{G}_i+G_c,$ $G_{\mathrm{middle}}=\frac{G_L\&CenterDot;G_{\mathrm{bottom}}}{G_L+G_{\mathrm{bottom}}},$ $G^{*}=\frac{G_{\mathrm{top}}\&CenterDot;G_{\mathrm{middle}}}{G_{\mathrm{top}}+G_{\mathrm{middle}}}---\left(3.1\right)$

The merging method that constantly repeats above use just can obtain total equivalent conductance at the root node of tree.When merging, simulated program can be according to the order of reduction according to the G on each branch _Bottom, G _Middle, G ^*, the parameter when carrying out the current source joint account afterwards.Program can be calculated a on each tree-like node simultaneously, b, and c, d, five parameters of e, generating an order with node in the forest node stratification is the abbreviation parameter list that puts in order.A wherein, b, the later stage that three parameters of c will be used for current source merges (referring to the ensuing the 3rd) trifle); And d, two parameters of e will be used to rebuild the node (referring to 7.1 joints) that is eliminated.

A typical tree structure abbreviation parameter list

Node ID	Parameter a	Parameter b	Parameter c	Parameter d	Parameter e	?G bottom	G middle	?G *
									1
2

a＝G _L·d，b＝1-a，c＝G _top·e， $d=\frac{1}{G_L+G_{\mathrm{bottom}}},$ $e=\frac{1}{G_{\mathrm{top}}+G_{\mathrm{middle}}}---\left(3.2\right)$

3) later stage of current source merges

Below how we try to achieve the value of the equivalent current source of root node again on each time point, referring to accompanying drawing 17.IS in the accompanying drawing ^t _L, IS ^t _c, I ^t _NodeBe respectively inductance, electric capacity t constantly equivalent current and functional module in t current drawn constantly, wherein have only IS ^t _cDirection be to get that to flow into node from ground be positive direction, other all get the directions that flow to ground is positive direction; I ^t ₁, I ^t ₂I ^t _kBe the former t equivalent current source over the ground constantly that obtains behind the abbreviation that respectively goes on foot of subtree branch on the C node, the direction of all getting the inflow place is its positive direction.We at first merge all current sources that are connected on the BottomNode node, the equivalence current source I over the ground of BottomNode node _Bottom ^t

$I_{\mathrm{bottom}}^t=\underset{j=1}{\overset{k}{\mathrm{\&Sigma;}}}{I}_j^t-{\mathrm{IS}}_c^t+I_{\mathrm{node}}^t---\left(3.3\right)$

We lead node from the promise formal argument of pausing to the current source on ground and electricity and become the Dai Weinan form then, obtain V1 and V2

$\mathrm{<figure-callout\; id="1"\; label="V"\; filenames="A20041000346000291.png,A20041000346000341.png"\; state="\{\{state\}\}">V</figure-callout>}1=G_L\&CenterDot;{\mathrm{IS}}_L^t,$ $V2=G_{\mathrm{bottom}}\&CenterDot;I_{\mathrm{bottom}}^t---\left(3.4\right)$

The voltage source V 1, the V2 that remerge, electricity is led G _L, G _Bottom, contravariant unreal to promise pause form just obtain MiddleNode to ground equivalent conductance G _MiddleWith equivalent current source I to ground ^t _Middle, because G _MiddleThis step in (3.1) formula, calculates, so only need be calculated I ^t _Middle, can prove

$I_{\mathrm{middle}}^t=a\&CenterDot;I_{\mathrm{bottom}}^t+b\&CenterDot;{\mathrm{IS}}_L^t---\left(3.5\right),$

Wherein a and b are the coefficients of definition in (3.2).

At last we to be connected electricity over the ground on the Middle node and lead and over the ground current source carry out pausing form to the conversion of Dai Weinan form from promise, merge G _TopThe promise form of pausing is changed in contravariant more afterwards, so just can obtain on the TopNode node t equivalence constantly over the ground electricity lead G ^*With equivalence current source I over the ground ^t _*, wherein $I_{*}^t=c\&CenterDot;I_{\mathrm{middle}}^t---\left(3.6\right)$

We can see from 3.3,3.5,3.6, in fact the process of obtaining the equivalent current source size on the root node is exactly the process that the current source after all upgrade in the circuit network is carried out the linear combination computing, only this linear combination must be undertaken by the level of tree, if we pretreatment stage calculate and storage under the combination coefficient of each branch, then each time point afterwards ask each tree structure root node equivalence over the ground the current source size only need all tree structures once just passable by the level traversal from the bottom to the root.

4.RL the elimination of structure

Eliminate after all tree structures, electric power network originally is converted to a simple network structure, but also has a large amount of RL structures in this net, can further improve analysis efficiency by eliminating.In this step, simulated program will carry out conversion by algorithm according to the order that RL configuration index table provides, and eliminate the intermediate node in the power net.To generate an order with RL configuration index table be the RL simplify structure parameter list that puts in order to simulated program in the abbreviation process, and these parameters will be used in the recovery process of back, referring to 7.1 joints.

A typical R L simplify structure parameter list

Wherein calculation of parameter is as follows: m=oG, and n=1-m, $o=\frac{1}{G+G_L}$

G is that the electricity that carries on the RL structure is led G _LBe that the electricity that the L equivalence obtains in the RL structure is led, by CALCULATION OF PARAMETERS, program can obtain the equivalent conductance G of RL structure referring to accompanying drawing 13 _RLWith equivalent current size I ^t _RLG _RL=mG _L, $I_{\mathrm{RL}}^t=\frac{{\mathrm{IS}}_L^t}{m}$

5. the foundation of compute matrix and current source vector

5.1 the matrix form of modal equation group

Use trapezoidal Euler method that the RLC model of power ground net is carried out after time domain simplifies, we will analyze the DC network on each time point, and to find the solution such DC network, we must use Kirchhoff's second law and current law to list the modal equation group to each node wherein, thereby consider that simultaneously voltage and current must meet on the branch road Ohm's law obtains the system of linear equations about supply node voltage, electric current.According to electric network figure theory as can be known, the modal equation of any circuit network that is made of circuit element can both be write as matrix equation B Λ B ^TThe form of V=I (5.1), wherein the A matrix is the incidence matrices of the topological structure figure identical with this circuit network, the ifs circuit net is to have N node, the circuit of M bar branch road, the A matrix is exactly the matrix of a N * M, and has

(5.1) A in the formula is the diagonal matrix of one M * M, and the element on the diagonal is the electric conductivity value on the corresponding numbering branch road; V is the vector of N * 1, and element is wherein represented the magnitude of voltage of interdependent node; I also is the vector of N * 1, and element is wherein represented the current value of each node to ground.If note B Λ is B ^T=A, V=x, I=b, then (5.1) formula can change into the standard type Ax=b of linear equations group.

The system of linear equations of standard hereto, because its symmetric positive definite characteristic, we can further be optimized, and improve the speed of finding the solution.At first because the general quantitative value of current source vector on equation group the right is very little, when calculating, be subjected to the influence of numerical error bigger, we lead item and move to equation group the right so will be present in the electricity that links to each other with voltage source on the equation group left side originally, to increase the absolute value of the right current vector, improve the characteristic that the anti-numerical error of equation group is disturbed.Simultaneously because the electricity that has occurred linking to each other with voltage source accordingly in the coefficient of the diagonal entry on the equation group left side is led item, improved the conditional number of this matrix greatly, and the conditional number of On Solving System of Linear Equations speed and matrix is in close relations, should the improvement method will become better along with the increase of voltage source in the electric network simultaneously.Below (5.3) in two formula be the formula of actual generation coefficient matrix.V wherein _kBe the magnitude of voltage of a node of delegation's representative in the matrix, g _IkBe the electric conductivity value that this node links to each other with other nodes in the circuit, v _iBe the magnitude of voltage of other nodes, g _JkBe the electric conductivity value that this node is connected with voltage source, v _jIt is the magnitude of voltage of voltage source.P is the node indexed set that links to each other with voltage source, and N ' is the node sum on the network structure in the former network.

$\underset{j\&Element;P}{\mathrm{\&Sigma;}}{g}_{\mathrm{jk}}(v_j-v_k)+\underset{i=1,i\&NotEqual;k}{\overset{N^{\&prime;}}{\mathrm{\&Sigma;}}}{g}_{\mathrm{ik}}(v_i-v_k)=i_k---\left(5.2\right)$

$-v_k(\underset{j\&Element;P}{\mathrm{\&Sigma;}}{g}_{\mathrm{jk}}+\underset{i=1,i\&NotEqual;k}{\overset{n}{\mathrm{\&Sigma;}}}{g}_{\mathrm{ik}})+\underset{i=1,i\&NotEqual;k}{\overset{N^{\&prime;}}{\mathrm{\&Sigma;}}}{g}_{\mathrm{ik}}{v}_k=i_k-\underset{j\&Element;P}{\mathrm{\&Sigma;}}{g}_{\mathrm{jk}}{v}_j---\left(5.3\right)$

(5.3) can be write as the form of matrix:

G·V＝I

G is the matrix of a N ' * N ', wherein

I is a N ' dimensional vector, wherein $I_k=i_k-\underset{j\&Element;P}{\mathrm{\&Sigma;}}{g}_{\mathrm{jk}}{v}_j$

Wherein the G matrix is exactly the compute matrix that we need obtain when calculating is initial

5.2 the generation step of compute matrix

1) new node annexation concordance list

Finish after the work of treatment of all particular components, the web frame that only remaining electricity is led in the power net, current source and voltage source constitute, owing to eliminated many nodes, in this step, simulated program is numbered nodes all in the network again, and forms new node annexation concordance list, only contains that electricity is led in this table, current source and voltage source, simulated program will be set up Special matrix and the corresponding current source vector of describing the electric power network electrical characteristics according to this table and algorithmic rule simultaneously.

Newly-built node annexation concordance list

Node serial number	Connecting electricity leads	Connect current source	Connect voltage source
				1	?G1，G3	I1	Do not have
2	?G4	Do not have	V1

2) for the electric power network behind the abbreviation, program will generate the compute matrix of the symmetric positive definite of a N ' * N ', and N ' is the node sum on the network structure in the former network.The method that generates this matrix is as follows:

A) be 0 node with the ground connection vertex ticks, the ground connection node is removed from node annexation concordance list

B) order of arranging according to node in the node annexation concordance list is with the row order of this order as generator matrix.According to (5.3), during the delegation of generator matrix, lead the electricity of listing in the hurdle and lead, lead parameter list by searching electricity by connecting electricity in the node concordance list, find and the numbering of other nodes in new concordance list that this node has an annexation, on the respective column of this row of matrix, insert the size that associated electrical is led.

C) if a node discord voltage source links to each other, the opposite number that the electricity that the size of this row pivot equals to link to each other with this row pivot node is led big or small sum, if this node links to each other with voltage source, the electricity that the size of this row pivot equals to link to each other with this row pivot node lead big or small sum add be connected between voltage source and this node that electricity is led and opposite number.

3) in generator matrix, simulated program also generates corresponding emulation current source vector constantly simultaneously.If node discord voltage source links to each other, then the pairing current source of this row matrix equals in the node annexation concordance list algebraical sum of all current sources (flow into to just, flow out for bearing) in current source one hurdle; If a node links to each other with voltage source, the pairing current source of this row matrix in current source one hurdle the algebraical sum of all current sources, also needs to add all voltage sources that are attached thereto and the sum of products that is connected the voltage source conductivity in will getting node annexation concordance list so.

6. find the solution simulation matrix

The G matrix that obtains does not above change in time in simulation process and changes, and current source vector I then needs to upgrade constantly according to each emulation.Simulated program obtains after this matrix and the vector, just finds the solution engine by calling one, calculates the distribution situation of voltage on each node of this moment.This program is used finds the solution engine and is based on pre-excellent conjugate gradient algorithms that incomplete Qiao Laisiji decomposes, and it is fast that this engine has speed, and the characteristics that stability is high are core components of this simulated program.

6.1 pre-excellent conjugate gradient derivation algorithm based on incomplete Qiao Laisiji decomposition

For the Algebraic Equation set that (5.1) formula provides,, just can Algebraic Equation set be found the solution problem and be converted into a problem of finding the solution functional extreme value by means of the variation principle of functional if its coefficient matrices A is the matrix of a symmetric positive definite.

If A is the rank symmetric positive definite matrixs, b is a known vector, x ^*The sufficient and necessary condition that is solution of equations is for satisfying

(x ^*)＝min((x))x∈R ⁿ

Wherein Wherein () symbol is interior product code

This principle is called the Ritz principle, is the basis of conjugate gradient method and evolution algorithmic thereof.

By variation principle as can be known, calculate the minimum algorithm of (x) and also just provided the algorithm of finding the solution the full scale equation group, the value of (x) is descended and try to achieve the minimum key of (x) yes.

At first consider classical steepest descent method, establish x ₀Be R ⁿIn more arbitrarily, then (x) is the negative gradient direction of this point in this point the fastest direction that descends

As calculated as can be known,

R wherein ₀Be called residual vector, make x ₁=x ₀+ ar ₀(6.1)

Wherein a is undetermined, because (x) is along r ₀Direction descends, so (x is arranged ₁)＜ (x ₀)

In order to make the best results of decline, nature will make

The a that tries to achieve like this can make x ₁Along r ₀Direction descends at most, and (6.2) formula separate for ${\mathrm{\&alpha;}}_1=\frac{(r_0,r_0)}{({\mathrm{Ar}}_0,r_0)}$

If in (6.1) formula, get a=a ₁, just obtain a step steepest descent method, usually have

x _k＝x _k-1+a _kr _k-1?k＝1，2，

R wherein _K-1=b-Ax _K-1, ${\mathrm{\&alpha;}}_k=\frac{(r_{k-1},r_{k-1})}{({\mathrm{Ar}}_{k-1},r_{k-1})}$

Because A is a symmetric positive definite, so its all characteristic values all are positive numbers, is made as λ ₁〉=λ ₂〉=... 〉=λ _n＞0 definition ${\left|\right|x\left|\right|}_A={(x,\mathrm{Ax})}^{\frac{1}{2}}$ Be a kind of vector norm, then the convergence of steepest descent method has following result

${\left|\right|x_k-x^{*}\left|\right|}_A\&le;{\left(\frac{{\mathrm{\&lambda;}}_1-{\mathrm{\&lambda;}}_n}{{\mathrm{\&lambda;}}_1+{\mathrm{\&lambda;}}_n}\right)}^k{\left|\right|x_0-x^{*}\left|\right|}_A$

X wherein ^*Be the exact solution of equation group, x ₀Be initial point

Though it should be noted r _kBe that (x) is at x _kThe direction of steepest descent at place, but this is local, reach the minimum of (x) as early as possible, such selection is not necessarily optimum, on the other hand, because round-off error in calculation can influence actual descent direction and depart from direction of steepest descent, so have certain unsteadiness when calculating.

The method of conjugate gradient then is primarily aimed at these several shortcomings of steepest descent method and improves, and its main thought is in the minimization process of (x), and decline should have the characteristics of total optimization.

If at R ⁿIn can get p ₁, p ₂P _kBe linear independence, and can make x _kSatisfy

(x _k)＝min((x))x∈S _k??(6.3)

S wherein _k=span{p ₁, p ₂P _k, promptly by p ₁, p ₂P _kThe linear space of opening has then just provided separating of full scale equation group during k=n.When k=1, as long as get p ₁=r ₀=b-Ax ₀Just can satisfy the requirement of (6.3) formula

Supposing has p ₁, p ₂P _K-1(k 〉=2) make

$x_{k-1}=\underset{i=1}{\overset{k-1}{\mathrm{\&Sigma;}}}{\mathrm{\&alpha;}}_i{p}_i$ And satisfy (x _k)=min ( (x)) x ∈ S _k

Conjugate gradient method is got x _k=x _K-1+ a _kp _kAs long as can select p _k, feasible (p _i, Ap _k)=0 i=1,2 ... k-1 (6.4) sets up and (claims p _kAnd p ₁, p ₂P _K-1About the A conjugation), just can satisfy (6.3).And non-0 vector that satisfies (6.4) formula can be configured out:

$p_k=r_{k-1}+{\mathrm{\&beta;}}_k{p}_{k-1},{\mathrm{\&beta;}}_k=-\frac{(p_{k-1},{\mathrm{Ar}}_{k-1})}{(p_{k-1},{\mathrm{Ap}}_{k-1})}$

Like this by iterating sequence { x _kWill converge to separating of full scale equation group.

Theoretically, conjugate gradient method is a kind of method of directly finding the solution system of linear equations, by the construction process of method as seen, if A is n rank matrixes, then x _nShould be the exact solution of equation group, but since the influence of rounding error in the Practical Calculation, p ₁, p ₂P _kThe impossible strict characteristic that keeps the A conjugation, even after k arrives to a certain degree greatly, p ₁, p ₂P _kThe almost linear correlation that may become is so conjugate gradient method is more used as iterative method.

Because A is a symmetric positive definite, the characteristic value of establishing it is λ ₁〉=λ ₂〉=... 〉=λ _n＞0, the sequence vector that provides with conjugate gradient method will satisfy following estimation:

${\left|\right|x_k-x^{*}\left|\right|}_A\&le;{\left(\frac{\sqrt{{\mathrm{\&lambda;}}_1}-\sqrt{{\mathrm{\&lambda;}}_n}}{\sqrt{{\mathrm{\&lambda;}}_1}+\sqrt{{\mathrm{\&lambda;}}_n}}\right)}^k{\left|\right|x_0-x^{*}\left|\right|}_A$

Conjugate gradient method is the coefficient that can make full use of coefficient matrix as its advantage of iterative method of a kind of quick convergence, calculation procedure is simple and clear, be easy to parallel computation, but when the situation of non-uniform Distribution appears in the characteristic value of coefficient matrix, the speed of convergence will be received influence.For the conjugate gradient method of classics, the speed of its convergence depends on the spectrum distribution situation of coefficient matrix, and it can obtain high-precision approximate solution with seldom several steps when very little or eigenvalue distribution was very concentrated when the conditional number of coefficient matrix.And if the characteristic value of coefficient matrix is when being distributed on the very long interval very unevenly, it is very slow that the convergence rate of conjugate gradient method will become.In order to overcome this shortcoming, make it when analyzing the coefficient matrix of widely different circuit equation, can provide and find the solution speed more stably, must consider the coefficient matrix of circuit equation is carried out preliminary treatment.If A is a symmetric positive definite, it just necessarily exists Qiao Laisiji to decompose, if but A still is large-scale sparse, then decompose the sparse property of destroying A possibly fully, and not exclusively the Qiao Laisiji decomposition is resolved into A exactly

A＝LL ^T+R

Wherein L is a upper triangular matrix, and R is called residual matrix, because R can change here, so the sparse property of L is decomposed the problem of destroying the sparse property of matrix with regard to the passable assurance of arriving thereby overcome Qiao Laisiji.Can make pre-excellent matrix M=LU, U and L have the U=DLT of relation, wherein the matrix be made up of the diagonal element of A of D.When residual matrix R selected suitablely, pre-excellent matrix can have the sparse property identical with coefficient matrices A and close with A.Can prove that in theory M and A are close more, pre-excellent conjugate gradient method restrains soon more.The incomplete Qiao Laisiji that we use the method that is similar to Gaussian elimination to obtain coefficient matrix decomposes and pre-excellent matrix.Not exclusively the Qiao Laisiji process of decomposing as shown in Figure 18, the matrix number A that sets up departments has been broken down into the i step, then this moment element a _IiBecome pivot.Adopt " Gaussian elimination method " to make a _IiIt is zero that other element on the column disappears.Yet this " Gaussian elimination method " is incomplete, this be because: since our purpose is to try to achieve one to go up (descend) triangular matrix U (L), so following (on) element of triangular matrix can not add forward steps.Consider the situation of k row, have only a of working as _IkAnd a _Jk(when i＜j＜k) was non-vanishing, Gaussian elimination just can take place, in other cases a _IkAnd a _JkAll constant.The sparse property of coefficient matrices A has guaranteed that the operand of incomplete Qiao Laisiji decomposition is very little.

7. recover the argument be eliminated

Previous step calculating only obtains abbreviation posterior nodal point voltage and gets distribution situation, still needs just can draw all node voltage distribution situations through the calculating of two steps

7.1 the reconstruction of yojan node is calculated

After the magnitude of voltage that solves closely online all nodes, the voltage that we at first need to rebuild all intermediate nodes can be rebuild the voltage of tree node then, because have the situation of root on intermediate node of tree certainly.The derivation of carrying out during according to top equivalence is obtaining all RL node two end nodes at certain

Behind the voltage constantly, can recover this magnitude of voltage constantly of RL node one by one according to following formula.

$V_{\mathrm{RLnode}}^t=m\&CenterDot;V_{\mathrm{Gnode}}^t+n\&CenterDot;V_{\mathrm{Lnode}}^t-o\&CenterDot;{\mathrm{IS}}_L^t---\left(7.1\right)$

Owing to all calculate and store during the node of all coefficients that need in calculating in the middle of beginning to merge, so add and subtract the voltage that just can recover all intermediate nodes with the multiplication and division computing by the intermediate node chain.

The process of recovering tree node voltage is the level ergodic process of the bottom from tree root to tree.For the branch on each level, if we have known that the voltage of its close node (TopNode node) just can obtain the voltage of Middle Node and Bottom Node in the accompanying drawing 15, and Bottom Node will be the root node of following certain branch of one deck, so repeat to calculate the voltage that just can rebuild all tree nodes.By carrying out the backward induction method of abbreviation process, can prove that the iterative computation formula of recovering the abbreviation node voltage is as follows:

$V_{\mathrm{middle}}^t=c\&CenterDot;V_{\mathrm{top}}^t-{\mathrm{eI}}_{\mathrm{middle}}^t---\left(7.2\right)$

$V_{\mathrm{bottom}}^t=a\&CenterDot;V_{\mathrm{middle}}^t+d\&CenterDot;(I_L^t-I_{\mathrm{bottom}}^t)---\left(7.3\right)$

V wherein _Top ^T+hBe the t+h node voltage of TopNode node constantly, V _Middle ^T+hWith Vbottomt+h be the voltage of the t+h that will the calculate intermediate node that is eliminated constantly, I _Middle ^tThe equivalence that is the t MiddleNode node of calculating constantly is to earth-current, I _Bottom ^tThe equivalence that is the t BottonNode node of calculating constantly is to earth-current, I _L ^tIt is the t equivalent current source of inductance constantly.A, b, c, d, the definition of the several coefficients of e is identical with (3.2) formula.

a＝G _L·d，b＝1-a，c＝G _top·e， $d=\frac{1}{G_L+G_{\mathrm{bottom}}},$ $e=\frac{1}{G_{\mathrm{top}}+G_{\mathrm{middle}}}---\left(3.2\right)$

7.2 the recovering step of abbreviation node

1) order and the RL simplify structure parameter list that provides according to RL configuration index table reduces the magnitude of voltage of all intermediate nodes by (7.1)

2), reduce the magnitude of voltage of all tree nodes by (7.2) and (7.3) according to the order and the tree structure abbreviation parameter list of node in the forest node stratification

8. the iteration of emulation

Obtain after the voltage distribution of all nodes in the moment, in order to proceed next emulation constantly, program need distribute according to each node voltage, recomputate the current source vector.Specifically be divided into following a few step:

1) recomputates in second step data on equivalent current source one hurdle in the element discrete data table

2) according to element discrete data table and forest node stratification after upgrading, the equivalent current source (need not again conductive structures to be carried out double counting this moment) of tree structure after obtaining merging by bottom-up order once more

3) eliminate the RL structure again.

Method during 4) according to generator matrix recomputates the current source vector, and it is constant that keep original matrix this moment.

Constantly repeat above operation, simulated program is just constantly analyzed the simulation result constantly that makes new advances, till the emulation that arrives regulation constantly.

Claims (1)

1, the high-speed, high precision transient state emulation mode of tree net hybrid power supply structure among the VLSI is characterized in that it is that computing platform uses the C language to realize that under the unix environment it depends on several steps with the SunV880 work station:

1) the topological link information and the electrical quantity information of the electric power network that provides with Spice net sheet form of program scanning

2) computer program utilizes the information that step 1) obtains, and sets up respectively and to describe that electricity is led, the tables of data of electric capacity, inductance and current source, voltage source parameter

3) program finds all tree structures in the whole electric power network by the scanning net meter file, and it is expressed as the node listing of a hierarchy type, generates a tabulation of describing the RL structure simultaneously

4) calculate the capacity cell in the power/grounding line network and the equivalent conductance size and the equivalent transient current source size of inductance element by the difference discrete method under following any time domain, promptly capacity cell and inductance element are converted to current source and resistive element in parallel approx, the equivalent current source of establishing initial time simultaneously is zero

4.1) trapezoidal Euler method

For electric capacity $I_c^{t+h}=G_c\&CenterDot;V_c^{t+h}-(G_c\&CenterDot;V_c^t+I_c^t)$ $G_c=\frac{2C}{h}$

For inductance $I_L^{t+h}=G_L\&CenterDot;V_L^{t+h}+(G_L\&CenterDot;V_L^t+I_L^t)$ $G_L=\frac{h}{2L}$

Wherein h is the simulation step length that the user imports, and unit is second

I _c ^T+h, V _c ^T+h, be t+h electric current and the terminal voltage on the capacitive branch constantly respectively

I _c ^t, V _c ^tBe respectively electric current and the terminal voltage on the t moment capacitive branch; G _cIt is the equivalent conductance after the appearance element discretization

I _L ^t, V _L ^tBe respectively electric current and the terminal voltage on the t moment inductive branch; G _LIt is the equivalent conductance after the capacity cell discretization

If order ${\mathrm{IS}}_c^t=-(G_c\&CenterDot;V_c^t+I_c^t)$ Then $I_c^{t+h}=G_c\&CenterDot;V_c^{t+h}+{\mathrm{IS}}_c^t$

${\mathrm{IS}}_L^t=(G_L\&CenterDot;V_L^t+I_L^t)$ Then $I_L^{t+h}=G_L\&CenterDot;V_L^{t+h}+{\mathrm{IS}}_L^t$

4.2) linear multistep method

$I_c^{t+h}=G_c\&CenterDot;V_c^{t+h}-(G_c\&CenterDot;V_c^t+a_1{I}_c^t+a_2{I}_c^{t-h}+a_3{I}_c^{t-2h})$

$G_c=\frac{24C}{9h},a_1=\frac{19}{9},a_2=-\frac{5}{9},a_3=\frac{1}{9}$

$I_L^{t+h}=G_L\&CenterDot;V_L^{t+h}+(b_1{V}_L^t+b_2{V}_L^{t-h}+b_3{V}_L^{t-2h}+I_L^t)$

$G_L=\frac{9h}{24L},b_1=\frac{19h}{24L},b_2=-\frac{5h}{24L},b_3=\frac{h}{24L}$

If order ${\mathrm{IS}}_c^t=-(G_c\&CenterDot;V_c^t+a_1{I}_c^t+a_2{I}_c^{t-h}+a_3{I}_c^{t-2h})$ Then $I_c^{t+h}=G_c\&CenterDot;V_c^{t+h}+{\mathrm{IS}}_c^t$

If order ${\mathrm{IS}}_L^t=(b_1{V}_L^t+b_2{V}_L^{t-h}+b_3{V}_L^{t-2h}+I_L^t)$ Then $I_L^{t+h}=G_L\&CenterDot;V_L^{t+h}+{\mathrm{IS}}_L^t$

5) according to bottom-up order in the forest node stratification that obtains in the step 3), by searching discrete data table at the bottom of node annexation concordance list and electric capacity, the inductance element, being connected on each tree node, electric capacity that need change and inductance replace to corresponding electricity and lead and current source

6) according to the order of node in the above-mentioned forest node stratification, bottom from every tree, use the linear equivalent circuit theory that contains two ends, source resistor network repeatedly, the merging that current source after replacing and conductance element are made hierarchy type, make trees all on the power supply network all merger be that electricity on the root node is led and current source, it contains following two steps in sequence:

6.1) equivalent conductance of all electric capacity and inductance is merged on the root node, this step can carry out in step 3)

6.2) after each has upgraded the equivalent current source of all inductance and electric capacity constantly, again the equivalent current source of electric capacity and inductance on the tree node after upgrading is merged again, finally obtain the equivalent current source on the root node

7) program is carried out conversion according to the order that RL configuration index table provides with the above-mentioned principle of equal effects, eliminates the intermediate node in the power net, and generating an order with RL configuration index table is the RL structured parameter table that puts in order, m wherein, and n, o is calculated as follows:

$m=o\&CenterDot;G,n=1-m,o=\frac{1}{G+G_L}$

Wherein, to be that RL is structural lead from charged G

G _LBe that the electricity that obtains after the L equivalence in the RL structure is led

8) again nodes all in the network is sorted, form new node annexation concordance list

9) according to the power/ground topological structure after simplifying, generate compute matrix and corresponding current source vector, form the system of linear equations of supply node voltage, electric current, it depends on following steps:

9.1) be the ground connection vertex ticks zero node, the ground connection node is gone out from node annexation concordance list.

9.2) obtain the system of linear equations of supply node voltage, electric current based on Kirchhoff's law and Ohm's law, be shown below

$\underset{j\&Element;P}{\mathrm{\&Sigma;}}{g}_{\mathrm{jk}}(v_j-v_k)+\underset{i=1,i\&NotEqual;k}{\overset{N^{\&prime;}}{\mathrm{\&Sigma;}}}{g}_{\mathrm{ik}}(v_i-v_k)=i_k$

Form is GV=I

G is the matrix of a N * M, is called compute matrix, wherein:

I is a N dimensional vector, and element is wherein represented the current value of each node to ground, and wherein N ' is the node number of web frame in the power supply network, and M is a way of web frame

v _kIt is the magnitude of voltage of a node of delegation's representative in the matrix

v _iIt is the magnitude of voltage of other nodes

v _jIt is the magnitude of voltage of voltage source

P is the indexed set of the node that links to each other with voltage source

g _IkIt is the electric conductivity value that node k links to each other with other node i

g _JkIt is the electric conductivity value that node k links to each other with voltage source

10) find the solution the distribution that engine obtains simplifying the posterior nodal point supply power voltage by calling the pre-excellent conjugate gradient algorithms of decomposing based on incomplete Qiao Laisiji

$V_{\mathrm{RLnode}}^t=m\&CenterDot;V_{\mathrm{Gnode}}^t+n\&CenterDot;V_{\mathrm{Lnode}}^t-o\&CenterDot;{\mathrm{IS}}_L^t$

11) at two end nodes that obtain all RL structures after voltage sometime, according to RL simplify structure parameter list, recover this magnitude of voltage constantly of RL node one by one according to following formula, carry out the voltage that arithmetic just can recover all intermediate nodes by the intermediate node chain again

${V^t}_{\mathrm{middle}}=c\&CenterDot;V_{\mathrm{top}}^t-{\mathrm{eI}}_{\mathrm{middle}}^t$

$V_{\mathrm{bottom}}^t=a\&CenterDot;V_{\mathrm{middle}}^t+d\&CenterDot;(I_L^t-I_{\mathrm{bottom}}^t)$

$a=G_L\&CenterDot;d,$ $b=1-a,$ $c=G_{\mathrm{top}}\&CenterDot;e,$ $d=\frac{1}{G_L+G_{\mathrm{bottom}}},$ $e=\frac{1}{G_{\mathrm{top}}+G_{\mathrm{middle}}}$

Wherein G, G _LState as defined above.

12), reduce all tree node magnitudes of voltage by following formula according to the order and the tree structure abbreviation parameter list of node in the forest node stratification

13) the whole node voltages that obtain more than the basis distribute, and recomputate the current source vector

14), jump to step 10) and continue to carry out if do not reach predetermined simulation time.

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