CN115600441A - Data processing method, device and equipment of chip circuit and storage medium - Google Patents

Data processing method, device and equipment of chip circuit and storage medium Download PDF

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CN115600441A
CN115600441A CN202211598243.0A CN202211598243A CN115600441A CN 115600441 A CN115600441 A CN 115600441A CN 202211598243 A CN202211598243 A CN 202211598243A CN 115600441 A CN115600441 A CN 115600441A
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陈英时
诸敏
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Shenzhen Hongxin Micro Nano Technology Co ltd
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Abstract

The application provides a data processing method, a data processing device, data processing equipment and a storage medium of a chip circuit, and belongs to the technical field of power electronics. The method comprises the following steps: determining a target operation matrix of a target operation chip in scene service data, wherein the target operation matrix is a Laplace matrix, and the scene service data comprises: the method comprises the following steps of (1) obtaining a target operation matrix, a plurality of scene parameter matrices and an acceleration matrix to be determined; performing matrix transformation on the target operation matrix to obtain a transformed matrix meeting a regular condition; determining accelerator information according to the transformed matrix, and obtaining an acceleration matrix in the scene service data based on the accelerator information; and performing operation processing on the scene service data to obtain a processing result of the scene service data. The method and the device can improve the speed of data solving, and further improve the simulation efficiency.

Description

Data processing method, device and equipment of chip circuit and storage medium
Technical Field
The present disclosure relates to the field of power electronics technologies, and in particular, to a data processing method, apparatus, device, and storage medium for a chip circuit.
Background
In an integrated circuit, corresponding calculations are usually performed on a chip-by-chip basis to achieve the processing of the relevant data. For example, simulation processing may be performed on actual application data such as electricity, magnetism, heat, force, and the like to obtain corresponding simulation results.
In the prior art, for a problem of a very large scale (billions or even more transistors), an iterative method is mainly adopted for solving to obtain a simulation result. Among them, the preconditioned accelerated conjugate gradient method (PCG) is widely used.
However, the efficiency of the iterative method depends on a preconditioner accelerator (also called preprocessor). When the method is only adopted to solve data to obtain a simulation result, the solution process is slow due to the excessively large data volume to be simulated, and the simulation efficiency is low.
Disclosure of Invention
The application aims to provide a data processing method, a data processing device, data processing equipment and a storage medium of a chip circuit, which can improve the speed of data solving and further improve the efficiency of simulation.
The embodiment of the application is realized as follows:
in one aspect of the embodiments of the present application, a data processing method for a chip circuit is provided, including:
determining a target operation matrix of a target operation chip in scene service data, wherein the target operation matrix is a Laplacian matrix, and the scene service data comprises: the method comprises the following steps of (1) obtaining a target operation matrix, a plurality of scene parameter matrices and an acceleration matrix to be determined;
performing matrix transformation on the target operation matrix to obtain a transformed matrix meeting a regular condition;
determining accelerator information according to the transformed matrix, and obtaining an acceleration matrix in the scene service data based on the accelerator information;
and performing operation processing on the scene service data to obtain a processing result of the scene service data.
Optionally, performing matrix transformation on the target operation matrix to obtain a transformed matrix meeting a regular condition, including:
determining a characteristic value of a target operation matrix;
and performing matrix transformation on the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, determining the eigenvalue of the target operation matrix includes:
respectively determining a maximum eigenvalue and a minimum eigenvalue of the target operation matrix according to the Laplace spectrum characteristic of the target operation matrix;
the method for carrying out matrix change on the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting a regular condition comprises the following steps:
and carrying out matrix change on the target operation matrix based on the maximum characteristic value and the minimum characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, determining accelerator information according to the transformed matrix, and obtaining an acceleration matrix in the scene service data based on the accelerator information, including:
determining accelerator information based on the Chebyshev polynomial to be used and the transformed matrix;
and taking the accelerator information as an acceleration matrix in the scene service data.
Optionally, before performing matrix transformation on the target operation matrix to obtain a transformed matrix satisfying the regularization condition, the method further includes:
parameter information in the chebyshev polynomial to be used is determined.
Optionally, determining a target operation matrix of the target operation chip in the scene service data includes:
acquiring a circuit equation set of a target operation chip in a service scene corresponding to scene service data;
and performing regularization processing on the circuit equation set to obtain a target operation matrix of the target operation chip in the scene service data.
Optionally, performing operation processing on the scene service data to obtain a processing result of the scene service data, including:
and performing operation processing on the scene service data by adopting a preprocessing conjugate gradient method to obtain a processing result of the scene service data.
In another aspect of the embodiments of the present application, a data processing apparatus for a chip circuit is provided, including: the device comprises a determining module, a transformation module, a matrix module and a result module;
the determining module is used for determining a target operation matrix of the target operation chip in the scene service data, wherein the target operation matrix is a Laplace matrix, and the scene service data comprises: the method comprises the following steps of (1) obtaining a target operation matrix, a plurality of scene parameter matrices and an acceleration matrix to be determined;
the transformation module is used for carrying out matrix transformation on the target operation matrix to obtain a transformed matrix meeting the regular condition;
the matrix module is used for determining accelerator information according to the transformed matrix and obtaining an acceleration matrix in the scene service data based on the accelerator information;
and the result module is used for carrying out operation processing on the scene service data to obtain a processing result of the scene service data.
Optionally, the transformation module is specifically configured to determine a feature value of the target operation matrix; and performing matrix transformation on the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, the transformation module is specifically configured to determine a maximum eigenvalue and a minimum eigenvalue of the target operation matrix respectively according to the laplacian spectral characteristic of the target operation matrix; and carrying out matrix change on the target operation matrix based on the maximum characteristic value and the minimum characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, the matrix module is specifically configured to determine accelerator information based on the chebyshev polynomial to be used and the transformed matrix; and taking the accelerator information as an acceleration matrix in the scene service data.
Optionally, the transformation module is further configured to determine parameter information in the chebyshev polynomial to be used.
Optionally, the determining module is specifically configured to obtain a circuit equation set of the target operation chip in a service scene corresponding to the scene service data; and carrying out regularization processing on the circuit equation set to obtain a target operation matrix of the target operation chip in the scene service data.
Optionally, the result module is specifically configured to perform operation processing on the scene service data by using a preprocessing conjugate gradient method to obtain a processing result of the scene service data.
In another aspect of the embodiments of the present application, there is provided a computer device, including: the data processing method comprises the steps of a memory and a processor, wherein a computer program capable of running on the processor is stored in the memory, and when the processor executes the computer program, the data processing method of the chip circuit is realized.
In another aspect of the embodiments of the present application, a computer-readable storage medium is provided, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the data processing method of the chip circuit.
The beneficial effects of the embodiment of the application include:
in the data processing method, the device, the equipment and the storage medium of the chip circuit, a target operation matrix of a target operation chip in scene service data can be determined, the target operation matrix is subjected to matrix transformation, a transformed matrix meeting a regular condition is obtained, accelerator information can be determined according to the transformed matrix, an acceleration matrix in the scene service data is obtained based on the accelerator information, and finally the scene service data can be subjected to operation processing to obtain a processing result of the scene service data. The target operation matrix is a laplacian matrix, and the scene service data may include: the target operation matrix, the plurality of scene parameter matrices and the acceleration matrix can be obtained through the process of transforming the target operation matrix, and then corresponding calculation processing can be carried out on the basis of the acceleration matrix, the target operation matrix and the plurality of scene parameter matrices to obtain corresponding results.
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In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic flowchart of a data processing method of a chip circuit according to an embodiment of the present disclosure;
fig. 2 is another schematic flow chart of a data processing method of a chip circuit according to an embodiment of the present disclosure;
fig. 3 is another schematic flowchart of a data processing method of a chip circuit according to an embodiment of the present disclosure;
fig. 4 is another schematic flow chart of a data processing method of a chip circuit according to an embodiment of the present disclosure;
fig. 5 is another schematic flow chart of a data processing method of a chip circuit according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of a data processing apparatus of a chip circuit according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of a computer device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined or explained in subsequent figures.
In the description of the present application, it should be noted that the terms "first", "second", "third", etc. are used only for distinguishing the description, and are not intended to indicate or imply relative importance.
For the sake of clearer explanation of the present embodiment, the preconditioned accelerated conjugate gradient method referred to in the present embodiment is specifically explained as follows:
the preprocessing conjugate gradient method is mainly used for solving a large sparse equation set. In the ordinary conjugate gradient method, for the symmetric over-positive definite equation, an accurate solution can be obtained as long as the iteration step number reaches the order number of the equation, but actually, when the condition number (the ratio of the maximum to the minimum eigenvalues) of the coefficient matrix is large, the convergence speed of the ordinary conjugate gradient method is slow. And preprocessing the coefficient matrix by adopting a preprocessing conjugate gradient method to accelerate the iterative convergence speed, thereby completing the corresponding simulation process and obtaining the corresponding simulation result.
However, when only the method is used to solve data to obtain a simulation result, the amount of data to be simulated is too large, which may also result in a slow solving process and thus low simulation efficiency.
Fig. 1 is a schematic flowchart of a data processing method of a chip circuit according to an embodiment of the present application, and referring to fig. 1, the data processing method of the chip circuit includes:
s110: and determining a target operation matrix of the target operation chip in the scene service data.
Wherein, the target operation matrix is a Laplace matrix, and the scene service data comprises: the method comprises a target operation matrix, a plurality of scene parameter matrices and an acceleration matrix to be determined.
Optionally, the main body of the method may be any computer device, and specifically may be a relevant computing unit in the computer device, for example: a device having a processing function, a device having a calculation function, and the like, and the above-described target arithmetic chip may be provided in the calculation unit without being particularly limited thereto.
It should be noted that the scene service data may be data required when the target computing chip executes the service corresponding to the scene, for example: if the target computing chip is a vehicle-mounted chip, the scene service data may be related data required when the service is executed, for example: the power supply of the vehicle, the power of the vehicle, and the like, are not particularly limited herein, but merely as one example thereof.
The required scene service data may also be different for different application scenes, and these scene service data may all be stored in the form of a numerical value or a matrix, and the required scene service data may include a plurality of types.
The target operation matrix, the plurality of scene parameter matrices and the acceleration matrix to be determined can be used as the content in the scene service data. The target operation matrix may be a laplacian matrix obtained by a circuit equation set, and multiple scene parameter matrices may exist in different forms according to different actual parameters, for example: a column matrix, an identity matrix, etc., and is not particularly limited herein, and the acceleration matrix may be a matrix that plays a role in accelerating the operation during the operation, and may be determined by calculation.
The target operation matrix can be obtained according to a circuit equation set in a chip circuit of the target operation chip.
S120: and carrying out matrix transformation on the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, after the target operation matrix is obtained, matrix transformation may be performed on the target operation matrix, specifically, correlation transformation may be performed on the size of the matrix, or on coefficients, and the transformation manner may be specifically transformed based on a regular condition.
After the transformation, a transformed matrix satisfying the regularization condition can be obtained.
Specifically, the target operation matrix may be transformed according to the eigenvalue of the target operation matrix.
S130: and determining accelerator information according to the transformed matrix, and obtaining an acceleration matrix in the scene service data based on the accelerator information.
Optionally, after the transformed matrix is obtained, the accelerator information may be calculated based on a pre-configured calculation manner, where the accelerator information may be a matrix, and the matrix corresponding to the accelerator information may be used to represent an acceleration matrix in the scene service data.
For example: the transformed matrix may be substituted into an accelerator information calculation formula and the formula may be solved to obtain accelerator information.
S140: and performing operation processing on the scene service data to obtain a processing result of the scene service data.
Optionally, after the accelerator information is obtained, if all matrices in the scene service data are determined matrices, the processing result of the scene service data may be obtained by performing operation processing based on the target operation matrix, the plurality of scene parameter matrices, and the determined acceleration matrices.
Specifically, the arithmetic processing may be implemented by using the preconditioned accelerated conjugate gradient method, and when performing matrix calculation using this method, the acceleration matrix used is the acceleration matrix obtained in S110 to S130.
That is, a preprocessing conjugate gradient method may be adopted to perform operation processing on the scene service data to obtain a processing result of the scene service data.
In the data processing method of the chip circuit provided by the embodiment of the application, a target operation matrix of a target operation chip in scene service data can be determined, then the target operation matrix is subjected to matrix transformation to obtain a transformed matrix meeting a regular condition, accelerator information can be determined according to the transformed matrix, an acceleration matrix in the scene service data can be obtained based on the accelerator information, and finally the scene service data can be subjected to operation processing to obtain a processing result of the scene service data. The target operation matrix is a laplacian matrix, and the scene service data may include: the target operation matrix, the plurality of scene parameter matrices and the acceleration matrix can be obtained through the process of transforming the target operation matrix, and then corresponding calculation processing can be carried out on the basis of the acceleration matrix, the target operation matrix and the plurality of scene parameter matrices to obtain corresponding results.
Another specific implementation procedure in the data processing method of the chip circuit provided in the embodiment of the present application is specifically explained below.
Fig. 2 is another schematic flow chart of a data processing method of a chip circuit according to an embodiment of the present application, and please refer to fig. 2, where matrix transformation is performed on a target operation matrix to obtain a transformed matrix meeting a regular condition, where the method includes:
s210: and determining the characteristic value of the target operation matrix.
Optionally, the target operation matrix may specifically be a laplacian matrix, and the eigenvalue of the target operation matrix may be determined according to a laplacian spectrum characteristic.
The sum of each row/column of the laplacian matrix is 0, the laplacian spectral characteristics can be determined based on the rule, and further the eigenvalue of the target operation matrix can be determined based on the laplacian spectral characteristics.
S220: and performing matrix transformation on the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, after obtaining the eigenvalue of the target operation matrix, matrix transformation may be performed on the target operation matrix based on the eigenvalue of the target operation matrix to obtain a transformed matrix that satisfies the regular condition.
Specifically, the matrix after matrix transformation may be obtained based on the eigenvalue of the target operation matrix and the circuit equation set.
In the data processing method of the chip circuit provided in the embodiment of the present application, the eigenvalue of the target operation matrix may be determined, and the target operation matrix may be subjected to matrix transformation based on the eigenvalue of the target operation matrix, so as to obtain a transformed matrix that satisfies a regular condition. The matrix change is performed through the characteristic value of the matrix, so that the transformed matrix meeting the regular condition can be obtained more accurately.
The following specifically explains a specific implementation process of determining a transformed matrix in the data processing method of a chip circuit provided in the embodiment of the present application.
Fig. 3 is another schematic flow chart of a data processing method of a chip circuit according to an embodiment of the present application, please refer to fig. 3, where determining a feature value of a target operation matrix includes:
s310: and respectively determining the maximum eigenvalue and the minimum eigenvalue of the target operation matrix according to the Laplace spectrum characteristic of the target operation matrix.
Optionally, the minimum eigenvalue of the laplacian matrix is close to 0, and the maximum eigenvalue of the laplacian matrix is close to 2, which can be obtained according to the laplacian spectral characteristics of the target operation matrix.
The maximum eigenvalue of the target operation matrix can be determined to be 2 and the minimum eigenvalue to be 0.
The method for carrying out matrix change on the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting a regular condition comprises the following steps:
s320: and carrying out matrix change on the target operation matrix based on the maximum characteristic value and the minimum characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
The specific calculation formula of the transformed matrix is as follows:
Figure M_221206171856216_216907001
wherein Z is a transformed matrix satisfying the regular condition,
Figure M_221206171856341_341945001
in order to be the maximum of the eigenvalues,
Figure M_221206171856373_373158002
b is a target operation matrix, and I is an identity matrix.
The circuit equation set A is regularized to obtain a target operation matrix, and the target operation matrix B is expressed as
Figure M_221206171856406_406345001
(ii) a Wherein D is a diagonal matrix corresponding to the circuit equation set a, the calculation formula may be obtained by calculation:
Figure M_221206171856453_453239001
the Z matrix obtained by the above calculation is a transformed matrix satisfying the regularization condition.
In the data processing method of the chip circuit provided in the embodiment of the present application, the maximum eigenvalue and the minimum eigenvalue of the target operation matrix can be respectively determined according to the laplacian spectrum characteristic of the target operation matrix; and carrying out matrix change on the target operation matrix based on the maximum characteristic value and the minimum characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition. The matrix change is carried out through the maximum eigenvalue and the minimum eigenvalue, and the transformed matrix meeting the regular condition can be obtained more accurately.
The following specifically explains a specific implementation procedure for determining the acceleration matrix in the data processing method of the chip circuit provided in the embodiment of the present application.
Fig. 4 is another schematic flow chart of a data processing method of a chip circuit according to an embodiment of the present application, please refer to fig. 4, where determining accelerator information according to a transformed matrix and obtaining an acceleration matrix in scene service data based on the accelerator information includes:
s410: accelerator information is determined based on the chebyshev polynomial to be used and the transformed matrix.
The chebyshev polynomial to be used is specifically defined as follows:
Figure M_221206171856531_531341001
wherein, M is an accelerator,
Figure M_221206171856594_594870001
Figure M_221206171856610_610939002
Figure M_221206171856642_642183003
in order to set the coefficients to a predetermined value,
Figure M_221206171856673_673430004
is composed ofkThe order Chebyshev general term formula, r is the number of Chebyshev polynomials used by the accelerator.
The circuit equation set A can be normalized to obtain Z substituted Chebyshev polynomials.
Wherein, the chebyshev formula can be specifically expressed as:
Figure M_221206171856704_704718001
Figure M_221206171856735_735973001
Figure M_221206171856767_767204001
the accelerator information can be obtained by substituting the transformed matrix into the above formula.
S420: and taking the accelerator information as an acceleration matrix in the scene service data.
Optionally, the accelerator information obtained by final calculation may be represented in the form of a matrix, and then the matrix may be used as an acceleration matrix in the scene traffic data.
The following specifically explains a specific implementation procedure of determining the regularization condition of the matrix change in the data processing method of the chip circuit provided in the embodiment of the present application.
In the data processing method of the chip circuit provided in the embodiment of the present application, accelerator information may be determined based on a chebyshev polynomial to be used and a transformed matrix; and taking the accelerator information as an acceleration matrix in the scene service data. The acceleration matrix is determined by introducing a Chebyshev polynomial method, so that the acceleration matrix which meets the actual requirement can be obtained.
Optionally, before performing matrix transformation on the target operation matrix to obtain a transformed matrix satisfying the regularization condition, the method further includes: parameter information in the chebyshev polynomial to be used is determined.
Optionally, the chebyshev polynomial to be used is specifically as follows:
Figure M_221206171856833_833597001
due to therein
Figure M_221206171856864_864853001
For the preset coefficients, that is, the values of the preset coefficients in different chebyshev polynomials may be different, the chebyshev polynomials used in the embodiment of the present application may be pre-configured according to the actual circuit environment, for example: can be provided with
Figure M_221206171856896_896109002
Specifically, the value is taken according to the following formula:
Figure M_221206171856911_911740001
the r value may be set correspondingly according to an actual requirement, for example, 5 may be taken, or other use values may also be selected according to the actual requirement, which is not limited specifically herein.
The following specifically explains a specific implementation process for determining a target operation matrix in the data processing method of the chip circuit provided in the embodiment of the present application.
Fig. 5 is another schematic flow chart of the data processing method of the chip circuit provided in the embodiment of the present application, please refer to fig. 5, in which determining a target operation matrix of a target operation chip in scene service data includes:
s610: and acquiring a circuit equation set of the target operation chip in a service scene corresponding to the scene service data.
It should be noted that the circuit equation set of the target operation chip in the service scene corresponding to the scene service data is the circuit equation set a, and the circuit equation set may be obtained in the process of performing the operation by the target operation chip.
S620: and performing regularization processing on the circuit equation set to obtain a target operation matrix of the target operation chip in the scene service data.
Optionally, the target operation matrix of the target operation chip in the scene service data may be obtained after the circuit equation set is regularized.
The method specifically comprises the following steps:
Figure M_221206171856958_958591001
wherein D is a diagonal matrix corresponding to the circuit equation set a.
The following describes apparatuses, devices, and storage media for executing the data processing method of the chip circuit provided in the present application, and specific implementation processes and technical effects thereof are referred to above, and will not be described again below.
Fig. 6 is a schematic structural diagram of a data processing device of a chip circuit according to an embodiment of the present application, and referring to fig. 6, the data processing device of the chip circuit includes: a determination module 710, a transformation module 720, a matrix module 730, and a results module 740;
a determining module 710, configured to determine a target operation matrix of the target operation chip in the scene service data, where the target operation matrix is a laplacian matrix, and the scene service data includes: the method comprises the following steps of (1) obtaining a target operation matrix, a plurality of scene parameter matrices and an acceleration matrix to be determined;
the transformation module 720 is configured to perform matrix transformation on the target operation matrix to obtain a transformed matrix satisfying a regular condition;
the matrix module 730 is configured to determine accelerator information according to the transformed matrix, and obtain an acceleration matrix in the scene service data based on the accelerator information;
the result module 740 is configured to perform operation processing on the scene service data to obtain a processing result of the scene service data.
Optionally, the transformation module 720 is specifically configured to determine a feature value of the target operation matrix; and performing matrix transformation on the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, the transformation module 720 is specifically configured to determine a maximum eigenvalue and a minimum eigenvalue of the target operation matrix respectively according to the laplacian spectrum characteristic of the target operation matrix; and carrying out matrix change on the target operation matrix based on the maximum characteristic value and the minimum characteristic value of the target operation matrix to obtain a transformed matrix meeting the regular condition.
Optionally, the matrix module 730 is specifically configured to determine accelerator information based on the chebyshev polynomial to be used and the transformed matrix; and taking the accelerator information as an acceleration matrix in the scene service data.
Optionally, a transformation module 720, further configured to determine a chebyshev polynomial to be used; the regularization condition for the matrix change is determined based on the chebyshev polynomial to be used.
Optionally, the determining module 710 is specifically configured to obtain a circuit equation set of the target computing chip in a service scenario corresponding to the scenario service data; and carrying out regularization processing on the circuit equation set to obtain a target operation matrix of the target operation chip in the scene service data.
Optionally, the result module 740 is specifically configured to perform operation processing on the scene service data by using a preprocessing conjugate gradient method to obtain a processing result of the scene service data.
In the data processing apparatus of a chip circuit provided in the embodiment of the present application, a target operation matrix of a target operation chip in scene service data may be determined, and then the target operation matrix may be subjected to matrix transformation to obtain a transformed matrix satisfying a regular condition, accelerator information may be determined according to the transformed matrix, an acceleration matrix in the scene service data may be obtained based on the accelerator information, and finally, operation processing may be performed on the scene service data to obtain a processing result of the scene service data. The target operation matrix is a laplacian matrix, and the scene service data may include: the target operation matrix, the plurality of scene parameter matrices and the acceleration matrix can be obtained through the process of transforming the target operation matrix, and then corresponding calculation processing can be carried out on the basis of the acceleration matrix, the target operation matrix and the plurality of scene parameter matrices to obtain corresponding results.
The above-mentioned apparatus is used for executing the method provided by the foregoing embodiment, and the implementation principle and technical effect are similar, which are not described herein again.
These above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more Application Specific Integrated Circuits (ASICs), or one or more microprocessors, or one or more Field Programmable Gate Arrays (FPGAs), etc. For another example, when one of the above modules is implemented in the form of a Processing element scheduler code, the Processing element may be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).
Fig. 7 is a schematic structural diagram of a computer device according to an embodiment of the present application, and referring to fig. 7, the computer device includes: the memory 810 and the processor 820, wherein the memory 810 stores a computer program capable of running on the processor 820, and the processor 820 realizes the steps of the data processing method of the chip circuit when executing the computer program.
In another aspect of the embodiments of the present application, a computer-readable storage medium is further provided, where the storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements the steps of the data processing method of the chip circuit.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is only a logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute some steps of the methods according to the embodiments of the present invention. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall cover the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A method for processing data in a chip circuit, comprising:
determining a target operation matrix of a target operation chip in scene service data, wherein the target operation matrix is a Laplace matrix, and the scene service data comprises: the target operation matrix, a plurality of scene parameter matrices and an acceleration matrix to be determined;
performing matrix transformation on the target operation matrix to obtain a transformed matrix meeting a regular condition;
determining accelerator information according to the transformed matrix, and obtaining an acceleration matrix in the scene service data based on the accelerator information;
and carrying out operation processing on the scene service data to obtain a processing result of the scene service data.
2. The data processing method of a chip circuit according to claim 1, wherein the performing matrix transformation on the target operation matrix to obtain a transformed matrix satisfying a regularization condition comprises:
determining a characteristic value of the target operation matrix;
and performing matrix transformation on the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting a regular condition.
3. The data processing method of a chip circuit according to claim 2, wherein the determining the eigenvalue of the target operational matrix comprises:
respectively determining the ranges of the maximum eigenvalue and the minimum eigenvalue of the target operation matrix according to the Laplace spectrum characteristic of the target operation matrix;
the matrix change of the target operation matrix based on the characteristic value of the target operation matrix to obtain a transformed matrix meeting a regular condition comprises the following steps:
and carrying out matrix change on the target operation matrix based on the maximum characteristic value and the minimum characteristic value of the target operation matrix to obtain a transformed matrix meeting a regular condition.
4. The data processing method of the chip circuit according to claim 1, wherein the determining accelerator information according to the transformed matrix and obtaining an acceleration matrix in the scene traffic data based on the accelerator information comprises:
determining accelerator information based on a Chebyshev polynomial to be used and the transformed matrix;
and taking the accelerator information as an acceleration matrix in the scene service data.
5. The data processing method of a chip circuit according to claim 4, wherein before performing matrix transformation on the target operation matrix to obtain a transformed matrix satisfying a regularization condition, the method further comprises:
parameter information in the chebyshev polynomial to be used is determined.
6. The data processing method of the chip circuit according to claim 1, wherein the determining the target operation matrix of the target operation chip in the scene service data comprises:
acquiring a circuit equation set of the target operation chip in a service scene corresponding to the scene service data;
and carrying out regularization processing on the circuit equation set to obtain a target operation matrix of the target operation chip in the scene service data.
7. The data processing method of the chip circuit according to any one of claims 1 to 6, wherein the performing operation processing on the scene service data to obtain the processing result of the scene service data includes:
and performing operation processing on the scene service data by adopting a preprocessing conjugate gradient method to obtain a processing result of the scene service data.
8. A data processing apparatus of a chip circuit, comprising: the device comprises a determining module, a transformation module, a matrix module and a result module;
the determining module is configured to determine a target operation matrix of a target operation chip in scene service data, where the target operation matrix is a laplacian matrix, and the scene service data includes: the target operation matrix, a plurality of scene parameter matrices and an acceleration matrix to be determined;
the transformation module is used for carrying out matrix transformation on the target operation matrix to obtain a transformed matrix meeting a regular condition;
the matrix module is used for determining accelerator information according to the transformed matrix and obtaining an acceleration matrix in the scene service data based on the accelerator information;
and the result module is used for carrying out operation processing on the scene service data to obtain a processing result of the scene service data.
9. A computer device, comprising: memory in which a computer program is stored which is executable on the processor, a processor which, when executing the computer program, carries out the steps of the method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that the storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 7.
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