CN112834906B - Test method for automatic matching - Google Patents
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- CN112834906B CN112834906B CN202011635227.5A CN202011635227A CN112834906B CN 112834906 B CN112834906 B CN 112834906B CN 202011635227 A CN202011635227 A CN 202011635227A CN 112834906 B CN112834906 B CN 112834906B
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- 238000010998 test method Methods 0.000 title claims abstract description 18
- 238000012360 testing method Methods 0.000 claims abstract description 134
- 238000000034 method Methods 0.000 claims abstract description 34
- 238000012545 processing Methods 0.000 claims abstract description 25
- 235000012431 wafers Nutrition 0.000 claims abstract description 15
- 230000010354 integration Effects 0.000 claims description 48
- 230000002159 abnormal effect Effects 0.000 claims description 14
- 230000003247 decreasing effect Effects 0.000 claims description 6
- 238000005070 sampling Methods 0.000 claims description 5
- 238000004364 calculation method Methods 0.000 claims description 4
- 238000000605 extraction Methods 0.000 claims description 3
- 238000012935 Averaging Methods 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000004458 analytical method Methods 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000012827 research and development Methods 0.000 abstract description 2
- WWYNJERNGUHSAO-XUDSTZEESA-N (+)-Norgestrel Chemical compound O=C1CC[C@@H]2[C@H]3CC[C@](CC)([C@](CC4)(O)C#C)[C@@H]4[C@@H]3CCC2=C1 WWYNJERNGUHSAO-XUDSTZEESA-N 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000013100 final test Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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Abstract
The invention provides a test method for automatic matching, which comprises the following steps: s1, acquiring information of all wafers to be tested and a first test plan; s2, selecting a preset number of wafers for testing, and obtaining first test data; s3, reading the first test data, the reference file of the product and the template test specification file of the product as input of automatic matching processing, and performing automatic matching processing to generate a second test plan; and S4, selecting all wafers to be tested for testing, and obtaining second test data. The method realizes the compensation of test data of the test equipment, ensures that the customers automatically match when using the test equipment of different manufacturers, realizes the processing and analysis of the data, is convenient for the use of products of the customers, and is beneficial to reducing the production and research and development costs of the customers.
Description
Technical Field
The invention belongs to the technical field of semiconductor device testing, and particularly relates to a testing method for automatic matching.
Background
The integrated circuit testing link is an important method capable of ensuring that the integrated circuit meets the parameter requirements of required performance, quality and the like, is an indispensable component in the aspects of design, production, manufacture and application of the whole integrated circuit product, and becomes one of key technologies for guaranteeing the high reliability of the integrated circuit product.
At present, the integrated circuit industry test equipment has no related national standard, national standard and industry standard, and test equipment manufacturers all adopt own standards to calibrate and test the equipment, so that when different test equipment is used by production and design manufacturers, certain deviation exists in tested data, and users can only process and analyze the test data of the same equipment in the use process and cannot process and analyze the test data of different test equipment. In order to facilitate the use of the customers of the test equipment, the data tested by the equipment needs to be searched for by a method for compensating, so that the test data is consistent with the test data of the existing test equipment of the customers, the test utilization rate of the equipment is improved, and the operation experience of the users is optimized.
Disclosure of Invention
The invention is based on the problems of the prior art, and aims to provide a test method for automatic matching, which compensates the data tested by the equipment and enables the test data to be consistent with the test data of the existing test equipment of the client.
The invention provides a test method for automatic matching, which comprises the following steps: s1, acquiring information of all wafers to be tested and a first test plan for testing; s2, selecting a preset number of wafers for testing, and obtaining first test data; s3, reading the first test data, the reference file of the product and the template test specification file of the product as input of automatic matching processing, and performing automatic matching processing to generate a second test plan; and S4, selecting the wafer to be tested to test according to the second test plan, and obtaining second test data.
In one possible embodiment, the reference file includes test items, and the mean and standard deviation of the test items, for automatically matching the first test data to the comparison judgment in the process.
In a specific embodiment, the process of performing the automatic matching process in step S3 includes: firstly, first test data are read, and abnormal points are deleted according to preset requirements. The abnormal points refer to unimportant abnormal points in the test process, and the abnormal points are deleted to prevent the analysis result from being influenced. And then, according to the name feature extraction of the output item, classifying the first test data according to the data types, respectively processing the first test data to obtain the optimal conditions of various data types, and substituting the optimal conditions into a template test rule file of the product. The data type is divided into two parts of small current data and capacitance data. The optimal conditions include an optimal integration time, an optimal stability factor, and an offset value.
The processing process of the small current data comprises the following steps: calculating the average value of the small current data on the test item under the condition of different stability coefficients, and judging whether the average value is smaller than a set value; fitting small current data of a test item with short integration time in a stable coefficient range to obtain a change rate, and fitting data according to the change rate to obtain an optimal stable coefficient and an offset value; and calculating standard deviation under different integration time conditions by using the optimal stability coefficient, and judging whether the ratio of the standard deviation of the test data to the standard deviation of the reference file is smaller than a set value or not so as to judge the optimal integration time.
In a specific preferred embodiment, the method for calculating the optimal condition in the fitting process of the small current data includes: when the change rates of all the offset values are smaller than the set value, all the points are subjected to straight line fitting, so that the optimal integration time and the offset value are obtained; when not all the change rates of the offset values are smaller than the set value, if the absolute value of the slope of the fitted function is a decreasing function, calculating to obtain a fitting value of the stable point, so as to obtain the optimal integration time and the offset value; if the absolute value of the slope of the fitted function is not a decreasing function, a preset value a is set in the small current data, the data after a is directly used for straight line fitting, and the optimal integration time and the offset value are obtained through calculation. The value of the preset value a is set correspondingly according to different process conditions and application scenes.
In addition, in a preferred embodiment, the method for determining the appropriate stability factor by using the ratio of the standard deviation of the small current data to the standard deviation of the reference file during the processing of the small current data includes: when the ratio of the standard deviation of the small current data to the standard deviation of the reference file is smaller than a set value, directly selecting the current integration time as the optimal integration time; when the ratio of the standard deviation of the small current data to the standard deviation of the reference file is not smaller than a set value, if the function of the standard deviation of the small current data and the integration time has monotonicity, determining a proper stability coefficient according to the monotonicity, namely selecting the next point closest to the set value as the optimal integration time; if the function of the standard deviation and the integration time of the small current data does not have monotonicity, if the curve of the standard deviation and the integration time of the test data has a stable state, the minimum value in the stable state is taken as the optimal integration time, and if the curve has no stable state, the maximum value of the integration time is taken as the optimal integration time.
The processing process of the capacitance data comprises the following steps: the capacitance data are subjected to mean value and standard deviation under the condition of different stability coefficients for each test item; and determining the optimal stability coefficient according to the monotonicity of the stability coefficient and the standard deviation function, and determining the offset value under the optimal stability coefficient, namely solving the offset value under the optimal stability coefficient condition.
In one preferred embodiment, the method of determining the offset value for the optimal stability factor includes determining a value for the stability factor based on monotonicity, and taking the maximum of all stability factor values if the value is not found.
In another preferred embodiment, when the offset value under the optimal stability factor is determined to be 0, the stability factor is filled in the template test specification file of the product, so as to obtain the second test plan.
In yet another possible embodiment, the offset value in the capacitance data under the stable condition is written into the second test plan after compensating the error.
In an advantageous embodiment, the method for deleting abnormal points according to preset requirements adopts the 3 sigma principle, and specifically comprises the following steps: calculating a standard deviation; if the value of a sampling point is larger than the sum of the mean value (mean value) plus 3 times the standard deviation (std value) or smaller than the difference of the mean value (mean value) minus 3 times the standard deviation (std value), the value of the sampling point is deleted as an abnormal point.
In another advantageous embodiment, when more than two test items are contained, more than two first test data are generated in step S2; and in the step S3, the first test data of different test items are independently and automatically matched with data to obtain more than two optimal conditions, and the maximum value in all the optimal conditions is substituted into a template test rule file of the product to generate the second test plan.
The invention has the following beneficial effects: according to the test method for automatic matching, the second test plan is generated by automatic matching processing, the second test data is obtained, the compensation of the test data of the test equipment is realized, the data can be processed and analyzed by a customer when the test equipment of different factories is used, the product use of the customer is convenient, and the production and research and development costs of the customer are reduced.
Drawings
FIG. 1 is a schematic diagram of steps of a test method for performing automatic matching according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a small current data and capacitance data processing process in an embodiment of the invention.
Detailed Description
The foregoing and/or additional aspects and advantages of the present invention will be apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings. The operations of the embodiments are depicted in the following examples in a particular order to provide a better understanding of the details of the embodiments and to provide a thorough understanding of the present invention, however, the description of these orders does not necessarily correspond one-to-one to a testing method for automated matching of the present invention, nor should it be used to limit the scope of the present invention.
It should be noted that the flowcharts and block diagrams in the figures illustrate the operational processes that may be implemented by the methods according to the embodiments of the present invention. It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the intervening blocks, depending upon the objectives sought to be achieved by the steps involved.
As shown in fig. 1, the method for testing automatic matching according to the embodiment of the present invention includes step s1, obtaining information of all wafers to be tested, and a first test plan for testing. S2, selecting a preset number of wafers to test, and obtaining first test data. And S3, reading the first test data, the reference file of the product and the template test specification file of the product as input of automatic matching processing, and performing automatic matching processing to generate a second test plan, namely automatically producing the test plan which is needed to be used for the second test and is subjected to automatic matching after the automatic matching processing is finished. S4, selecting all the wafers to be tested to test according to the second test plan, and obtaining second test data, namely selecting all the wafers to be tested in the S1 to test; after the test is finished, final test data are generated.
In the description of the present embodiment, the first test plan is a test plan a, the second test plan is a test plan B, and the second test data is final test data. The specific steps of the automatic matching processing of the first test data are as follows.
And reading the first test data, deleting abnormal points according to the requirements of the clients, wherein the abnormal points are unimportant abnormal points in the test process, and the abnormal points need to be deleted to prevent the analysis result from being influenced.
The abnormal point removing step comprises the following steps: firstly, calculating standard deviation; and secondly, if the value of one sampling point is larger than the mean value (mean value) +3 times standard deviation (std value) or smaller than the mean value (mean value) -3 times standard deviation (std value), rejecting.
In this embodiment, the test data of the small current and the capacitor are automatically matched and mainly processed, and the first test data is divided into a small current data part and a capacitor data part according to the name feature extraction of the output item, and the small current data part and the capacitor data part are respectively processed.
As shown in fig. 2, the processing of the small current data portion in this embodiment includes: the small current data are averaged in different stability coefficients of the test item, and whether the average value is smaller than a set value is judged, wherein two conditions are as follows: and when the average value of the test data is not smaller than the set value, repeating the steps S1 to S3, retesting the wafer, and automatically matching the small-current data again until the optimal integration time, the offset value and the stability coefficient are determined.
When the average value of the small current data is smaller than a set value, fitting the small current data of the test item with short integration time in a stable coefficient range to calculate the change rate, and calculating the optimal stable coefficient and the offset value, wherein the calculation method of the optimal stable coefficient and the offset value mainly comprises two steps.
The first step comprises two cases, wherein when the change rate of all the offset values is smaller than a set value, all the points are subjected to straight line fitting to obtain the optimal integration time and the offset value; in another case, when not all the change rates of the offset values are smaller than the set value, if the absolute value of the slope of the fitted function is a decreasing function, calculating to obtain a fitting value of the stable point, so as to obtain the optimal integration time and the offset value; presetting a value a in test data, directly using data after a to perform straight line fitting if the absolute value of the slope of the fitted function is not a decreasing function, and calculating to obtain the optimal integration time and offset value; according to different process conditions and application scenes, the preset value a is different in value.
And a second step of judging whether the ratio of the standard deviation of the small current data to the standard deviation of the reference file is smaller than the set value, so as to judge the optimal stability factor, wherein the method of judging the optimal stability factor by using the ratio of the standard deviation of the small current data to the standard deviation of the reference file comprises two cases.
In the first case, when the ratio of the standard deviation of the small current data to the standard deviation of the reference file is smaller than the set value, the current integration time is directly selected as the optimal integration time. Secondly, when the ratio of the standard deviation of the small current data to the standard deviation of the reference file is not smaller than a set value, if the function of the standard deviation of the test data and the integration time has monotonicity, determining a proper stability coefficient according to the monotonicity, namely selecting the next point closest to the set value as the optimal integration time; if the function of the standard deviation and the integration time of the small current data does not have monotonicity, if the curve of the standard deviation and the integration time of the test data has a stable state, the minimum value in the stable state is taken as the optimal integration time, and if the curve has no stable state, the maximum value of the integration time is taken as the optimal integration time.
As shown in fig. 2, the processing of the capacitance data portion in this embodiment includes: the capacitance data is subjected to mean value and standard deviation on test items under different stability coefficient conditions, an optimal stability coefficient is determined according to monotonicity of the stability coefficient and a standard deviation function, and an offset value under the optimal stability coefficient is determined; if the monotonicity is not present, the maximum value of the stability coefficient is just taken as the optimal stability coefficient; and (3) obtaining an offset value under the condition of the stability coefficient, and when the offset value is 0, obtaining the optimal condition for obtaining the capacitance data part substituted into the test plan B by only filling the stability coefficient into the template test specification file of the product.
In this embodiment, before step S4, the optimal condition obtained by the small current data portion is substituted into a template test rule file of the product, and the optimal condition obtained by the capacitance data portion is substituted into the test rule file of the product after compensating the error, and then a new test plan B is generated; and S4, selecting all wafers to be tested to test according to a test plan B, and obtaining final test data.
The above embodiments are preferred examples of the present invention, and are not intended to limit the scope of the present invention. It should be understood that the details of these implementations are not to be taken as limiting the invention. Moreover, for the sake of simplicity of the drawing, some structures and components are shown in the drawing in a simplified schematic form, which is illustrative only and not limiting of the specific practical possibilities.
In addition, the descriptions of the "first," "second," and the like, herein are for descriptive purposes only and are not intended to be specifically construed as order or sequence, nor are they intended to limit the invention solely for distinguishing between components or operations described in the same technical term, but are not to be construed as indicating or implying any relative importance or order of such features.
The technical solutions between the embodiments may be combined with each other, but it is necessary to base the implementation on the basis of those skilled in the art that when the combination of technical solutions contradicts or cannot be implemented, it should be considered that the combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.
Claims (11)
1. A test method for automatic matching is characterized in that: comprising the following steps:
s1, acquiring information of all wafers to be tested and a first test plan for testing;
s2, selecting a preset number of wafers for testing, and obtaining first test data;
S3, reading the first test data, the reference file of the product and the template test specification file of the product as input of automatic matching processing, and performing automatic matching processing to generate a second test plan; classifying the first test data according to data types according to the name feature extraction of the output item, wherein the first test data is divided into two parts of small current data and capacitance data according to the data types; processing the small current data and the capacitance data respectively to obtain optimal conditions of various types of data, and substituting the optimal conditions into a template test rule file of the product;
The processing process of the small current data comprises the following steps: firstly, averaging the small current data pair test items under the condition of different stability coefficients, and judging whether the average value is smaller than a set value; secondly, fitting small current data of a test item with short integration time in a stable coefficient range to obtain a change rate, and fitting data according to the change rate to obtain an optimal stable coefficient and an offset value; thirdly, calculating standard deviation under different integration time conditions according to the optimal stability coefficient, and judging whether the ratio of the standard deviation of the calculated small current data to the standard deviation of the reference file is smaller than a set value or not so as to judge the optimal integration time;
the processing process of the capacitance data comprises the following steps: firstly, calculating the mean value and standard deviation of capacitance data for each test item under the condition of different stability coefficients; step two, determining an optimal stability coefficient according to the monotonicity of the stability coefficient and a standard deviation function, and determining an offset value under the optimal stability coefficient;
And S4, selecting the wafer to be tested to test according to the second test plan, and obtaining second test data.
2. A test method for automatic matching according to claim 1, wherein: the reference file of the product comprises test items, and the mean value and standard deviation of the test items, which are used for comparing and judging the first test data in the automatic matching process.
3. A test method for automatic matching according to claim 2, characterized in that: the process of performing the automatic matching processing in the step S3 includes: and reading the first test data, and deleting the abnormal point according to the preset requirement.
4. A test method for automatic matching according to claim 3, wherein: the process of performing the automatic matching processing in the step S3 includes: the optimal conditions include an optimal integration time, an optimal stability factor, and an offset value.
5. A test method for automatic matching according to claim 1, wherein: the calculation method of the optimal condition of the small current data in the fitting process comprises the following steps:
When the change rates of all the offset values are smaller than the set value, all the points are subjected to straight line fitting, so that the optimal integration time and the offset value are obtained;
When not all the change rates of the offset values are smaller than the set value, if the absolute value of the slope of the fitted function is a decreasing function, calculating to obtain a fitting value of the stable point, so as to obtain the optimal integration time and the offset value; if the absolute value of the slope of the fitted function is not a decreasing function, a preset value a is set in the small current data, the data after a is directly used for straight line fitting, and the optimal integration time and the offset value are obtained through calculation.
6. A test method for automatic matching according to claim 1, wherein: when the small current data is processed, the method for judging the optimal integration time by using the standard deviation ratio of the small current data to the standard deviation of the reference file comprises the following steps:
When the ratio of the standard deviation of the small current data to the standard deviation of the reference file is smaller than a set value, directly selecting the current integration time as the optimal integration time;
When the ratio of the standard deviation of the small current data to the standard deviation of the reference file is not smaller than a set value, if the function of the standard deviation of the small current data and the integration time has monotonicity, determining the optimal integration time according to the monotonicity, namely selecting the next point closest to the set value as the optimal integration time;
If the function of the standard deviation and the integration time of the small current data does not have monotonicity, if the curve of the standard deviation and the integration time of the small current data has a stable state, the minimum value in the stable state is taken as the optimal integration time, and if the curve has no stable state, the maximum value of the integration time is taken as the optimal integration time.
7. A test method for automatic matching according to claim 1, wherein: the method for determining the offset value under the optimal stability factor includes determining a value for the stability factor according to monotonicity, and taking the maximum value of all stability factor values if the value is not found.
8. A test method for automatic matching according to claim 1, wherein: and when the offset value under the optimal stability coefficient is 0, filling the stability coefficient in a template test specification file of the product to obtain the second test plan.
9. A test method for automatic matching according to claim 1, wherein: and writing the offset value under the stable condition in the capacitance data into the second test plan after compensating the error.
10. A method of testing for automatic matching according to any of claims 3-9, wherein: the method for deleting the abnormal points according to the preset requirement adopts a3 sigma principle and specifically comprises the following steps:
step one, calculating standard deviation;
and secondly, deleting the value of one sampling point as an abnormal point if the value of the sampling point is larger than the sum of the mean value and 3 times of standard deviation or smaller than the difference of the mean value minus 3 times of standard deviation.
11. A method of testing for automatic matching according to any of claims 2-9, wherein: when more than two test items are included, generating more than two first test data in step S2 of claim 1;
in the step S3 of claim 1, the optimal conditions obtained by performing automatic matching data processing on the first test data of different test items independently are more than two, and the maximum value of all the optimal conditions is substituted into the template test rule file of the product.
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