CN112397469A - 半导体组件及其制造方法 - Google Patents

半导体组件及其制造方法 Download PDF

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CN112397469A
CN112397469A CN202010716324.0A CN202010716324A CN112397469A CN 112397469 A CN112397469 A CN 112397469A CN 202010716324 A CN202010716324 A CN 202010716324A CN 112397469 A CN112397469 A CN 112397469A
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pad
etch stop
slot
stop structure
layer material
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曹博昭
黄裕华
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MediaTek Inc
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MediaTek Inc
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Abstract

本发明提供了一种半导体组件及其制造方法。半导体组件包括基板和焊盘。焊盘位于基板上并且具有上表面和狭槽，其中，狭槽相对于上表面向内凹进。本发明中在焊盘上包括狭槽，可以使得在焊接过程中容纳焊盘部分的变形和/或减小或释放焊盘的应力，可以缩小相邻两个焊盘之间的间距。

Description

半导体组件及其制造方法
技术领域
本发明涉及一种半导体组件(semiconductor component)及其制造方法，更具体地，涉及一种具有狭槽(slot)的半导体组件及其制造方法。
背景技术
传统的半导体组件包括多个焊盘。将焊线(solder wire)接合到焊盘上后，对焊盘施加力，会使得焊盘破裂或变形而接触到相邻的焊盘(导致电气短路)。
发明内容
有鉴于此，本发明提供了一种半导体组件及其制造方法，以解决上述现有技术的问题或缺点。
在本发明的一个实施例中，提供了一种半导体组件。半导体组件包括基板和焊盘。焊盘位于基板上并且具有上表面和狭槽，其中，狭槽相对于上表面向内凹进。
在本发明的另一个实施例中，提供了一种用于半导体组件的制造方法。该制造方法包括以下步骤：在基板上形成焊盘结构和蚀刻停止结构，其中蚀刻停止结构覆盖焊盘结构，其中焊盘结构包括焊盘部分和围绕焊盘部分的***部分；去除蚀刻停止结构的***部分，以形成蚀刻停止结构的保留部分，用于覆盖焊盘结构的焊盘部分，其中焊盘结构的***部分从保留部分暴露出；以及在焊盘结构的***部分上形成狭槽以形成焊盘，其中狭槽相对于焊盘的上表面向内凹进。
本发明中在焊盘上包括狭槽，可以使得在焊接过程中容纳焊盘部分的变形和/或减小或释放焊盘的应力，可以缩小相邻两个焊盘之间的间距。
当结合附图阅读以下对本发明实施例的详细描述时，本发明的许多目的、特征和优点将显而易见。然而，本文采用的附图是出于描述的目的，并且不应被视为限制。
附图说明
附图被包括进来以提供对本发明的进一步理解，附图被结合在本说明书中并构成本说明书的一部分。附图示出了本发明的实施例，并且与说明书一起用于解释本发明的原理。在附图中：
图1A示出了根据本发明实施例的半导体组件的示意图。
图1B示出了图1A的半导体组件的俯视图。
图1C示出了接合在图1A的半导体组件的焊盘上的焊线的示意图。
图2A至图2I示出了图1A的半导体组件的制造工艺。
具体实施方式
参照图1A至图1C，图1A示出了根据本发明实施例的半导体组件100的示意图，图1B示出了图1A的半导体组件100的俯视图，图1C示出了接合在图1A的半导体组件100的焊盘120上的焊线的示意图。在一个实施例中，半导体组件100可以例如是半导体基板、半导体芯片等。
半导体组件100包括基板110、至少一个焊盘120和钝化层130。
基板110包括基底(base)111、多个导电层112、多个电介质层(dielectric layer)113和多个导电通孔114。基底111例如是硅晶片(silicon wafer)。通过使用半导体工艺在基底111上形成导电层112、电介质层113和导电通孔114。相邻的两个导电层112通过一个电介质层113彼此分开，并且通过至少一个导电通孔114电连接。
如图1A所示，焊盘120可以是多层结构。例如，焊盘120包括焊盘层121和阻挡层(barrier layer)122。焊盘层121例如由铝、金、银、铜或其组合形成。阻挡层122例如由镍(Ni)、镍合金、氮化钛(TiN)或其组合形成。阻挡层122的至少一部分形成在最上面的电介质层113的开口113a内，焊盘层121形成在阻挡层122上。焊盘层121突出(project)在电介质层113的上表面113u之外。焊盘层121具有第一侧面121s，阻挡层122具有第二侧面122s，其中第一侧面121s和阻挡层122彼此对齐，例如，第一侧面121s和阻挡层122彼此齐平(flush)。
每个焊盘120具有上表面120u和狭槽(slot)120r，其中狭槽120r相对于上表面120u向内凹进(recess)并且朝向基板110延伸。焊盘120包括焊盘部分121A和***部分(periphery portion)121B，例如，焊盘120的焊盘层121包括焊盘部分121A和***部分121B，其中***部分121B围绕焊盘部分121A，并且狭槽120r形成在焊盘部分121A和***部分121B之间。
如图1C所示，焊线10接合在相应的焊盘120上。焊线10接合在焊盘120上之后，焊线10部分地形成在狭槽120r内，并且狭槽120r的至少一部分由焊线10填充。狭槽120r可以为焊盘部分121A的变形部分提供用于容纳焊盘部分121A的变形部分的空间。此外，在将焊线10接合在焊盘120上的过程期间，狭槽120r可以容纳(receive)焊盘部分121A的变形(由焊接工具施加在焊盘120上的压力导致)，因此，如此可以防止由于过度变形和/或钝化层130损坏而导致的焊盘破裂或者接触相邻焊盘。换句话说，狭槽120r可容纳焊盘部分121A的变形和/或减小或释放焊盘的应力。因此，相邻两个焊盘120之间的间距(pitch)可以缩小。在实施例中，与不具有狭槽121r的相邻两个焊盘之间的间距相比，相邻两个焊盘120之间的间距可缩小5％至15％。
如图1B所示，狭槽120r是环形(ring-shaped)狭槽，例如，闭合的(closed)环形狭槽或敞开的(open)环形狭槽。另外，狭槽120r以多边形、圆形、椭圆形等延伸。狭槽120r的宽度W1在0.1微米(mm)至2.0mm之间，例如0.1mm。然而，这种示例并不意味着对本发明的限制。
如图1C所示，狭槽120r位于焊盘部分121A和***部分121B之间。焊盘部121A被构造为承接(carry)焊线10。当焊接工具向焊盘120施加力时，焊盘部分121A向外变形，并且狭槽120r可以容纳变形的焊盘部分121A。因此，即使焊盘120变形，变形的焊盘120也不会接触相邻的焊盘或相邻的电子组件。
如图1A所示，钝化层130具有至少一个开口130a。开口130a的第一内侧壁(innersidewall)130w与狭槽120r的第二内侧壁120w对齐，例如，开口130a的第一内侧壁130w与狭槽120r的第二内侧壁120w齐平。
图2A至图2I示出了图1A的半导体组件100的制造工艺。
如图2A所示，通过使用沉积技术(deposition technology)形成覆盖基板110的阻挡层材料122”。可用的技术包括但不限于物理气相沉积(physical vapor deposition，PVD)、化学气相沉积(chemical vapor deposition，CVD)、电化学沉积(electrochemicaldeposition，ECD)、分子束外延(molecular beam epitaxy，MBE)以及近来的原子层沉积(atomic layer deposition，ALD)等。然后，通过使用后端(back end of line，BEOL)技术形成覆盖阻挡层材料122”的第一焊盘层材料121”。然后，通过沉积技术形成覆盖第一焊盘层材料121”的蚀刻停止结构(etching stop structure)材料20'。可用的技术包括但不限于物理气相沉积、化学气相沉积、电化学沉积、分子束外延以及近来的原子层沉积等。
然后，如图2A中所示，通过使用沉积技术形成覆盖一部分蚀刻停止结构材料20'的第一图案化光刻胶(first patterned photoresist)PR1。可用的技术包括但不限于物理气相沉积、化学气相沉积、电化学沉积、分子束外延以及近来的原子层沉积等。第一图案化光刻胶PR1限定了保留部分(retained portion)PR12以及连接到保留部分PR12并围绕保留部分PR12的***部分PR11。第一图案化光刻胶PR1位于最上层电介质层113的开口113a的正上方。
接着，如图2B中所示，通过第一图案化光刻胶PR1，去除蚀刻停止结构材料20'的一部分，形成蚀刻停止结构20。例如，去除蚀刻停止结构材料20'的未被第一图案化光刻胶PR1覆盖的部分，以形成蚀刻停止结构20。
如图2B所示，使用蚀刻技术通过第一图案化光刻胶PR1去除第一焊盘层材料121”的一部分，以形成焊盘结构120'的第二焊盘层材料121'。焊盘结构120'还包括阻挡层材料122”。在本实施例中，阻挡层材料122”可以作为蚀刻停止层，因此对第一焊盘层材料121”(如图2A所示)的蚀刻可以在阻挡层材料122”处停止。如图2B所示，第二焊盘层材料121'包括焊盘部分121A'以及连接到焊盘部分121A'并围绕焊盘部分121A'的***部分121B'。
在本实施例中，通过同一第一图案化光刻胶PR1在同一蚀刻工艺中形成蚀刻停止结构20和焊盘结构120'。
如图2C所示，使用蚀刻工艺去除第一图案化光刻胶PR1的***部分PR11，以暴露蚀刻停止结构20的***部分21。在蚀刻工艺中，覆盖蚀刻停止结构20的保留部分22的第一图案化光刻胶PR1的保留部分PR12被保留。
如图2D所示，利用蚀刻工艺通过第一图案化光刻胶PR1的保留部分PR12，去除蚀刻停止结构20的***部分21，以暴露第二焊盘层材料121'的***部分121B'，并且保留覆盖焊盘部分121A'的保留部分22。
在图2D中，通过使用蚀刻工艺去除阻挡层材料122”的去除部分1221”以暴露电介质层113，并且保留覆盖电介质层113的阻挡层材料122”的阻挡层122。
在一个实施例中，在同一蚀刻工艺中(或同时)去除蚀刻停止结构20的***部分21以及阻挡层材料122”的去除部分1221”。另外，在蚀刻之后，第二焊盘层材料121'具有第一侧面121s，阻挡层122具有第二侧面122s，其中第一侧面121s和阻挡层122彼此对齐，例如，第一侧面121s和阻挡层122彼此齐平。
如图2E所示，利用蚀刻工艺去除第一图案化光刻胶PR1的保留部分PR12，以暴露蚀刻停止结构20的保留部分22。
如图2F所示，通过使用沉积技术形成覆盖保留部分22、第二焊盘层材料121'和电介质层113的钝化层材料130'。可用的技术包括但不限于物理气相沉积、化学气相沉积、电化学沉积、分子束外延、以及近来的原子层沉积等。
如图2G所示，通过使用沉积技术形成覆盖钝化层材料130'的第二图案化光刻胶PR2。可用的技术包括但不限于物理气相沉积、化学气相沉积、电化学沉积、分子束外延以及近来的原子层沉积等。第二图案化光刻胶PR2具有至少一个开口PR2a，该开口PR2a暴露出钝化层材料130'的暴露部分131'，其中暴露部分131'位于保留部分22的正上方。
在图2G中，保留部分22具有第一宽度L1，开口PR2a具有第二宽度L2，其中第二宽度L2大于第一宽度L1。例如，第一宽度L1和第二宽度L2之间的宽度差在0.05mm至2mm之间的范围内。
如图2H所示，通过第二图案化光刻胶PR2的开口PR2a在钝化层材料130'上形成开口130a，以利用蚀刻工艺形成钝化层130。钝化层130的开口130a暴露第二焊盘层材料121'的焊盘部分121A'和保留部分22，例如暴露整个保留部分22。在蚀刻之后，第二图案化的光刻胶PR2具有内侧壁PRs，钝化层130的开口130a具有内侧壁130s，其中内侧壁PRs和内侧壁130s彼此对齐，例如，内侧壁PRs和内侧壁130s彼此齐平。
在图2H中，在蚀刻工艺中，形成通过第二图案化光刻胶PR2的开口PR2a和钝化层130的开口130a从第二焊盘层材料121'的焊盘部分121A'的上表面120u(在图2G中示出)向基板110延伸的凹部(recess)120r'。凹部120r'具有第一深度D1。
如图2I所示，通过使用蚀刻工艺去除蚀刻停止结构20的保留部分22。在蚀刻工艺中，凹部120r'朝着基板110延伸以形成狭槽(slot)120r。狭槽120r具有第二深度D2，第二深度D2大于凹部120r'的第一深度D1。在同一蚀刻工艺中，形成狭槽120r并且去除保留部分22。换句话说，在去除保留部分22的过程中形成狭槽120r，并且不需要附加的光掩模(photomask)。
然后，去除第二图案化光刻胶PR2以暴露钝化层130，接着形成半导体组件100。
尽管已经根据目前被认为是最实际和优选的实施例描述了本发明，但是应该理解，本发明不限于所公开的实施例。相反，本发明旨在覆盖所附权利要求的精神和范围内包含的各种修改和类似布置，这些修改和类似布置与最宽泛的解释相一致，从而涵盖所有这类修改和类似结构。

Claims (18)

1.一种半导体组件，包括：
基板；以及
焊盘，位于所述基板上并且具有上表面和狭槽，
其中，所述狭槽相对于所述上表面向内凹进。
2.根据权利要求1所述的半导体组件，其特征在于，还包括：
具有开口的钝化层；
其中，所述开口的第一内侧壁与所述狭槽的第二内侧壁对齐。
3.根据权利要求1所述的半导体组件，其特征在于，所述焊盘包括焊盘部分和围绕所述焊盘部分的***部分，并且所述狭槽位于所述焊盘部分和所述***部分之间。
4.根据权利要求1所述的半导体组件，其特征在于，所述狭槽是环形狭槽。
5.根据权利要求4所述的半导体组件，其特征在于，所述狭槽是闭合的环形狭槽或者敞开的环形狭槽。
6.根据权利要求1所述的半导体组件，其特征在于，所述狭槽的宽度在0.1微米至2.0微米之间。
7.根据权利要求1所述的半导体组件，其特征在于，还包括：
部分形成在所述狭槽内的焊线。
8.根据权利要求7所述的半导体组件，其特征在于，所述狭槽的至少一部分填充有所述焊线。
9.一种用于半导体组件的制造方法，包括：
在基板上形成焊盘结构和蚀刻停止结构，其中所述蚀刻停止结构覆盖所述焊盘结构，其中所述焊盘结构包括焊盘部分和围绕所述焊盘部分的***部分；
去除所述蚀刻停止结构的***部分，以形成所述蚀刻停止结构的保留部分，用于覆盖所述焊盘结构的所述焊盘部分，其中所述焊盘结构的所述***部分从所述保留部分暴露出；以及
在所述焊盘结构的所述***部分上形成狭槽以形成焊盘，其中所述狭槽相对于所述焊盘的上表面向内凹进。
10.根据权利要求9所述的制造方法，其特征在于，还包括：
在所述基板上形成阻挡层材料；
形成第一焊盘层材料以覆盖所述阻挡层材料；
形成蚀刻停止结构材料以覆盖所述第一焊盘层材料；
去除所述第一焊盘层材料的一部分，以形成所述焊盘结构的第二焊盘层材料，其中所述第二焊盘层材料包括所述焊盘部分和所述***部分；以及
去除所述蚀刻停止结构材料的一部分，以形成所述蚀刻停止结构。
11.根据权利要求10所述的制造方法，其特征在于，去除所述第一焊盘层材料的一部分以形成所述焊盘结构的所述第二焊盘层材料的步骤包括：
形成第一图案化光刻胶以覆盖所述蚀刻停止结构材料；
通过所述第一图案化光刻胶去除所述第一焊盘层材料的一部分，以形成所述焊盘结构的所述第二焊盘层材料；
其中，去除所述刻蚀停止结构材料的一部分以形成所述刻蚀停止结构的步骤包括：
通过所述第一图案化光刻胶去除所述蚀刻停止结构材料的一部分，以形成所述蚀刻停止结构。
12.根据权利要求11所述的制造方法，其特征在于，还包括：
去除所述第一图案化光刻胶的***部分，其中，保留所述第一图案化光刻胶的覆盖所述蚀刻停止结构的所述保留部分的保留部分；
其中，去除所述蚀刻停止结构的所述***部分以形成所述蚀刻停止结构的所述保留部分用于覆盖所述焊盘结构的所述焊盘部分的步骤还包括：
通过所述第一图案化光刻胶的所述保留部分去除所述蚀刻停止结构的所述***部分，以形成所述蚀刻停止结构的所述保留部分，并暴露所述第二焊盘层材料的所述***部分；以及
去除所述第一图案化光刻胶以暴露所述蚀刻停止结构的所述保留部分。
13.根据权利要求10所述的制造方法，其特征在于，还包括：
去除所述阻挡层材料的去除部分，以形成被所述焊盘结构覆盖的阻挡层。
14.根据权利要求13所述的制造方法，其特征在于，去除所述阻挡层材料的所述去除部分的步骤以及去除所述蚀刻停止结构的***部分的步骤在同一工艺中执行。
15.根据权利要求9所述的制造方法，其特征在于，还包括：
形成钝化层材料以覆盖所述蚀刻停止结构的所述保留部分；
在所述钝化层材料上形成开口；以及
形成从所述焊盘的上表面向所述基板延伸的凹部。
16.根据权利要求9所述的制造方法，其特征在于，还包括：
形成钝化层材料以覆盖所述蚀刻停止结构的所述保留部分；
形成第二图案化光刻胶以覆盖所述钝化层材料，其中所述第二图案化光刻胶具有开口以暴露所述钝化层材料的暴露部分；
通过所述第二图案化光刻胶的所述开口在所述钝化层材料上形成开口，以形成所述钝化层；
通过所述第二图案化光刻胶的所述开口形成凹部，以通过所述钝化层的所述开口从所述焊盘的上表面向所述基板延伸。
17.根据权利要求15所述的制造方法，其特征在于，还包括：
去除所述蚀刻停止结构的所述保留部分；以及
延伸所述凹部以形成所述狭槽。
18.根据权利要求16所述的制造方法，其特征在于，在同一工艺中执行去除所述蚀刻停止结构的所述保留部分的步骤和延伸所述凹部以形成所述狭槽的步骤。
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