JP2006237594A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP2006237594A JP2006237594A JP2006020520A JP2006020520A JP2006237594A JP 2006237594 A JP2006237594 A JP 2006237594A JP 2006020520 A JP2006020520 A JP 2006020520A JP 2006020520 A JP2006020520 A JP 2006020520A JP 2006237594 A JP2006237594 A JP 2006237594A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- opening
- wiring
- semiconductor substrate
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 140
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 71
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000005530 etching Methods 0.000 claims abstract description 15
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 239000011147 inorganic material Substances 0.000 claims 1
- 229910010272 inorganic material Inorganic materials 0.000 claims 1
- 239000011368 organic material Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 239000000126 substance Substances 0.000 abstract description 4
- 239000011521 glass Substances 0.000 description 9
- 239000010410 layer Substances 0.000 description 9
- 230000001681 protective effect Effects 0.000 description 7
- 239000011347 resin Substances 0.000 description 7
- 229920005989 resin Polymers 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 229910000838 Al alloy Inorganic materials 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
- H01L2224/02313—Subtractive methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02371—Disposition of the redistribution layers connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05181—Tantalum [Ta] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13024—Disposition the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01073—Tantalum [Ta]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0494—4th Group
- H01L2924/04941—TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0495—5th Group
- H01L2924/04953—TaN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1434—Memory
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
【解決手段】 本発明の半導体装置の製造方法は、半導体基板1上に第1の絶縁膜2を介して形成された第1の配線3に対して、前記半導体基板裏面から当該半導体基板1をエッチングして前記絶縁膜2を露出させる第1の開口7Aを形成する。次に、前記第1の開口7から露出した前記絶縁膜2をエッチングして前記第1の配線3を露出させる第2の開口8を形成した後に、前記半導体基板1をエッチングして前記第1の開口7Aの開口径を拡張し、より広い開口径を有する第1の開口7Bを形成する。そして、前記第1及び第2の開口7A,8を介して前記第1の配線3を含む半導体基板裏面に第2の絶縁膜10を形成した後に、前記第1の配線3を被覆する第2の絶縁膜10をエッチングする工程を具備することを特徴とする。
【選択図】 図6
Description
2 第1の絶縁膜
3 第1の配線
4 接着剤
5 支持体
6 第1のレジスト膜
7A,7B 第1の開口
8 第2の開口
10 第2の絶縁膜
10a 無機の絶縁膜
10b 有機の絶縁膜
11 第2のレジスト膜
12 第2の配線
13 保護膜
14 ボール状端子
15 保護膜
Claims (14)
- 表面から裏面にかけて貫通する第1の開口を有する半導体基板と、
前記半導体基板の表面に形成され、前記第1の開口と連続した第2の開口を有する第1の絶縁膜と、
前記第1の絶縁膜上に形成され、前記第2の開口で露出された第1の配線と、
前記第1の開口内における前記半導体基板の側壁及び裏面を被覆する第2の絶縁膜と、
前記第2の開口内において前記第1の配線と接触し、前記第1の絶縁膜及び前記第2の絶縁膜上に形成された第2の配線とを備え、
前記第2の開口の開口径は前記第1の開口の底部開口径よりも小さいことを特徴とする半導体装置。 - 前記半導体基板の表面上に支持体が貼り合わされたことを特徴とする請求項1に記載の半導体装置。
- 前記第2の絶縁膜は、前記半導体基板の表面の端部から前記第1の開口の内側の方向に突出する突出部を有することを特徴とする請求項1に記載の半導体装置。
- 前記第1の開口の開口径は、前記半導体基板の表面から裏面にかけて大きくなっていることを特徴とする請求項1に記載の半導体装置。
- 前記第2の絶縁膜が、無機材料もしくは有機材料から成る絶縁膜であるか、またはそれらが積層形成された構造であることを特徴とする請求項1に記載の半導体装置。
- 前記第2の配線にボール状端子を具備することを特徴とする請求項1に記載の半導体装置。
- 表面に第1の絶縁膜を介して第1の配線が形成された半導体基板を準備し、
前記第1の配線に対応する位置であって、前記半導体基板の裏面から表面の方向に前記半導体基板をエッチングすることで、前記第1の絶縁膜を一部露出させる第1の開口を備える前記半導体基板を形成する工程と、
前記第1の絶縁膜をエッチングすることで前記第1の配線を露出させ、前記第1の開口に連続した第2の開口を備える第1の絶縁膜を形成する工程と、
前記半導体基板を再度エッチングすることで、前記第1の開口の底部開口径をより大きい開口径に拡張する工程と、
前記第1の開口における前記半導体基板の側壁及び裏面を被覆する第2の絶縁膜を形成する工程と、
前記第1及び第2の開口内に前記第1の配線に接続された第2の配線を形成する工程と、を具備することを特徴とする半導体装置の製造方法。 - 前記半導体基板の表面上に支持体を貼り合せる工程を有することを特徴とする請求項7に記載の半導体装置の製造方法。
- 前記第2の絶縁膜を形成する工程が、無機もしくは有機の絶縁膜を形成する工程であるか、またはそれらを積層形成する工程であることを特徴とする請求項7に記載の半導体装置の製造方法。
- 前記第2の絶縁膜を形成する工程において、
レジスト膜をマスクとして前記第2の絶縁膜をエッチングすることを特徴とする請求項7に記載の半導体装置の製造方法。 - 前記第2の絶縁膜を形成する工程において、レジスト膜をマスクとして用いないで前記第2の絶縁膜をエッチングすることを特徴とする請求項7に記載の半導体装置の製造方法。
- 前記第2の配線に接続されるボール状端子を形成する工程を具備することを特徴とする請求項7に記載の半導体装置の製造方法。
- 前記半導体基板を複数の半導体チップに分割する工程を具備することを特徴とする請求項7に記載の半導体装置の製造方法。
- 前記第1の開口の開口径が前記半導体基板の表面から裏面にかけて大きくなるように形成することを特徴とする請求項7に記載の半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006020520A JP4775007B2 (ja) | 2005-01-31 | 2006-01-30 | 半導体装置及びその製造方法 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005022525 | 2005-01-31 | ||
JP2005022525 | 2005-01-31 | ||
JP2006020520A JP4775007B2 (ja) | 2005-01-31 | 2006-01-30 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006237594A true JP2006237594A (ja) | 2006-09-07 |
JP4775007B2 JP4775007B2 (ja) | 2011-09-21 |
Family
ID=36035797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006020520A Expired - Fee Related JP4775007B2 (ja) | 2005-01-31 | 2006-01-30 | 半導体装置及びその製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8035215B2 (ja) |
EP (1) | EP1686622A3 (ja) |
JP (1) | JP4775007B2 (ja) |
KR (1) | KR100659625B1 (ja) |
CN (1) | CN100524725C (ja) |
TW (1) | TWI313914B (ja) |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007053149A (ja) * | 2005-08-16 | 2007-03-01 | Renesas Technology Corp | 半導体ウエハ及びその製造方法 |
JP2009016406A (ja) * | 2007-06-30 | 2009-01-22 | Zycube:Kk | 貫通導電体を有する半導体装置およびその製造方法 |
JP2010114201A (ja) * | 2008-11-05 | 2010-05-20 | Oki Semiconductor Co Ltd | 半導体装置の製造方法 |
JP2010192481A (ja) * | 2009-02-16 | 2010-09-02 | Panasonic Corp | 半導体基板と半導体パッケージおよび半導体基板の製造方法 |
JP2010232400A (ja) * | 2009-03-27 | 2010-10-14 | Panasonic Corp | 半導体基板と半導体基板の製造方法および半導体パッケージ |
JP2012134526A (ja) * | 2012-02-22 | 2012-07-12 | Renesas Electronics Corp | 半導体装置 |
US8252628B2 (en) | 2007-03-15 | 2012-08-28 | Sony Corporation | Semiconductor device and method of manufacturing the same |
US8455969B2 (en) | 2007-05-16 | 2013-06-04 | Sony Corporation | Semiconductor device and method for manufacturing the same |
WO2014038176A1 (ja) * | 2012-09-05 | 2014-03-13 | 株式会社デンソー | 半導体装置の製造方法 |
JP2014154722A (ja) * | 2013-02-08 | 2014-08-25 | Rohm Co Ltd | 半導体装置およびその製造方法 |
JP2014222785A (ja) * | 2014-08-19 | 2014-11-27 | セイコーエプソン株式会社 | 半導体装置及び電子デバイス |
JP2015008296A (ja) * | 2007-03-05 | 2015-01-15 | インヴェンサス・コーポレイション | 貫通ビアによって前面接点に接続された後面接点を有するチップ |
JP2016171256A (ja) * | 2015-03-13 | 2016-09-23 | 株式会社東芝 | 半導体装置、および、半導体装置の製造方法 |
US9659841B2 (en) | 2013-10-30 | 2017-05-23 | Lapis Semiconductor Co., Ltd. | Semiconductor device and method of producing semiconductor device |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8212331B1 (en) * | 2006-10-02 | 2012-07-03 | Newport Fab, Llc | Method for fabricating a backside through-wafer via in a processed wafer and related structure |
JP5010948B2 (ja) * | 2007-03-06 | 2012-08-29 | オリンパス株式会社 | 半導体装置 |
CN104615982B (zh) * | 2015-01-28 | 2017-10-13 | 江阴长电先进封装有限公司 | 一种指纹识别传感器的封装结构及其封装方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08181088A (ja) * | 1994-12-26 | 1996-07-12 | Murata Mfg Co Ltd | 微細コンタクトホ−ルの形成方法 |
WO2003043094A1 (en) * | 2001-11-12 | 2003-05-22 | Samsung Electronics Co., Ltd. | Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion |
US20030119308A1 (en) * | 2001-12-20 | 2003-06-26 | Geefay Frank S. | Sloped via contacts |
JP2004343088A (ja) * | 2003-04-24 | 2004-12-02 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2005019521A (ja) * | 2003-06-24 | 2005-01-20 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP2005019522A (ja) * | 2003-06-24 | 2005-01-20 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2005093486A (ja) * | 2003-09-12 | 2005-04-07 | Seiko Epson Corp | 半導体装置の製造方法及び半導体装置 |
JP2006060067A (ja) * | 2004-08-20 | 2006-03-02 | Rohm Co Ltd | 半導体チップの製造方法、半導体チップ、半導体装置の製造法および半導体装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5613394B2 (ja) * | 1974-11-29 | 1981-03-27 | ||
US5910687A (en) * | 1997-01-24 | 1999-06-08 | Chipscale, Inc. | Wafer fabrication of die-bottom contacts for electronic devices |
KR100243286B1 (ko) * | 1997-03-05 | 2000-03-02 | 윤종용 | 반도체 장치의 제조방법 |
US6052287A (en) * | 1997-12-09 | 2000-04-18 | Sandia Corporation | Silicon ball grid array chip carrier |
IL123207A0 (en) | 1998-02-06 | 1998-09-24 | Shellcase Ltd | Integrated circuit device |
US6617681B1 (en) * | 1999-06-28 | 2003-09-09 | Intel Corporation | Interposer and method of making same |
JP3879816B2 (ja) * | 2000-06-02 | 2007-02-14 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、積層型半導体装置、回路基板並びに電子機器 |
JP4215571B2 (ja) | 2002-06-18 | 2009-01-28 | 三洋電機株式会社 | 半導体装置の製造方法 |
TWI229890B (en) * | 2003-04-24 | 2005-03-21 | Sanyo Electric Co | Semiconductor device and method of manufacturing same |
JP2004327910A (ja) * | 2003-04-28 | 2004-11-18 | Sharp Corp | 半導体装置およびその製造方法 |
-
2005
- 2005-12-12 TW TW094143796A patent/TWI313914B/zh not_active IP Right Cessation
-
2006
- 2006-01-27 KR KR1020060008792A patent/KR100659625B1/ko not_active IP Right Cessation
- 2006-01-27 US US11/340,851 patent/US8035215B2/en active Active
- 2006-01-28 CN CNB2006100042029A patent/CN100524725C/zh active Active
- 2006-01-30 JP JP2006020520A patent/JP4775007B2/ja not_active Expired - Fee Related
- 2006-01-31 EP EP06001902A patent/EP1686622A3/en not_active Withdrawn
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08181088A (ja) * | 1994-12-26 | 1996-07-12 | Murata Mfg Co Ltd | 微細コンタクトホ−ルの形成方法 |
WO2003043094A1 (en) * | 2001-11-12 | 2003-05-22 | Samsung Electronics Co., Ltd. | Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion |
US20030119308A1 (en) * | 2001-12-20 | 2003-06-26 | Geefay Frank S. | Sloped via contacts |
JP2004343088A (ja) * | 2003-04-24 | 2004-12-02 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2005019521A (ja) * | 2003-06-24 | 2005-01-20 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP2005019522A (ja) * | 2003-06-24 | 2005-01-20 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2005093486A (ja) * | 2003-09-12 | 2005-04-07 | Seiko Epson Corp | 半導体装置の製造方法及び半導体装置 |
JP2006060067A (ja) * | 2004-08-20 | 2006-03-02 | Rohm Co Ltd | 半導体チップの製造方法、半導体チップ、半導体装置の製造法および半導体装置 |
Cited By (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4694305B2 (ja) * | 2005-08-16 | 2011-06-08 | ルネサスエレクトロニクス株式会社 | 半導体ウエハの製造方法 |
JP2007053149A (ja) * | 2005-08-16 | 2007-03-01 | Renesas Technology Corp | 半導体ウエハ及びその製造方法 |
JP2015008296A (ja) * | 2007-03-05 | 2015-01-15 | インヴェンサス・コーポレイション | 貫通ビアによって前面接点に接続された後面接点を有するチップ |
US11676977B2 (en) | 2007-03-15 | 2023-06-13 | Sony Group Corporation | Semiconductor device |
US8252628B2 (en) | 2007-03-15 | 2012-08-28 | Sony Corporation | Semiconductor device and method of manufacturing the same |
US9379155B2 (en) | 2007-03-15 | 2016-06-28 | Sony Corporation | Semiconductor device and method of manufacturing the same |
US9041179B2 (en) | 2007-03-15 | 2015-05-26 | Sony Corporation | Semiconductor device and method of manufacturing the same |
KR101463895B1 (ko) * | 2007-03-15 | 2014-11-20 | 소니 주식회사 | 반도체장치 및 그 제조방법 |
US8455969B2 (en) | 2007-05-16 | 2013-06-04 | Sony Corporation | Semiconductor device and method for manufacturing the same |
KR101478524B1 (ko) | 2007-05-16 | 2015-01-02 | 소니 주식회사 | 반도체장치 및 그 제조방법 |
JP2009016406A (ja) * | 2007-06-30 | 2009-01-22 | Zycube:Kk | 貫通導電体を有する半導体装置およびその製造方法 |
JP2010114201A (ja) * | 2008-11-05 | 2010-05-20 | Oki Semiconductor Co Ltd | 半導体装置の製造方法 |
JP2010192481A (ja) * | 2009-02-16 | 2010-09-02 | Panasonic Corp | 半導体基板と半導体パッケージおよび半導体基板の製造方法 |
JP2010232400A (ja) * | 2009-03-27 | 2010-10-14 | Panasonic Corp | 半導体基板と半導体基板の製造方法および半導体パッケージ |
JP2012134526A (ja) * | 2012-02-22 | 2012-07-12 | Renesas Electronics Corp | 半導体装置 |
JP2014067992A (ja) * | 2012-09-05 | 2014-04-17 | Denso Corp | 半導体装置の製造方法 |
WO2014038176A1 (ja) * | 2012-09-05 | 2014-03-13 | 株式会社デンソー | 半導体装置の製造方法 |
JP2014154722A (ja) * | 2013-02-08 | 2014-08-25 | Rohm Co Ltd | 半導体装置およびその製造方法 |
US9659841B2 (en) | 2013-10-30 | 2017-05-23 | Lapis Semiconductor Co., Ltd. | Semiconductor device and method of producing semiconductor device |
US10043743B2 (en) | 2013-10-30 | 2018-08-07 | Lapis Semiconductor Co., Ltd. | Semiconductor device and method of producing semiconductor device |
US10580732B2 (en) | 2013-10-30 | 2020-03-03 | Lapis Semiconductor Co., Ltd. | Semiconductor device |
JP2014222785A (ja) * | 2014-08-19 | 2014-11-27 | セイコーエプソン株式会社 | 半導体装置及び電子デバイス |
JP2016171256A (ja) * | 2015-03-13 | 2016-09-23 | 株式会社東芝 | 半導体装置、および、半導体装置の製造方法 |
US9865502B2 (en) | 2015-03-13 | 2018-01-09 | Toshiba Memory Corporation | Semiconductor device and method of manufacturing the same semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
CN1828883A (zh) | 2006-09-06 |
JP4775007B2 (ja) | 2011-09-21 |
EP1686622A2 (en) | 2006-08-02 |
US8035215B2 (en) | 2011-10-11 |
TWI313914B (en) | 2009-08-21 |
KR100659625B1 (ko) | 2006-12-20 |
EP1686622A3 (en) | 2010-05-05 |
KR20060088047A (ko) | 2006-08-03 |
TW200627598A (en) | 2006-08-01 |
US20060180933A1 (en) | 2006-08-17 |
CN100524725C (zh) | 2009-08-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4775007B2 (ja) | 半導体装置及びその製造方法 | |
JP4307284B2 (ja) | 半導体装置の製造方法 | |
JP4850392B2 (ja) | 半導体装置の製造方法 | |
KR100679572B1 (ko) | 반도체 장치의 제조 방법 | |
US7485967B2 (en) | Semiconductor device with via hole for electric connection | |
JP4873517B2 (ja) | 半導体装置及びその製造方法 | |
KR100840502B1 (ko) | 반도체 장치 및 그 제조 방법 | |
JP2011009645A (ja) | 半導体装置及びその製造方法 | |
JP2006128172A (ja) | 半導体装置及びその製造方法 | |
JP2005235860A (ja) | 半導体装置及びその製造方法 | |
US7511320B2 (en) | Semiconductor device and manufacturing method of the same | |
JP5165190B2 (ja) | 半導体装置及びその製造方法 | |
JP2006351766A (ja) | 半導体装置及びその製造方法 | |
JP4544902B2 (ja) | 半導体装置及びその製造方法 | |
JP4845986B2 (ja) | 半導体装置 | |
JP2005260079A (ja) | 半導体装置及びその製造方法 | |
US11694904B2 (en) | Substrate structure, and fabrication and packaging methods thereof | |
JP5258735B2 (ja) | 半導体装置 | |
JP4769926B2 (ja) | 半導体装置及びその製造方法 | |
JP2008078327A (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2007311633A (ja) | 半導体装置及びその製造方法 | |
JP2005260080A (ja) | 半導体装置及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20081205 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20101112 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20101130 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20101227 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110329 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110420 |
|
TRDD | Decision of grant or rejection written | ||
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20110526 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20110526 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110531 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110613 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140708 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140708 Year of fee payment: 3 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140708 Year of fee payment: 3 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |