CN112350888A - Starting state detection system and method thereof - Google Patents
Starting state detection system and method thereof Download PDFInfo
- Publication number
- CN112350888A CN112350888A CN202011146790.6A CN202011146790A CN112350888A CN 112350888 A CN112350888 A CN 112350888A CN 202011146790 A CN202011146790 A CN 202011146790A CN 112350888 A CN112350888 A CN 112350888A
- Authority
- CN
- China
- Prior art keywords
- state detection
- starting
- potential
- processing module
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Environmental & Geological Engineering (AREA)
- Stored Programmes (AREA)
Abstract
The invention provides a starting state detection system and a method thereof. The first logic processing module transmits a starting control signal to the second logic processing module, so that the second logic processing module reads and executes a starting program stored in the storage module. The second logic processing module sends an idle signal with a first potential in an idle state and sends an execution success signal with a second potential when the execution of the starting program is successful. And when the first logic processing module does not receive the execution success signal within the state detection time, the second logic processing module is retriggered to execute the starting program.
Description
Technical Field
The present invention relates to a system and method for detecting a start-up state, and more particularly, to a system and method for detecting a start-up state of a communication device.
Background
With the advancement of science and technology, network cards have become indispensable communication devices for connecting network devices, such as server hosts, monitoring devices, Uninterruptible Power Supply (USP), gateways (Gateway), etc., users can manage the devices through independent web interfaces thereof, and in order to meet the needs of users, many functions are added to the network cards in the industry today, so that smart network cards are designed, wherein a network card (i.e., an FPGA enhanced network card) with Field Programmable Gate Array (FPGA) functions is becoming the mainstream of the market.
The FPGA enhanced intelligent network card can provide backward compatibility, particularly the compatibility with a hypervisor, and can use the existing application programming interface and a driver without additional design because the FPGA enhanced intelligent network card is compatible with the existing network application programming interface and interface protocol.
Generally, when the FPGA enhanced intelligent network card is started, the internal FPGA needs to load a Firmware (Firmware) document with a size of about 1GigaByte (GB) stored in the external storage module, and in the process of reading and executing the Firmware document, if the system fails, the system cannot identify the intelligent network card, which causes a problem in the system, and even if the system is turned off and then restarted, the network card cannot be started, and at this time, the network card must be restarted after being completely powered off and then restarted.
Disclosure of Invention
In view of the problems of the prior art, a communication device such as an intelligent network card generally has the problem that the communication device needs to be powered off to be successfully restarted, which causes inconvenience to a user. It is a primary object of the present invention to provide a startup state detection system and method thereof, which solves the problems of the prior art by signal transmission between two logic processing modules.
To achieve the above and other related objects, a first aspect of the present invention provides an activation state detection system for a communication device, the activation state detection system comprising: a first logical processing module comprising: a start control unit for sending out a start control signal; the starting state detection unit is electrically connected with the starting control unit and is provided with state detection time; a storage module, which stores a starting program; and a second logic processing module, communicatively connected to the start control unit, the start state detection unit and the storage module, for sending an idle signal having a first potential in an idle state, and for reading and executing the start program when receiving the start control signal, so as to send an execution success signal having a second potential in an execution success state, wherein the second potential is different from the first potential; when the starting state detection unit receives the execution success signal with the second potential within the state detection time, the starting state detection unit judges that the second logic processing module successfully executes the starting program and judges that the communication device is in a starting success state; and when the starting state detection unit still receives the idle signal with the first potential outside the state detection time, the starting state detection unit judges that the second logic processing module is in a starting failure state, and sends a restarting signal with a third potential to the starting control unit, so that the starting control unit resends the starting control signal, and the second logic processing module reads and executes the starting program again.
In an embodiment of the first aspect, the communication device is a network card.
In an embodiment of the first aspect, the first Logic processing module is a Complex Programmable Logic Device (CPLD) or a System on a Chip (SOC), and the second Logic processing module is a Field Programmable Gate Array (FPGA).
In an embodiment of the first aspect, the second logic processing module further includes: the processing unit is in communication connection with the starting control unit, the starting state detection unit and the storage module, is used for sending the idle signal in an idle state, and is used for reading and executing the starting program when receiving the starting control signal so as to send the execution success signal in the execution success state; and an execution state judgment unit which is electrically connected with the processing unit and the starting state detection unit, is provided with a state judgment table containing the corresponding relation between the idle state and the first potential and the corresponding relation between the execution success state and the second potential, is used for sending the execution success signal with the second potential to the starting state detection unit according to the state judgment table when receiving the execution success signal, and is used for sending the idle signal with the first potential to the starting state detection unit according to the state judgment table when receiving the idle signal.
In an embodiment of the first aspect, the first potential and the third potential are low potentials marked as 0, and the second potential is high potential marked as 1.
In an embodiment of the first aspect, the state detection time is 1200 milliseconds.
A second aspect of the present invention provides a startup state detection method implemented by the startup state detection system according to the first aspect of the present invention, the startup state detection method including the steps of: (a) sending the starting control signal by using the starting control unit of the first logic processing module; (b) receiving the starting control signal by utilizing the second logic processing module so as to read and execute the starting program; (c) judging whether the execution success signal with the second potential sent by the second logic processing module in the execution success state is received within the state detection time by using the starting state detection unit; (d) when the judgment result in the step (c) is yes, judging that the second logic processing module successfully executes the starting program by using the starting state detection unit, and judging that the communication device is in the starting successful state; and (e) when the judgment result in the step (c) is negative, the starting state detection unit is utilized to send the restarting signal with the third potential to the starting control unit, so that the starting control unit sends the starting control signal again, and the second logic processing module reads and executes the starting program again.
In an embodiment of the second aspect, the communication device is a network card, the first logic processing module is a complex programmable logic device or a system-on-a-chip, and the second logic processing module is a field programmable gate array.
In an embodiment of the second aspect, the first potential and the third potential are low potentials marked as 0, and the second potential is high potential marked as 1.
In an embodiment of the second aspect, the state detection time is 1200 milliseconds.
As described above, the start-up status detection system and method thereof provided by the present invention can directly trigger the second logic processing module to re-read and execute the start-up program because the execution success signal having the second potential different from the first potential is not received within the status detection time, so that the user does not need to power off to restart the communication device, thereby greatly improving the convenience of the user in use and improving the working stability of the communication device.
Drawings
Fig. 1 is a block diagram of a startup state detection system according to a preferred embodiment of the invention.
Fig. 2 is a flowchart illustrating a method for detecting a startup state according to a preferred embodiment of the invention.
Description of the element reference numerals
1 start-up state detection system
11 first logic processing module
111 start control unit
112 start state detection unit
12 storage module
121 start-up procedure
13 second logic processing module
131 processing unit
132 execution status determination unit
1321 State judgment Table
2 communication device
S1 Start control Signal
S2 execution success signal
S3 Idle Signal
S4 restart signal
S101 to S105
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to scale, which is intended merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Referring to fig. 1, fig. 1 is a block diagram illustrating a startup state detection system according to a preferred embodiment of the invention. As shown in the figure, the start-up state detecting system 1 provided by the present invention is applied to a communication device 2, where the communication device 2 is, for example, a network card, but is not limited thereto, and the network card is, for example, an existing intelligent network card. In addition, the communication connection described in the preferred embodiment of the present invention is a wired communication connection, but in other embodiments, it may also be a wireless communication connection, depending on the actual design.
The activation state detection System 1 includes a first Logic processing module 11, a storage module 12 and a second Logic processing module 13, wherein the first Logic processing module 11 can be, for example, one of a Complex Programmable Logic Device (CPLD, hereinafter abbreviated as CPLD) and a System on a Chip (SOC), which is the CPLD in the preferred embodiment of the present invention, but is not limited thereto in other embodiments. The first logic processing module 11 includes a start control unit 111 and a start state detection unit 112, wherein the start control unit 111 and the start state detection unit 112 may be conventional processors, and the start state detection unit 112 is electrically connected to the start control unit 111 and has a state detection time, which is, for example, 1200 ms, but is not limited thereto in other embodiments.
The storage module 12 stores a boot program 121, the storage module 12 is, for example, a Read-Only Memory (Flash ROM), the Read-Only Memory can be, for example, a Flash ROM, and the boot program 121 is, for example, firmware, but the embodiments are not limited thereto.
The second logic processing module 13 is communicatively connected to the start control unit 111, the start state detection unit 112 and the storage module 12, and may be, for example, a Field Programmable Gate Array (FPGA), but is not limited thereto in other embodiments.
Specifically, the second logic processing module 13 of the preferred embodiment of the present invention further includes a processing unit 131 and an execution state determining unit 132, wherein the processing unit 131 is communicatively connected to the start control unit 111, the start state detecting unit 112 and the storage module 12. The execution status determining unit 132 is electrically connected to the processing unit 131 and the active status detecting unit 112, and has a status determining table 1321 containing a corresponding relationship between an Idle (Idle) status and a first voltage level and a corresponding relationship between a successful execution status and a second voltage level. The processing unit 131 and the execution state determination unit 132 may be, for example, conventional processors.
It should be noted that the idle state in the present invention may also be a standby state, and the successful execution state will be described in detail later, the first potential is a low potential marked as 0, and the second potential is a high potential marked as 1, so the state determination table 1321 may be, for example, the following table:
state judging table
| Status of state | Electric potential |
| Idle state | 0 |
| Execution success status | 1 |
The start control unit 111 of the first logic processing module 11 is configured to send a start control signal S1, and the second logic processing module 13 is configured to send an idle signal S3 with a first voltage level in an idle state, for example, the second logic processing module 13 is an FPGA, and the FPGA is provided with a setting pin (for example, CONFIG _ DONE) in practical application, and signals sent by the setting pin are low voltage signals marked as 0 in the idle state.
The second logic processing module 13, upon receiving the start control signal S1, reads and executes the start program 121 to send an execution success signal S2 at a second potential different from the first potential in an execution success state. It should be noted that the execution success status defined in the present application means that the FPGA successfully loads the boot program 121 and completes execution, so that the communication device 2 is successfully booted, and the execution success signal S2 is also sent through the setting pin, but the present invention is not limited thereto.
When the activation state detection unit 112 receives the execution success signal S2 with the second potential within the state detection time, it determines that the second logic processing module 13 successfully executes the activation program 121, and determines that the communication apparatus 2 is in an activation success state. The startup successful state refers to a state in which the communication apparatus 2 is successfully started and operated.
When the start-up status detecting unit 112 still receives the idle signal S3 with the first potential outside the status detecting time, it determines that the second logic processing module 13 is in a start-up failure state, and sends a restart signal S4 with a third potential to the start-up control unit 111, so that the start-up control unit 111 resends the start-up control signal S1, thereby the second logic processing module 13 re-reads and executes the start-up program 121.
It should be noted that the third voltage level is a low voltage level marked as 0, and generally, if the startup state detection unit 112 has not received the execution success signal S2 within the state detection time, it will: in the case where the above-mentioned change of the setting pin from the low level to the high level (the flag is changed from 0 to 1) is not detected within the state detection time, it is determined that the second logic processing module 13 encounters an error while executing the boot program 121, and is in the boot failure state.
In other embodiments, the second logic processing module 13 may also be configured to actively send a feedback signal with a low voltage level to the start-up state detection unit 112 when an error occurs in executing the start-up program 121, so that the start-up state detection unit 112 sends the restart signal S4 to the start-up control unit 111 to trigger the second logic processing module 13 to reload the start-up program 121.
In addition, in the preferred embodiment of the present invention, the second logic processing module 13 further performs processing through the processing unit 131 and the execution state determining unit 132 to specifically determine what kind of potential signal is sent. For example, the processing unit 131 sends the idle signal S3 in the idle state, and upon receiving the start control signal S1, reads and executes the start program 121 to send the execute success signal S2 in the execute success state.
When receiving the execution-success signal S2, the execution-state determining unit 132 compares the execution-success signal S2 with the second potential (i.e., the high potential marked as 1) according to the state determination table 1321, and sends the execution-success signal S2 with the second potential to the start-state detecting unit 112.
When the status determining unit 132 receives the idle signal S3, it compares that the idle signal S3 has the first potential (i.e. the low potential of 0) according to the status determination table 1321, and sends the idle signal S3 having the first potential to the boot status detecting unit 112, so that the boot status detecting unit 112 sends the reboot signal S4 to the boot controlling unit 111 to trigger the second logic processing module 13 to reload the boot program 121.
Referring to fig. 2, fig. 2 is a flowchart illustrating a method for detecting a startup state according to a preferred embodiment of the invention. The preferred embodiment of the present invention further provides a method for detecting a start-up state, which is implemented by using the system for detecting a start-up state shown in fig. 1, and comprises the following steps S101 to S105.
Step S101: the start control signal S1 is sent out by the start control unit 111 of the first logical processing module 11.
Step S102: the second logic processing module 13 receives the start control signal S1 to read and execute the start program 121.
Step S103: the activated state detecting unit 112 is used to determine whether an execution success signal S2 with a second potential sent by the second logic processing module 13 in the execution success state is received within the state detection time.
Step S104: the startup state detection unit 112 determines that the second logic processing module 13 successfully executes the startup program 121, and determines that the communication apparatus 2 is in a startup successful state.
Step S105: the startup state detection unit 112 sends the restart signal S4 with the third potential to the startup control unit 111, so that the startup control unit 111 sends the startup control signal S1 again, thereby causing the second logic processing module 13 to read and execute the startup program 121 again.
The above steps S102 to S105 relate to the operation of the second logic processing module 13, and the processing unit 131 and the execution state determining unit 132 can further perform the operations, and the detailed description of each step is already mentioned in the above paragraphs, so that the detailed description is omitted.
In summary, after the start-up status detecting system and method provided by the present invention are adopted, when the first logic processing module does not receive the execution success signal having the second potential different from the first potential within the status detecting time, the second logic processing module can be directly triggered to re-read and execute the start-up program, so that the user can restart the communication device without powering off, thereby greatly improving the convenience of the user in use and improving the working stability of the communication device.
The above detailed description of the preferred embodiments is intended to more clearly illustrate the features and spirit of the present invention, and is not intended to limit the scope of the present invention to the particular embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the claims.
Claims (10)
1. An activation state detection system for a communication device, the activation state detection system comprising:
a first logical processing module comprising:
a start control unit for sending out a start control signal; and
the starting state detection unit is electrically connected with the starting control unit and is provided with state detection time;
a storage module, which stores a starting program; and
a second logic processing module, communicatively connected to the start control unit, the start state detection unit and the storage module, for sending an idle signal having a first potential in an idle state, and for reading and executing the start program when receiving the start control signal, so as to send an execution success signal having a second potential in an execution success state, wherein the second potential is different from the first potential;
when the starting state detection unit receives the execution success signal with the second potential within the state detection time, the starting state detection unit judges that the second logic processing module successfully executes the starting program and judges that the communication device is in a starting success state; and when the starting state detection unit still receives the idle signal with the first potential outside the state detection time, the starting state detection unit judges that the second logic processing module is in a starting failure state, and sends a restarting signal with a third potential to the starting control unit, so that the starting control unit resends the starting control signal, and the second logic processing module reads and executes the starting program again.
2. The startup state detection system according to claim 1, characterized in that: the communication device is a network card.
3. The startup state detection system according to claim 1, characterized in that: the first logic processing module is a complex programmable logic device or a system-on-a-chip, and the second logic processing module is a field programmable logic gate array.
4. The startup state detection system of claim 1, wherein the second logical processing module further comprises:
the processing unit is in communication connection with the starting control unit, the starting state detection unit and the storage module, is used for sending the idle signal in an idle state, and is used for reading and executing the starting program when receiving the starting control signal so as to send the execution success signal in the execution success state; and
an execution state judgment unit, electrically connected to the processing unit and the start state detection unit, having a corresponding relation between the idle state and the first potential and a state judgment table containing the corresponding relation between the execution success state and the second potential, for sending the execution success signal having the second potential to the start state detection unit according to the state judgment table when receiving the execution success signal, and for sending the idle signal having the first potential to the start state detection unit according to the state judgment table when receiving the idle signal.
5. The activation state detection system of claim 4, wherein: the first potential and the third potential are low potentials marked as 0, and the second potential is high potential marked as 1.
6. The startup state detection system according to claim 1, characterized in that: the state detection time is 1200 milliseconds.
7. A startup state detection method implemented by the startup state detection system of claim 1, the startup state detection method comprising the steps of:
(a) sending the starting control signal by using the starting control unit of the first logic processing module;
(b) receiving the starting control signal by utilizing the second logic processing module so as to read and execute the starting program;
(c) judging whether the execution success signal with the second potential sent by the second logic processing module in the execution success state is received within the state detection time by using the starting state detection unit;
(d) when the judgment result in the step (c) is yes, judging that the second logic processing module successfully executes the starting program by using the starting state detection unit, and judging that the communication device is in the starting successful state; and
(e) and (c) when the judgment result in the step (c) is negative, sending the restart signal with the third potential to the start control unit by using the start state detection unit, so that the start control unit sends the start control signal again, and accordingly the second logic processing module reads and executes the start program again.
8. The activation state detection method according to claim 7, wherein: the communication device is a network card, the first logic processing module is a complex programmable logic device or a system single chip, and the second logic processing module is a field programmable logic gate array.
9. The activation state detection method according to claim 7, wherein: the first potential and the third potential are low potentials marked as 0, and the second potential is high potential marked as 1.
10. The activation state detection method according to claim 7, wherein: the state detection time is 1200 milliseconds.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011146790.6A CN112350888B (en) | 2020-10-23 | 2020-10-23 | Starting state detection system and method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011146790.6A CN112350888B (en) | 2020-10-23 | 2020-10-23 | Starting state detection system and method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112350888A true CN112350888A (en) | 2021-02-09 |
| CN112350888B CN112350888B (en) | 2022-10-11 |
Family
ID=74360024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011146790.6A Active CN112350888B (en) | 2020-10-23 | 2020-10-23 | Starting state detection system and method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112350888B (en) |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102007000756A1 (en) * | 2006-10-20 | 2008-04-24 | Denso Corp., Kariya | A gas concentration detection apparatus having a function of detecting the sensor element activation state |
| CN101639025A (en) * | 2008-07-29 | 2010-02-03 | 光宝科技股份有限公司 | Starting system for starting engine |
| CN101650662A (en) * | 2009-08-26 | 2010-02-17 | 中兴通讯股份有限公司 | Memory device of embedded system and staring method and upgrading of firmware |
| CN103107800A (en) * | 2012-12-13 | 2013-05-15 | 广州慧智微电子有限公司 | Method capable of fast and stably starting control loop and circuit of control loop |
| CN103197199A (en) * | 2012-11-13 | 2013-07-10 | 上海华勤通讯技术有限公司 | Disconnection detection device and method |
| CN104077156A (en) * | 2013-03-28 | 2014-10-01 | 深圳芯力电子技术有限公司 | Restarting system for programmable central processing unit and method thereof |
| CN106055066A (en) * | 2016-06-12 | 2016-10-26 | 合肥联宝信息技术有限公司 | Computer startup control device and computer startup method |
| CN107885626A (en) * | 2017-11-03 | 2018-04-06 | 郑州云海信息技术有限公司 | The system of on-chip system programming device starts the device and method of Autonomous test |
| CN108448946A (en) * | 2018-04-19 | 2018-08-24 | 深圳市倍通控制技术有限公司 | The control method of motor restarting controller and motor restarting controller |
| CN109117191A (en) * | 2018-06-12 | 2019-01-01 | 广州视源电子科技股份有限公司 | A kind of method, apparatus that electric appliance is restarted, equipment and storage medium |
| CN109379215A (en) * | 2018-09-26 | 2019-02-22 | 郑州云海信息技术有限公司 | A kind of network interface card firmware update, device and equipment |
-
2020
- 2020-10-23 CN CN202011146790.6A patent/CN112350888B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102007000756A1 (en) * | 2006-10-20 | 2008-04-24 | Denso Corp., Kariya | A gas concentration detection apparatus having a function of detecting the sensor element activation state |
| CN101639025A (en) * | 2008-07-29 | 2010-02-03 | 光宝科技股份有限公司 | Starting system for starting engine |
| CN101650662A (en) * | 2009-08-26 | 2010-02-17 | 中兴通讯股份有限公司 | Memory device of embedded system and staring method and upgrading of firmware |
| CN103197199A (en) * | 2012-11-13 | 2013-07-10 | 上海华勤通讯技术有限公司 | Disconnection detection device and method |
| CN103107800A (en) * | 2012-12-13 | 2013-05-15 | 广州慧智微电子有限公司 | Method capable of fast and stably starting control loop and circuit of control loop |
| CN104077156A (en) * | 2013-03-28 | 2014-10-01 | 深圳芯力电子技术有限公司 | Restarting system for programmable central processing unit and method thereof |
| CN106055066A (en) * | 2016-06-12 | 2016-10-26 | 合肥联宝信息技术有限公司 | Computer startup control device and computer startup method |
| CN107885626A (en) * | 2017-11-03 | 2018-04-06 | 郑州云海信息技术有限公司 | The system of on-chip system programming device starts the device and method of Autonomous test |
| CN108448946A (en) * | 2018-04-19 | 2018-08-24 | 深圳市倍通控制技术有限公司 | The control method of motor restarting controller and motor restarting controller |
| CN109117191A (en) * | 2018-06-12 | 2019-01-01 | 广州视源电子科技股份有限公司 | A kind of method, apparatus that electric appliance is restarted, equipment and storage medium |
| CN109379215A (en) * | 2018-09-26 | 2019-02-22 | 郑州云海信息技术有限公司 | A kind of network interface card firmware update, device and equipment |
Non-Patent Citations (1)
| Title |
|---|
| 网友: "断电后才能从网卡启动？", 《百度》, 25 March 2013 (2013-03-25), pages 1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112350888B (en) | 2022-10-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8930931B2 (en) | Information processing apparatus using updated firmware and system setting method | |
| JP2002123806A (en) | Ic card, data update control method, data/message restoration control method, and storage medium with control program recorded thereon | |
| WO2022198973A1 (en) | Server firmware self-recovery system, and server | |
| EP2382545B1 (en) | Component configuration mechanism for rebooting | |
| EP2750034B1 (en) | Electronic device having updatable bios and bios updating method thereof | |
| CN101477838B (en) | Condition detection apparatus, system and electronic device for NAND flash memory body | |
| CN111338698A (en) | Method and system for accurately booting server by BIOS (basic input output System) | |
| CN109063488A (en) | A kind of PowerPC standby system secure bootstrapping method and system | |
| US20020095619A1 (en) | Fault tolerant/redundant boot ROM reprogramming | |
| CN114090107A (en) | Computer and system starting method | |
| CN112350888B (en) | Starting state detection system and method thereof | |
| CN110908733B (en) | Working mode determining method and device, and control method and device | |
| CN111966199B (en) | CPLD online upgrade slow start method, device, equipment and storage medium | |
| CN113986357B (en) | Method, apparatus and storage medium for establishing communication link | |
| CN112445440B (en) | Image forming apparatus, start control method thereof and storage medium | |
| TWI764342B (en) | Startup status detection system and method thereof | |
| CN114528555A (en) | ARM server firmware safety check starting management method, device and medium | |
| JP3231561B2 (en) | Backup memory control method | |
| CN114594995A (en) | Electronic device and starting method thereof | |
| TWI757923B (en) | Pre-boot execution environment determination system and method thereof | |
| CN115576587B (en) | Firmware upgrading device and method for storage device | |
| CN115437846A (en) | Firmware maintenance method and electronic equipment | |
| CN115454744A (en) | Test control method, system, device, computer equipment and storage medium | |
| CN116185510A (en) | Partition switch starting method, array server and computer readable storage medium | |
| CN105406981A (en) | System and method used for upgrading router |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |