CN112257381B - AXI Crossbar design circuit verification method and system - Google Patents

AXI Crossbar design circuit verification method and system Download PDF

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CN112257381B
CN112257381B CN202011161201.1A CN202011161201A CN112257381B CN 112257381 B CN112257381 B CN 112257381B CN 202011161201 A CN202011161201 A CN 202011161201A CN 112257381 B CN112257381 B CN 112257381B
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information
port
axi crossbar
burst information
burst
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CN112257381A (en
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刘美云
胡胜发
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Guangzhou Ankai Microelectronics Co ltd
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Guangzhou Ankai Microelectronics Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention provides an AXI Crossbar design circuit verification method and system, wherein the method comprises the following steps: the design parameters and verification content are pre-configured, so that a first data packet with the number of the master devices and a second data packet with the number of the slave devices are generated, the first AXI Crossbar port and the second AXI Crossbar port are respectively driven to transmit and receive burst information, the burst information received by the first AXI Crossbar port and the second AXI Crossbar port is respectively monitored, the burst information is respectively stored into a first information queue and a second information queue after being added with identification numbers, and the burst information with the same identification numbers in the first information queue and the second information queue is compared. The embodiment of the invention realizes the universal, quick, flexible, full and effective automatic verification of the AXI Crossbar aiming at the full functional mode based on a verification platform of the number of parameterized components and a full-automatic monitoring mechanism, and saves a great amount of manpower, material resources and time cost.

Description

AXI Crossbar design circuit verification method and system
Technical Field
The invention relates to the field of cross interconnection bus design verification, in particular to a full-function mode AXI Crossbar design circuit verification method and system.
Background
AXI (Advanced eXtensible Interface ) is the most important part of the AMBA (Advance Microcontroller Bus Architecture) protocol proposed by ARM corporation for describing the manner in which data is transferred between a master device and a slave device. The AXI bus is a high-performance, high-bandwidth and low-delay-oriented On-Chip bus, is widely used as a bus System of an SOC (System On Chip) Chip based On an ARM high-performance processor, supports point-to-point connection between a master device and a slave device, and is designed into a full-function mode AXI Crossbar and widely applied in order to meet the requirement of cross interconnection of multiple master devices for accessing multiple slave devices.
At present, with the continuous expansion of chip scale, bus interconnection structures become more and more complex, more and different AXI Crossbar with M value and N value may be needed in different SOC chip architectures, and even the types of AXI Crossbar used in one SOC chip architecture become more and more, for example, only 1to2 types of 2 slave devices may be accessed by 1 master device before, but in the existing SOC chip architecture, a plurality of different M to N (M is the number of master devices and N is the number of slave devices) types of 1to2, 2to3, 3to1 and the like are used at the same time, so that the design function of the involved AXI Crossbar must be correct to ensure the normal operation of the SOC chip, and therefore, verification of each involved AXI Crossbar must be performed and the correctness of the function must be ensured. However, the existing AXI Crossbar circuit design verification method only aims at a specified number of master-slave devices, one set of verification environments can only verify one type, namely each type used needs to be verified independently, each verification needs to be modified to be suitable for a scene needing verification, if multiple types exist, multiple verification environments need to be built at the same time or the verification environments need to be disassembled continuously for verification, and the situation that any M master devices can access N slave devices is supported by the verification method in a universal sense is provided. Obviously, the existing verification method is applied to a verification scene of an AXI Crossbar using a plurality of different M values or N values at the same time, so that a great deal of time and labor are wasted, and in order to meet the current use requirements, a method for rapidly, fully, flexibly and effectively verifying the AXI Crossbar in a full-function mode of different M to N types is needed.
Disclosure of Invention
The invention aims to realize the full-function mode AXI Crossbar for verifying any different M (M is more than or equal to 1) master devices to access N (N is more than or equal to 1) slave devices quickly, fully, flexibly and effectively without changing or overlapping the verification environment.
In order to achieve the above object, it is necessary to provide a method and a system for verifying an AXI Crossbar design circuit.
In a first aspect, an embodiment of the present invention provides a method for verifying an AXI Crossbar design circuit, where the method includes the following steps:
pre-configuring design parameters and verification contents; the design parameters include a master device number and a slave device number;
generating a first data packet of the number of the master devices and a second data packet of the number of the slave devices according to the design parameters and the verification content respectively;
respectively driving a first AXI Crossbar port and a second AXI Crossbar port to send and receive burst information according to the first data packet and the second data packet;
respectively monitoring burst information received by the first AXI Crossbar port and the second AXI Crossbar port, adding an identification number to the burst information, and respectively storing the burst information added with the identification number into a first information queue and a second information queue;
and comparing the burst information with the same identification number in the first information queue and the second information queue.
Further, the step of generating the first data packet of the master device number and the second data packet of the slave device number according to the design parameters and the verification content respectively includes:
generating the first data packets of the number of the main devices according to the design parameters and the verification content; the first data packet comprises interface information of a main device corresponding to a first AXI Crossbar port;
generating said second data packets for said number of slave devices based on said design parameters and said verification content; the second data packet includes interface information of the slave device corresponding to the second AXI Crossbar port.
Further, the step of obtaining the first data packet and the second data packet to drive the first axicrossbar port and the second axicrossbar port to send and receive burst information respectively includes:
driving the first AXI Crossbar port to send according to the first data packet, and receiving second burst information from the second AXI Crossbar port, wherein the second burst information is generated in response to the first data packet;
and driving the second AXI Crossbar port to send according to the second data packet, and receiving first burst information from the first AXI Crossbar port, wherein the first burst information is generated in response to the second data packet.
Further, the step of monitoring the burst information received by the first AXI Crossbar port and the second AXI Crossbar port, adding an identification number to the burst information, and storing the burst information added with the identification number into a first information queue and a second information queue, respectively, includes:
respectively adding corresponding identification numbers according to a first AXI Crossbar port and a second AXI Crossbar port corresponding to the first burst information and the second burst information;
and respectively storing the first burst information and the second burst information added with the identification numbers into a first information queue and a second information queue.
Further, the step of comparing burst information having the same identification number in the first information queue and the second information queue includes:
comparing a first information queue with a second information queue, and acquiring the first burst information and the second burst information with the same identification number in the first information queue and the second information queue;
comparing whether the port data in the first burst information and the port data in the second burst information are completely consistent; if the functions are completely consistent, judging that the function design of the AXI Crossbar is correct, otherwise, judging that the function design of the AXI Crossbar is wrong; the port data sum includes burst length, burst size, burst type, read/write operation type, and address.
In a second aspect, an embodiment of the present invention provides an AXI Crossbar design circuit verification system, including:
the pre-configuration module is used for pre-configuring design parameters and verifying contents; the design parameters include a master device number and a slave device number;
the data generation module is used for respectively generating a first data packet of the number of the master devices and a second data packet of the number of the slave devices according to the design parameters and the verification content;
the driving module is used for respectively driving the first AXI Crossbar port and the second AXI Crossbar port to send and receive burst information according to the first data packet and the second data packet;
the monitoring module is used for respectively monitoring the burst information received by the first AXI Crossbar port and the second AXI Crossbar port, adding an identification number to the burst information, and respectively storing the burst information added with the identification number into a first information queue and a second information queue;
and the comparison module is used for comparing the burst information with the same identification number in the first information queue and the second information queue.
Further, the data generation module includes:
a first data generating module, configured to generate the first data packets of the number of primary devices according to the design parameters and the verification content;
and a second data generating module for generating the second data packets of the number of slave devices according to the design parameters and the verification content.
Further, the driving module includes:
the first driving module is used for driving the first AXI Crossbar port according to the first data packet, and receiving second burst information from the second AXI Crossbar port, wherein the second burst information is generated in response to the first data packet;
and the second driving module is used for driving the second AXI Crossbar port according to the second data packet, receiving first burst information from the first AXI Crossbar port, and generating the first burst information in response to the second data packet.
Further, the monitoring module includes:
the first monitoring module is used for adding a corresponding identification number according to a first AXI Crossbar port and a second AXI Crossbar port corresponding to the first burst information, and storing the first burst information added with the identification number into a first information queue;
and the second monitoring module is used for adding a corresponding identification number according to the first AXI Crossbar port and the second AXI Crossbar port corresponding to the second burst information, and storing the second burst information added with the identification number into a second information queue.
Further, the comparison module includes:
the first comparison module is used for comparing a first information queue with a second information queue and acquiring the first burst information and the second burst information which have the same identification number in the first information queue and the second information queue;
the second comparison module is used for comparing whether the port data in the first burst information and the port data in the second burst information are completely consistent; if the functions are completely consistent, the function design of the AXI Crossbar is judged to be correct, otherwise, the function design of the AXI Crossbar is judged to be incorrect.
The application provides a verification method and a verification system for an AXI Crossbar design circuit, by the method, a verification platform based on the number of parameterized components and a full-automatic monitoring mechanism are realized, and verification for the AXI Crossbar design in a full-function mode is realized. Compared with the prior art, the method ensures the flexibility, the sufficiency and the effectiveness of function verification of the AXI Crossbar design for accessing any number of slave devices to any number of master devices in the verification application of the AXI Crossbar in a full-function mode, ensures the universality and the rapidity of one-time verification of all possible M to N combination conditions in a set of verification environments, saves a large amount of manpower, material resources and time cost, and has great significance to the design verification work of the SOC chip architecture.
Drawings
FIG. 1 is a schematic diagram of an application scenario of a full function mode AXI Crossbar in an embodiment of the present invention;
FIG. 2 is a flow chart of a verification method of an AXI Crossbar design circuit in an embodiment of the present invention;
FIG. 3 is a flow chart of step S12 in FIG. 2 for generating a first and a second data packet;
FIG. 4 is a schematic flow chart of step S13 in FIG. 2 for driving an AXI Crossbar port to transmit and receive burst information;
FIG. 5 is a flow chart of the step S14 of FIG. 2 for monitoring burst information and storing the burst information in an information queue;
fig. 6 is a schematic flow chart of comparing burst information with the same identification number in step S15 in fig. 2;
FIG. 7 is a schematic diagram of a verification system for an AXI Crossbar design circuit in an embodiment of the present invention;
fig. 8 is a schematic diagram of the structure of the data generation module 72 in fig. 7;
fig. 9 is a schematic diagram of the structure of the driving module 73 in fig. 7;
FIG. 10 is a schematic diagram of the configuration of the monitoring module 74 of FIG. 7;
fig. 11 is a schematic structural view of the comparison module 75 in fig. 7;
FIG. 12 is a schematic diagram of an example of the axicrossbar authentication system of FIG. 7 running on a VMM platform.
Detailed Description
For the purpose of making the objects, technical solutions and advantageous effects of the present application more apparent, the present invention will be further described in detail with reference to the accompanying drawings and examples, and it should be understood that the examples described below are only illustrative of the present invention and are not intended to limit the scope of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The verification method of the AXI Crossbar design circuit provided by the invention can be applied to the verification of the full-function mode AXI Crossbar design function shown in figure 1. Wherein, M and N are integers greater than or equal to1, the specific values thereof may not be equal, i.e., the number of the master device and the slave device may be arbitrary, for example, the master device 1 represents the master device with the number 1, the master device M represents the master device with the number M, the slave device 1 represents the slave device with the number 1, the slave device N represents the slave device with the number N, the numbers 1, ┄, M and the numbers 1, ┄, N of the master device are only numbered sequentially for easy management, and have no other special meaning. The AXI Crossbar shown in fig. 1 supports the read-write operation of each AXI, and each master device or slave device can implement cross-connection with devices at the opposite end through connection with a port corresponding to the AXI Crossbar, and has the main functions of solving one of the master devices from M master devices and sending the one of the master devices to target slave devices of N slave devices, that is, any master device can implement access to any slave device connected with the same AXI Crossbar through connection with the AXI Crossbar.
In one embodiment, as shown in fig. 2, a verification method of an AXI Crossbar design circuit is provided, including the following steps:
s11, pre-configuring design parameters and verifying contents; the design parameters include a master device number and a slave device number;
the number of the master devices and the number of the slave devices are preconfigured according to actual verification requirements, namely, corresponding parameter values are set to be any integer greater than or equal to1 according to the type of AXI Crossbar to be verified, and the serial numbers of the master devices and the slave devices are given in sequence and are used for marking identification numbers on the monitored burst information subsequently. According to the method, in combination with an actual verification scene, a tester firstly sets the number parameters of master equipment and slave equipment as different macro definitions, then designs different test cases according to all types to be verified of AXI Crossbar related in an SOC chip, and only needs to modify macro definition values corresponding to the number parameters of the master equipment and slave equipment in the different test cases according to actual conditions so as to meet the requirements of verifying the types of the AXI Crossbar, and does not need to modify verification environments or additionally invest manpower to specially build different verification environments, so that the technical effect that different types of functional verification can be executed on the same set of verification environments is achieved, and the problem of universality of the verification method is solved. In addition, for the case that some data such as address bit width, data bit width, ID bit width and the like of the AXI in the AXI Crossbar are designed to be parameterized, or the case that the components involved in verification can use steady state data, similar methods of firstly setting relevant parameters as macro definition parameters in test cases and pre-configuring parameter values when the test case verification is executed can be adopted to achieve the effect that the component parameters are flexibly modified to adapt to different verification requirements, and a great deal of manpower, material resources and time cost can be saved for the actual verification work involving different types of AXI Crossbar.
S12, respectively generating a first data packet of the number of the master devices and a second data packet of the number of the slave devices according to the design parameters and the verification content;
the first data packet and the second data packet are randomly generated according to verification content, and are used for simulating information communicated between the master device and the slave device in a real scene, the specific content of the data packet can be preconfigured in a test case according to the requirement of a test scene, the first data packet which is used for being equal to the number of the master devices and is used for simulating communication of the master device is generated according to the requirement of a verification function, and the second data packet which is used for being equal to the number of the slave devices and is used for simulating communication of the slave device is generated.
S13, respectively driving a first AXI Crossbar port and a second AXI Crossbar port to send and receive burst information according to the first data packet and the second data packet;
the first AXI Crossbar port and the second AXI Crossbar port are AXI Crossbar ports corresponding to the master device and the slave device respectively. In the application, the first AXI Crossbar port and the second AXI Crossbar port are respectively the generic names of ports corresponding to AXI Crossbar connected with all the master devices and all the slave devices, the number and the number of the first AXI Crossbar port correspond to the number and the number of the master devices, the number and the number of the second AXI Crossbar port correspond to the number and the number of the slave devices, and the number is used as the basis for giving the corresponding identification number of the burst information and adding the burst information into the belonging information queue when the number is used for monitoring the burst information later.
S14, respectively monitoring the burst information received by the first AXI Crossbar port and the second AXI Crossbar port, adding an identification number to the burst information, and respectively storing the burst information added with the identification number into a first information queue and a second information queue;
taking into consideration that any first AXI Crossbar port and any second AXI Crossbar port can be communicated to ensure normal mutual access between any master device and any slave device, monitoring that burst information received by the first AXI Crossbar port comprises burst information sent by all second AXI Crossbar ports connected with the ports, and monitoring that burst information received by the second AXI Crossbar port comprises burst information sent by all first AXI Crossbar ports connected with the ports to ensure that full and comprehensive verification of a master device information receiving and transmitting function is realized. The first information queue and the second information queue are used for receiving and transmitting the mutual access burst information between the master device and the slave device, the number and the number of the first information queues are corresponding to the number and the number of the master device and are used for storing the first burst information sent by the corresponding master device and the received second burst information, and the number of the second information queues are corresponding to the number and the number of the slave devices and are used for storing the second burst information sent by the corresponding slave device and the received first burst information. The multi-information queue multi-thread processing mode of one device corresponding to one information queue ensures that the information of different devices is independent, is beneficial to the information extraction of the comparison verification of burst information of the follow-up master-slave devices, also ensures the information processing speed, and further ensures the high efficiency of verification work.
S15, comparing the burst information with the same identification number in the information queue.
In the embodiment of the application, considering that the function verification of the AXI Crossbar suitable for any number of master devices to access different types of slave devices is realized, the number of master devices, the design parameters of the AXIcrossbar and other component parameters and verification contents are flexibly configured in advance, the master devices with the required number are generated in a simulation mode according to the component parameters and the verification contents, corresponding burst information is received and transmitted, burst information signals are monitored at corresponding ports of the master devices connected with the AXI Crossbar, identification numbers of the corresponding burst information are given, the identification numbers of the corresponding burst information are stored in corresponding information queues, and the burst information of the same identification numbers of the master devices and the slave devices are compared according to the identification numbers, so that whether the function design of the AXI Crossbar is correct is judged. When the method is applied to an actual verification scene, the flexibility, the sufficiency and the effectiveness of function verification of the AXI Crossbar design for accessing any number of slave devices to any number of master devices are ensured, the universality and the rapidity of all possible MtoN combination conditions of one-time verification environment are ensured, and the method has great significance for the design verification work of the SOC chip architecture.
In one embodiment, as shown in fig. 3, the step S12 of generating the first data packet of the master device number and the second data packet of the slave device number according to the design parameters and the verification content includes:
s121, generating the first data packets of the number of the main devices according to the design parameters and the verification content; the first data packet comprises interface information of a main device corresponding to a first AXI Crossbar port;
the interface information of the master device corresponding to the first AXI Crossbar port includes control information and data information, the control information refers to instruction information for driving the port connected with the master device to send and receive information, the data information includes information for accessing the slave device and response information, and the data information is formed by encapsulating verification contents pre-configured in a test case according to actual verification requirements, such as information of which slave device needs to be sent, what content needs to be sent, and the like, in combination with the number of the master device at the label information sending end and the number of the slave device at the information destination end. Here, the data information refers specifically to information for accessing the slave device.
S122, generating the second data packets of the number of the slave devices according to the design parameters and the verification content; the second data packet includes interface information of the slave device corresponding to the second AXI Crossbar port.
The interface information of the slave device corresponding to the second AXI Crossbar port includes control information and data information, the control information refers to instruction information for driving the port connected with the slave device to send and receive information, the data information is information for responding to the master device, and the data information is formed by encapsulating verification content pre-configured in the test case according to actual verification requirements, if what content needs to be responded, and the like, by combining the number of the slave device at the label information sending end and the number of the master device at the information destination end.
In the embodiment, a first data packet and a second data packet corresponding to the number of the master device and the slave device are respectively generated based on the pre-configured design parameters and verification content, and the method that interface information is carried in the data packets is used for constructing the information of the designated number of the master device and the slave device based on AXI Crossbar communication, so that good basis is provided for subsequent information comparison verification, and the problem of flexibly configuring the verification content according to scene requirements is solved.
In one embodiment, as shown in fig. 4, the step S13 of acquiring the first data packet and the second data packet, and driving the first axicrossbar port and the second axicrossbar port to send and receive burst information respectively includes:
s131, driving the first AXI Crossbar port to send according to the first data packet, and receiving second burst information from the second AXI Crossbar port, wherein the second burst information is generated in response to the first data packet;
the second burst information is constructed according to the second data packet, and corresponds to the slave device, namely, response information sent by the second AXI Crossbar port when the slave device receives information of the master device is simulated.
And S132, driving the second AXI Crossbar port to transmit according to the second data packet, and receiving first burst information from the first AXI Crossbar port, wherein the first burst information is generated in response to the second data packet.
The first burst information is constructed according to the first data packet and corresponds to the master device, namely, data information and response information which are sent to the slave device by the analog master device through the first AXI Crossbar port.
In this embodiment, according to the method that the first data packet and the second data packet respectively drive the AXI Crossbar ports correspondingly connected to send burst information to the destination device, and the destination device receives the response information of the specified content after receiving the local burst information, the technical means of verifying the real scene of the AXI Crossbar interconnection and mutual access of the specified number of master devices based on the real scene of the AXI Crossbar interconnection and mutual access is fully and effectively simulated, so that the technical effects of effectively saving verification time and reducing verification failure probability are achieved.
In one embodiment, as shown in fig. 5, the step S14 of monitoring the burst information received by the first AXI Crossbar port and the second AXI Crossbar port, adding an identification number to the burst information, and storing the burst information after adding the identification number into the first information queue and the second information queue respectively includes:
s141, respectively adding corresponding identification numbers according to a first AXI Crossbar port and a second AXI Crossbar port corresponding to the first burst information and the second burst information;
the identification number of the burst information is mainly used for marking the source and the destination of the information, namely, the first burst information sent by the master device is added with the identification number formed by the number corresponding to the master device and the belonging number of the destination end slave device, and the second burst information sent by the slave device is added with the identification number formed by the number corresponding to the slave device and the belonging number of the destination end master device, so that the burst information comparison for subsequently extracting the same identification number is used for verifying whether the mutual access function between the master device and the slave device is normal or not.
S142, the first burst information and the second burst information added with the identification numbers are respectively stored in a first information queue and a second information queue.
In the embodiment, a full-automatic monitoring mechanism for monitoring the first AXI Crossbar port and the second AXI Crossbar port for receiving and transmitting burst information in real time is adopted, all the burst information is monitored and stored by combining the principle of adding corresponding identification numbers according to the first AXI Crossbar port and the second AXI Crossbar port corresponding to the burst information, the full-coverage monitoring method of the AXI Crossbar ports effectively ensures quick and correct pairing of ports in the subsequent comparison information, provides quick searching basis for accurate identification and confirmation of problem ports with errors in comparison, and further well ensures comprehensive and reliable verification of the AXI Crossbar design function method based on burst information comparison with the identification numbers.
In one embodiment, as shown in fig. 6, the step of comparing the burst information with the same identification number in the first information queue and the second information queue includes S15 including:
s151, comparing a first information queue with a second information queue, and acquiring the first burst information and the second burst information with the same identification number in the first information queue and the second information queue;
s152, comparing whether port data in the first burst information and port data in the second burst information are completely consistent; if the functions are completely consistent, judging that the function design of the AXI Crossbar is correct, otherwise, judging that the function design of the AXI Crossbar is wrong; the port data sum includes burst length, burst size, burst type, read/write operation type, and address.
The first burst information and the second burst information comprise data constructed according to verification content, and also comprise corresponding port data of an AXI Crossbar connected with the information sending device and the information receiving device, such as burst length, burst size, burst type, read-write operation instruction, address and other data information. The normal AXICrossbar interconnection transmitting function can ensure the consistency of transmitting and receiving information, and because the identical identification numbers indicate that the master and slave devices in intercommunication are identical, the data information of the first AXICrossbar port and the second AXICrossbar port contained in the information is completely consistent.
In the embodiment, based on the consistency of port information carried in the transceiving information of the interconnection equipment, the method of comparing whether the port data are consistent or not to determine whether the full-function mode AXI Crossbar function design passes verification is adopted, so that the quick, effective and full-coverage comparison of the port intercommunication information of all master equipment and slave equipment is realized, the sufficiency and the correctness of verification are ensured, and the verification efficiency is greatly improved.
Although the steps in the flowcharts described above are shown in order as indicated by arrows, these steps are not necessarily executed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders.
In one embodiment, as shown in FIG. 7, an AXI Crossbar design circuit verification system is provided, the system comprising:
a pre-configuration module 71 for pre-configuring design parameters and verifying content; the design parameters include a master device number and a slave device number;
a data generating module 72, configured to generate a first data packet of the number of master devices and a second data packet of the number of slave devices according to the design parameters and the verification content, respectively;
a driving module 73, configured to drive the first axicrossbar port and the second axicrossbar port to send and receive burst information according to the first data packet and the second data packet, respectively;
the monitoring module 74 is configured to monitor the burst information received by the first AXI Crossbar port and the second AXI Crossbar port, add an identification number to the burst information, and store the burst information with the added identification number into the first information queue and the second information queue, respectively;
and a comparison module 75, configured to compare burst information having the same identification number in the first information queue and the second information queue.
In one embodiment, as shown in fig. 8, the data generation module 72 further includes:
a first data generating module 721 for generating the first data packets of the number of the master devices according to the design parameters and the verification content;
a second data generating module 722, configured to generate the second data packets of the number of slave devices according to the design parameters and the verification content.
In one embodiment, as shown in fig. 9, the driving module 73 further includes:
a first driving module 731, configured to drive the first AXI Crossbar port according to the first data packet, and receive second burst information from the second AXI Crossbar port, where the second burst information is generated in response to the first data packet; the first driving module is used for simulating the main equipment, so that the first data packet contains control and data information of a main equipment interface connected with the first AXI Crossbar port;
a second driving module 732, configured to drive the second AXI Crossbar port according to the second data packet, and receive first burst information from the first AXI Crossbar port, where the first burst information is generated in response to the second data packet; the second driver module is configured to emulate a host device, and therefore, the second data packet includes control and data information of a host device interface connected to the second AXI Crossbar port.
In one embodiment, as shown in FIG. 10, the monitoring module 74 further includes:
a first monitoring module 741, configured to add a corresponding identification number according to the first AXI Crossbar port and the second AXI Crossbar port corresponding to the first burst information, and store the first burst information after the identification number is added into a first information queue;
and a second monitoring module 742, configured to add a corresponding identification number according to the first AXI Crossbar port and the second AXI Crossbar port corresponding to the second burst information, and store the second burst information after the identification number is added in a second information queue.
In one embodiment, as shown in fig. 11, the comparison module 75 further includes:
a first comparison module 751, configured to compare a first information queue and a second information queue, and obtain the first burst information and the second burst information with the same identification number in the first information queue and the second information queue;
a second comparison module 752 for comparing whether the port data in the first burst information and the second burst information are completely consistent; if the functions are completely consistent, the function design of the AXI Crossbar is judged to be correct, otherwise, the function design of the AXI Crossbar is judged to be incorrect.
The AXI Crossbar design circuit verification system described above is suitable for use with an automatic verification platform of a VMM or UVM, and in one embodiment, an example of the system running based on a VMM platform is given as shown in fig. 12.
The method comprises the steps that values of macro definition parameters M and N representing the number of master devices and the number of slave devices are configured in a verified test case (namely a pre-configuration module), and if some parameters such as address bit width, data bit width, ID bit width and the like of AXI in an AXI Crossbar are designed to be parameterized, the parameters are also pre-configured in the test case;
the first data generation module and the second data generation module of the data generation module respectively generate M first data packets and N second data packets according to the content constraint of the verification test case, wherein each first data packet contains control and data information of an ith main device interface, i=1, ┄ and M, and each second data packet contains response information of a jth slave device interface, j=1, ┄ and N;
a first driving module and a second driving module in the driving module respectively acquire corresponding first data packets and second data packets, simulate corresponding M main devices and N slave devices to drive corresponding AXI Crossbar ports to send and receive burst information;
a first monitoring module and a second monitoring module in the monitoring module respectively monitor interface signals of N slave devices connected with the AXI Crossbar of the M master device parts and interface signals of M master devices connected with the AXI Crossbar of the N slave device parts, give out an identification number to each burst information, and store the identification number into a corresponding first information queue and a corresponding second information queue according to the identification numbers;
and searching burst information with the same identification number in a first information queue corresponding to M master devices and a second information queue corresponding to N slave devices in the comparison module, then comparing the consistency of port data in the burst information, and judging that the AXI Crossbar function design is correct if the burst length, the burst size, the burst type, the read-write operation indication, the address and other data information in the burst information are completely consistent, otherwise, judging that the AXI Crossbar function design is wrong.
For specific limitations on the AXI Crossbar design circuit verification system, reference may be made to the above limitations on the AXI Crossbar design circuit verification method, and no further description is given here. The various modules in the AXI Crossbar design circuit verification system described above may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In summary, according to the method and the system for verifying the AXI Crossbar design circuit provided by the embodiment of the invention, the design parameters and verification contents are pre-configured, so that data packets corresponding to the numbers of the master device and the slave device are generated, the corresponding AXI Crossbar ports connected with the master device are driven to receive and transmit information, the burst information of the AXI Crossbar ports corresponding to all the master device and the slave device is monitored in a full-automatic mode, the identification numbers of the burst information are given and stored in the corresponding information queues, and then whether the AXI Crossbar functional design is correct is verified by comparing the consistency of the data of the burst information ports with the same identification numbers. When the method is applied to the design verification of the AXI Crossbar in the actual full-function mode, the function verification of the AXI Crossbar in different types can be realized by only modifying the design parameters and verification contents related to the related test cases of the verification platform without changing the verification environment or building the verification environment again, and the method is suitable for different automatic verification platforms such as a VMM (virtual machine), a UVM (virtual machine) and the like, so that the universal, quick, flexible, full and effective verification of the AXI Crossbar in the full-function mode is ensured, a large amount of manpower, material resources and time cost are saved, and the method has very great significance to the design verification work of the SOC chip architecture.
In this specification, each embodiment is described in a progressive manner, and all the embodiments are directly the same or similar parts referring to each other, and each embodiment mainly describes differences from other embodiments. In particular, for system embodiments, since they are substantially similar to method embodiments, the description is relatively simple, as relevant to see a section of the description of method embodiments. It should be noted that, any combination of the technical features of the foregoing embodiments may be used, and for brevity, all of the possible combinations of the technical features of the foregoing embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples represent only a few preferred embodiments of the present application, which are described in more detail and are not thereby to be construed as limiting the scope of the invention. It should be noted that modifications and substitutions can be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and substitutions should also be considered to be within the scope of the present application. Therefore, the protection scope of the patent application is subject to the protection scope of the claims.

Claims (10)

1. An AXI Crossbar design circuit verification method, characterized in that the method comprises the following steps:
pre-configuring design parameters and verification contents; the design parameters include a master device number and a slave device number;
generating a first data packet of the number of the master devices and a second data packet of the number of the slave devices according to the design parameters and the verification content respectively;
respectively driving a first AXI Crossbar port and a second AXI Crossbar port to send and receive burst information according to the first data packet and the second data packet;
respectively monitoring burst information received by the first AXI Crossbar port and the second AXI Crossbar port, adding an identification number to the burst information, and respectively storing the burst information added with the identification number into a first information queue and a second information queue; the burst information received by the first AXI Crossbar port comprises the burst information sent by all second AXI Crossbar ports connected with the port; the burst information received by the second AXI Crossbar port comprises the burst information sent by all the first AXI Crossbar ports connected with the port; the first information queue and the second information queue are queues for receiving and transmitting the mutual access burst information between the master device and the slave device, the number and the number of the first information queue correspond to the number and the number of the master device, and the number of the second information queue correspond to the number and the number of the slave device;
and comparing the burst information with the same identification number in the first information queue and the second information queue.
2. The AXI Crossbar design circuit verification method according to claim 1, wherein the step of generating the first data packet of the master device number and the second data packet of the slave device number according to the design parameters and the verification contents, respectively, includes:
generating the first data packets of the number of the main devices according to the design parameters and the verification content; the first data packet comprises interface information of a main device corresponding to a first AXI Crossbar port;
generating said second data packets for said number of slave devices based on said design parameters and said verification content; the second data packet includes interface information of the slave device corresponding to the second AXI Crossbar port.
3. The AXI Crossbar design circuit verification method according to claim 1, wherein the step of acquiring the first data packet and the second data packet to drive the first AXI Crossbar port and the second AXI Crossbar port to transmit and receive burst information, respectively, includes:
driving the first AXI Crossbar port to send according to the first data packet, and receiving second burst information from the second AXI Crossbar port, wherein the second burst information is generated in response to the first data packet;
and driving the second AXI Crossbar port to send according to the second data packet, and receiving first burst information from the first AXI Crossbar port, wherein the first burst information is generated in response to the second data packet.
4. The AXI Crossbar design circuit verification method according to claim 3, wherein the steps of monitoring burst information received by the first AXI Crossbar port and the second AXI Crossbar port, respectively, adding an identification number to the burst information, and storing the burst information after adding the identification number into the first information queue and the second information queue, respectively, include:
respectively adding corresponding identification numbers according to a first AXI Crossbar port and a second AXI Crossbar port corresponding to the first burst information and the second burst information;
and respectively storing the first burst information and the second burst information added with the identification numbers into a first information queue and a second information queue.
5. The AXI Crossbar design circuit verification method according to claim 4, wherein said step of comparing burst information having the same identification number in said first information queue and said second information queue includes:
comparing a first information queue with a second information queue, and acquiring the first burst information and the second burst information with the same identification number in the first information queue and the second information queue;
comparing whether the port data in the first burst information and the port data in the second burst information are completely consistent; if the functions are completely consistent, judging that the function design of the AXI Crossbar is correct, otherwise, judging that the function design of the AXI Crossbar is wrong; the port data includes burst length, burst size, burst type, read-write operation type, and address.
6. An AXI Crossbar design circuit verification system, said system comprising:
the pre-configuration module is used for pre-configuring design parameters and verifying contents; the design parameters include a master device number and a slave device number;
the data generation module is used for respectively generating a first data packet of the number of the master devices and a second data packet of the number of the slave devices according to the design parameters and the verification content;
the driving module is used for respectively driving the first AXI Crossbar port and the second AXI Crossbar port to send and receive burst information according to the first data packet and the second data packet;
the monitoring module is used for respectively monitoring the burst information received by the first AXI Crossbar port and the second AXI Crossbar port, adding an identification number to the burst information, and respectively storing the burst information added with the identification number into a first information queue and a second information queue; the burst information received by the first AXI Crossbar port comprises the burst information sent by all second AXI Crossbar ports connected with the port; the burst information received by the second AXI Crossbar port comprises the burst information sent by all the first AXI Crossbar ports connected with the port; the first information queue and the second information queue are queues for receiving and transmitting the mutual access burst information between the master device and the slave device, the number and the number of the first information queue correspond to the number and the number of the master device, and the number of the second information queue correspond to the number and the number of the slave device;
and the comparison module is used for comparing the burst information with the same identification number in the first information queue and the second information queue.
7. The AXI Crossbar design circuit verification system of claim 6, wherein said data generation module includes:
a first data generating module, configured to generate the first data packets of the number of primary devices according to the design parameters and the verification content;
and a second data generating module for generating the second data packets of the number of slave devices according to the design parameters and the verification content.
8. The AXI Crossbar design circuit verification system of claim 6, wherein said driver module includes:
the first driving module is used for driving the first AXI Crossbar port according to the first data packet, and receiving second burst information from the second AXI Crossbar port, wherein the second burst information is generated in response to the first data packet;
and the second driving module is used for driving the second AXI Crossbar port according to the second data packet, receiving first burst information from the first AXI Crossbar port, and generating the first burst information in response to the second data packet.
9. The AXI Crossbar design circuit verification system of claim 8, wherein said monitoring module includes:
the first monitoring module is used for adding a corresponding identification number according to a first AXI Crossbar port and a second AXI Crossbar port corresponding to the first burst information, and storing the first burst information added with the identification number into a first information queue;
and the second monitoring module is used for adding a corresponding identification number according to the first AXI Crossbar port and the second AXI Crossbar port corresponding to the second burst information, and storing the second burst information added with the identification number into a second information queue.
10. The AXI Crossbar design circuit verification system of claim 9, wherein said comparison module includes:
the first comparison module is used for comparing a first information queue with a second information queue and acquiring the first burst information and the second burst information which have the same identification number in the first information queue and the second information queue;
the second comparison module is used for comparing whether the port data in the first burst information and the port data in the second burst information are completely consistent; if the functions are completely consistent, the function design of the AXI Crossbar is judged to be correct, otherwise, the function design of the AXI Crossbar is judged to be incorrect.
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CN108733529A (en) * 2017-04-19 2018-11-02 龙芯中科技术有限公司 The verification method and device of plugging function between AXI crossbar switches
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