CN112002636A - 阵列基板、其制备方法以及显示面板 - Google Patents

阵列基板、其制备方法以及显示面板 Download PDF

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CN112002636A
CN112002636A CN202010781420.3A CN202010781420A CN112002636A CN 112002636 A CN112002636 A CN 112002636A CN 202010781420 A CN202010781420 A CN 202010781420A CN 112002636 A CN112002636 A CN 112002636A
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metal layer
layer
preparing
array substrate
metal
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曹祖强
戴超
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to PCT/CN2020/111188 priority patent/WO2022027741A1/zh
Priority to US17/263,897 priority patent/US20230238386A1/en
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Abstract

本发明提供一种阵列基板及其制备方法以及显示面板。在阵列基板制备方法中,采用叠层金属层制备源漏极层。叠层金属层包括层叠设置的第一金属层、第二金属层及第三金属层。通过对叠层的金属层进行两次蚀刻,使形成的源极和漏极中,第三金属层的宽度小于或等于第二金属层的宽度,且第三金属层的宽度小于第一金属层的宽度。以解决现有阵列基板中叠层金属电极存在底切现象的问题。

Description

阵列基板、其制备方法以及显示面板
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制备方法以及显示面板。
背景技术
在显示面板阵列工艺中,为兼顾面板开发设计需求与制程工艺特性,经常需要使用叠层金属电极结构。比如,为了避免驱动金属走线的电压压降,通常情况下会选择电阻率较小的铝(AL)作为走线金属。但是,因为铝在制程工艺中耐酸碱药液的能力较差,如图1所示,通常会在铝层2的上下层增加上层钛(Top Ti)3和下层钛(Bottom Ti)1,形成三明治结构,以保障金属电极在制程工艺中的稳定。然而,在后续的阵列工艺制程中,仍有多个制程因子会导致叠层金属侧边裸露的铝被溶解蚀刻。如图2所示,由于铝层2’上下增加的钛层化学性质较为稳定,这样会造成上层钛3和下层钛1不会被侧刻,仅裸露的叠层金属电极中的铝层2’被侧刻,形成“工”字形状的底切(undercut)形貌。叠层金属电极形成底切可能会造成多种产品不良,比如底切上方的上层钛发生剥离(peeling)可能造成相邻两个电极短路,进而导致显示不良。同时在后续的有机光阻制程中,由于底切形貌的存在,叠层金属电极两层钛层中间可能产生有机光阻残留,形成水汽入侵通道,造成封装失效。
因此,现有阵列基板中叠层金属电极存在底切现象的问题需要解决。
发明内容
本发明提供一种阵列基板及其制备方法以及显示面板,以缓解现有阵列基板中叠层金属电极存在底切现象的技术问题。
为解决上述问题,本发明提供的技术方案如下:
本发明实施例提供一种阵列基板制备方法,其包括以下步骤:步骤S10、制备有源层,包括提供一衬底基板,在所述衬底基板上制备有源层。步骤S20、制备栅极,包括在所述有源层上制备栅极绝缘层,并在所述栅极绝缘层上制备栅极。步骤S30、制备源漏极层,包括在所述栅极及所述栅极绝缘层上制备层间绝缘层,图案化所述层间绝缘层以形成第一过孔与第二过孔,并在所述第一过孔与所述第二过孔中制备叠层金属层作为源漏极层。其中,所述制备叠层金属层的步骤包括:步骤S31、在所述第一过孔、所述第二过孔及所述层间绝缘层覆盖层叠设置的第一金属层、第二金属层及第三金属层。步骤S32、接着对所述第一金属层、所述第二金属层及所述第三金属层进行黄光工艺形成所述叠层金属层。其中所述第三金属层的宽度小于或等于所述第二金属层的宽度,且所述第三金属层的宽度小于所述第一金属层的宽度。
在本发明实施例提供的阵列基板制备方法中,还包括以下步骤:步骤S40、制备像素电极,包括在所述源漏极层及所述层间绝缘层上制备平坦化层,在所述平坦化层上制备像素电极。
在本发明实施例提供的阵列基板制备方法中,所述第一金属层和所述第三金属层的材料为钛,所述第二金属层的材料为铝。
在本发明实施例提供的阵列基板制备方法中,在步骤S32中,所述形成所述叠层金属层包括以下步骤:步骤S321、在所述第三金属层上涂布光阻,并对所述光阻进行曝光显影形成光阻图案。步骤S322、以所述光阻图案为遮挡对所述第一金属层、所述第二金属层及所述第三金属层进行第一次蚀刻。步骤S323、对所述光阻图案进行灰化,使灰化的光阻图案的两侧裸露出部分所述第三金属层。步骤S324、以所述灰化的光阻图案为遮挡对所述第三金属层进行第二次蚀刻。步骤S325、剥离掉所述灰化的光阻图案。
在本发明实施例提供的阵列基板制备方法中,所述第一次蚀刻和所述第二次蚀刻均包括干法蚀刻。
在本发明实施例提供的阵列基板制备方法中,灰化所述光阻图案的灰化气体包括氧气。
在本发明实施例提供的阵列基板制备方法中,所述栅极采用所述叠层金属层制备。
本发明实施例还提供一种阵列基板,其包括在衬底基板上层叠设置的有源层、栅极绝缘层、栅极、层间绝缘层、源漏极层、平坦化层以及像素电极。其中,所述层间绝缘层包括第一过孔与第二过孔。所述源漏极层包括源极和漏极,且设置于所述第一过孔与所述第二过孔中。所述源极和所述漏极分别透过所述第一过孔和所述第二过孔与所述有源层接触。所述源极和所述漏极均包括层叠设置在所述第一过孔与所述第二过孔中及所述层间绝缘层上的叠层金属层。所述叠层金属层包括第一金属层、第二金属层及第三金属层。所述第三金属层的宽度小于或等于所述第二金属层的宽度,且所述第三金属层的宽度小于所述第一金属层的宽度。
在本发明实施例提供的阵列基板中,所述第一金属层和所述第三金属层的材料为钛,所述第二金属层的材料为铝。
本发明实施例还提供一种显示面板,其包括前述实施例其中之一的阵列基板。
本发明的有益效果为:本发明提供的阵列基板及其制备方法以及显示面板中,源漏极层采用叠层金属层制备。叠层金属层包括层叠设置的第一金属层、第二金属层及第三金属层。通过对第三金属层进行两次蚀刻,使形成的叠层金属层中,第三金属层的宽度小于或等于第二金属层的宽度,且第三金属层的宽度小于第一金属层的宽度。避免了对叠层金属层蚀刻后出现底切的问题。进而避免了第三金属层剥离造成相邻两个电极短路产生显示不良。同时在后续有机光阻制程中,第一金属层和第三金属层之间不会产生有机光阻残留,避免了水汽入侵造成的封装失效。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为现有技术中叠层金属层的膜层结构示意图;
图2为现有技术中叠层金属层出现底切现象的膜层结构示意图;
图3为本发明实施例提供的阵列基板制备方法的流程示意图;
图4至图14为本发明实施例提供的阵列基板制备方法中各步骤制得膜层结构示意图;
图15为本发明实施例提供的叠层金属层制备方法的流程示意图;
图16为本发明实施例提供的制备叠层金属层的黄光工艺流程示意图;
图17为本发明实施例提供的显示面板的第一种结构示意图;
图18为本发明实施例提供的显示面板的第二种结构示意图。
具体实施方式
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。在附图中,为了清晰理解和便于描述,夸大了一些层和区域的厚度。即附图中示出的每个组件的尺寸和厚度是任意示出的,但是本发明不限于此。
在一种实施例中,提供一种阵列基板制备方法,如图3所示,其包括以下步骤:
步骤S10、制备有源层,包括提供一衬底基板10,在所述衬底基板10上制备有源层20,如图4所示。
具体的,所述衬底基板包括玻璃基板或柔性基板等。
进一步的,在所述衬底基板上制备有源层前,可以在所述衬底基板上制备阻挡层及缓冲层,以保护所述衬底基板上后续制备的各膜层。本发明不再对此详细说明。
进一步的,所述有源层的材料包括非晶硅(Amorphous Silicon,a-Si)或低温多晶硅(Low Temperature Poly Silicon,LTPS)等。
进一步的,以非晶硅为例,在所述衬底基板上制备整层的非晶硅。然后对整层的非晶硅进行黄光工艺形成有源层图案,接着对有源层图案两侧的非晶硅进行离子掺杂,形成掺杂区21,位于两侧掺杂区之间的为沟道区22,如图4所示的有源层20包括掺杂区21和沟道区22。
步骤S20、制备栅极,包括在所述有源层上制备栅极绝缘层,并在所述栅极绝缘层上制备栅极。
具体的,如图5所示,在所述有源层20及所述衬底基板10上制备栅极绝缘层30。所述栅极绝缘层30的材料包括氧化硅、氮化硅、氮氧化硅等无机材料。
进一步的,在所述栅极绝缘层30上制备一层金属薄膜,并对所述金属薄膜进行黄光工艺,形成栅极40。具体的,所述金属薄膜的材料包括铜、钼等金属或者其合金。
参照图3及图15,步骤S30、制备源漏极层,包括在所述栅极及所述栅极绝缘层上制备层间绝缘层,图案化所述层间绝缘层以形成第一过孔与第二过孔,并在所述第一过孔与所述第二过孔中制备叠层金属层作为源漏极层。其中,如图15所示,所述制备叠层金属层的步骤包括:步骤S31、在所述第一过孔、所述第二过孔及所述层间绝缘层覆盖层叠设置的第一金属层、第二金属层及第三金属层。步骤S32、接着对所述第一金属层、所述第二金属层及所述第三金属层进行黄光工艺形成所述叠层金属层。其中所述第三金属层的宽度小于或等于所述第二金属层的宽度,且所述第三金属层的宽度小于所述第一金属层的宽度。
具体的,如图6所示,在所述栅极40及所述栅极绝缘层30上制备层间绝缘层50。所述层间绝缘层50的材料包括氧化硅、氮化硅、氮氧化硅等无机材料。
进一步的,采用黄光工艺在所述层间绝缘层50上设置第一过孔51和第二过孔52。所述第一过孔51及所述第二过孔52贯穿所述层间绝缘层50及部分所述栅极绝缘层30,以裸露出所述有源层20的掺杂区21。
进一步的,请结合参照图6和图7,在所述层间绝缘层50上及所述第一过孔51与所述第二过孔52中制备叠层金属层作为源漏极层。
具体的,如图7所示,制备叠层金属层包括在所述第一过孔、所述第二过孔及所述层间绝缘层上依次层叠沉积第一金属层611、第二金属层612及第三金属层613。其中所述第一金属层611和所述第三金属层613的材料为钛,所述第二金属层612的材料为铝。
进一步的,对所述第一金属层611、所述第二金属层612及所述第三金属层613进行黄光工艺形成所述叠层金属层。
具体的,请参照图8及图16,如图16所示,形成所述叠层金属层的黄光工艺包括:步骤S321、在所述第三金属层613上涂布光阻,并对所述光阻进行曝光显影形成光阻图案90,如图8所示。具体的,所述光阻包括正性光阻或负性光阻。
进一步的,步骤S322、以所述光阻图案90为遮挡对所述第一金属层611、所述第二金属层612及所述第三金属层613进行第一次蚀刻。具体的,第一次蚀刻可以采用干法蚀刻。未被所述光阻图案90遮挡的所述第一金属层611、所述第二金属层612及所述第三金属层613全部被蚀刻掉,形成如图9所示的经过第一次蚀刻后的第一金属层611’、第二金属层612’及第三金属层613’。
进一步的,步骤S323、对所述光阻图案90进行灰化,使灰化的光阻图案91的两侧裸露出部分所述第三金属层613’,如图10所示。
具体的,采用氧气或其他灰化气体对所述光阻图案90进行灰化。所述光阻图案两侧灰化掉的宽度,可以根据所述第二金属层612’在后续制程中被侧刻掉的宽度来设计。即所述第二金属层612’在后续制程中被侧刻掉的宽度小于或等于所述光阻图案90两侧灰化掉的宽度。
进一步的,步骤S324、以所述灰化的光阻图案91为遮挡对裸露的所述第三金属层613’进行第二次蚀刻,以裸露出部分所述第二金属层612’,形成如图11所示的第一金属层611’、第二金属层612’及经过第二次蚀刻后的第三金属层613”。
具体的,请结合参照图10和图11,可以采用干法蚀刻对裸露的所述第三金属层613’进行第二次蚀刻,使所述第三金属层613’裸露在所述灰化的光阻图案91之外的部分全部被蚀刻掉,以裸露出部分第二金属层612’。当然的,在对裸露的第三金属层613’进行蚀刻时,可能会蚀刻掉部分第二金属层612’。
进一步的,经过第二次蚀刻后的第三金属层613”的宽度W3小于所述第一金属层611’的宽度W1。
进一步的,步骤S325、使用光阻剥离液剥离掉所述灰化的光阻图案91,形成如图12所示膜层结构示意图。
需要说明的是,图12所示的叠层金属层61不是所述源漏极层的最终形态。因在后续阵列制程中,裸露出来的第二金属层612’会被多个制程因子给刻蚀掉。比如使用的碱性显影液或酸性蚀刻液等。裸露出来的第二金属层612’被蚀刻掉后形成如图13所示的结构,图13所示出的叠层金属层也即所述源漏极层60的最终形态。所述源漏极层60包括源极62和漏极63,所述源极62和所述漏极63分别透过所述第一过孔和所述第二过孔与所述有源层20的掺杂区21接触。在图13中,所述第三金属层613”的两侧与所述第二金属层612”的两侧平齐。也即所述第三金属层613”的宽度与所述第二金属层612”的宽度相等。当然的,因受制程因子不同程度的影响,所述第三金属层613”的宽度也可能小于所述第二金属层612”的宽度。
参照图3,阵列基板制备方法还包括步骤S40、制备像素电极,包括在所述源漏极层及所述层间绝缘层上制备平坦化层,在所述平坦化层上制备像素电极。
具体的,如图14所示,在所述源漏极层60及所述层间绝缘层50上制备平坦化层70。并采用黄光工艺在所述平坦化层70上设置第三过孔71,所述第三过孔71贯穿所述平坦化层70至所述源漏极层60的漏极63。
进一步的,在所述平坦化层70上制备像素电极80,所述像素电极80通过所述第三过孔71连接所述源漏极层60的漏极63,制得如图14所示阵列基板100。
在另一种实施例中,与上述实施例不同的是,所述栅极也可以使用所述叠层金属层制备,且采用与制备源、漏极同样的工艺方法,使栅极的叠层金属层形态和源、漏极的叠层金属层形态相同。也即避免叠层金属层出现底切现象。具体制备步骤请参照制备源漏极层时的步骤,其他说明请参照上述实施例,在此不再赘述。
在一种实施例中,提供一种阵列基板100,如图14所示,其包括衬底基板10、有源层20、栅极绝缘层30、栅极40、层间绝缘层50、源漏极层60、平坦化层70及像素电极80。所述有源层20,设置于所述衬底基板10上。所述栅极绝缘层30,覆于所述有源层20及所述衬底基板10上。所述栅极40,设置于所述栅极绝缘层30上。所述层间绝缘层50,覆于所述栅极40及所述栅极绝缘层30上,且包括第一过孔和第二过孔。所述源漏极层60包括源极62和漏极63,且设置于所述所述第一过孔与所述第二过孔中。所述源极62和所述漏极63分别透过所述第一过孔和所述第二过孔与所述有源层20接触。所述平坦化层70,覆于所述源漏极层60及所述层间绝缘层50上。所述像素电极80,设置于所述平坦化层70上。其中,所述源极62和所述漏极63均包括层叠设置在所述第一过孔与所述第二过孔中及所述层间绝缘层50上的叠层金属层。所述叠层金属层包括第一金属层611’、第二金属层612”及第三金属层613”。所述第三金属层613”的宽度小于或等于所述第二金属层612”的宽度(如图14示出的所述第三金属层613”的宽度等于所述第二金属层612”的宽度),且所述第三金属层613”的宽度小于所述第一金属层611’的宽度。
具体的,所述第一金属层和所述第三金属层的材料为钛,所述第二金属层的材料为铝。
在一种实施例中,提供一种显示面板,其包括上述实施例的阵列基板。
具体的,显示面板可以为液晶显示面板,如图17所示,液晶显示面板1000包括阵列基板100、与阵列基板100相对设置的彩膜基板200以及位于所述阵列基板100和所述彩膜基板200之间的多个液晶分子300。
具体的,显示面板还可以为OLED显示面板,如图18所示,OLED显示面板1001包括阵列基板100、设置于所述阵列基板100上的发光功能层400以及设置于所述发光功能层400上的封装层500。
根据上述实施例可知:
本发明提供一种阵列基板及其制备方法以及显示面板,阵列基板的源漏极层采用叠层金属层制备。叠层金属层包括层叠设置的第一金属层、第二金属层及第三金属层。通过对第三金属层进行两次蚀刻,使形成的叠层金属层中,第三金属层的宽度小于或等于第二金属层的宽度,且第三金属层的宽度小于第一金属层的宽度。避免了对叠层金属层蚀刻后出现底切的问题。进而避免了第三金属层剥离造成相邻两个电极短路产生显示不良。同时在后续有机光阻制程中,第一金属层和第三金属层之间不会产生有机光阻残留,避免了水汽入侵造成的封装失效。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种阵列基板制备方法,其特征在于,包括以下步骤:
步骤S10、制备有源层,包括提供一衬底基板,在所述衬底基板上制备有源层;
步骤S20、制备栅极,包括在所述有源层上制备栅极绝缘层,并在所述栅极绝缘层上制备栅极;以及
步骤S30、制备源漏极层,包括在所述栅极及所述栅极绝缘层上制备层间绝缘层,图案化所述层间绝缘层以形成第一过孔与第二过孔,并在所述第一过孔与所述第二过孔中制备叠层金属层作为源漏极层,其中,所述制备叠层金属层的步骤包括:步骤S31、在所述第一过孔、所述第二过孔及所述层间绝缘层覆盖层叠设置的第一金属层、第二金属层及第三金属层;步骤S32、接着对所述第一金属层、所述第二金属层及所述第三金属层进行黄光工艺形成所述叠层金属层,其中,所述第三金属层的宽度小于或等于所述第二金属层的宽度,且所述第三金属层的宽度小于所述第一金属层的宽度。
2.根据权利要求1所述的阵列基板制备方法,其特征在于,还包括以下步骤:
步骤S40、制备像素电极,包括在所述源漏极层及所述层间绝缘层上制备平坦化层,在所述平坦化层上制备像素电极。
3.根据权利要求1所述的阵列基板制备方法,其特征在于,所述第一金属层和所述第三金属层的材料为钛,所述第二金属层的材料为铝。
4.根据权利要求1所述的阵列基板制备方法,其特征在于,在步骤S32中,所述形成所述叠层金属层包括以下步骤:
步骤S321、在所述第三金属层上涂布光阻,并对所述光阻进行曝光显影形成光阻图案;
步骤S322、以所述光阻图案为遮挡对所述第一金属层、所述第二金属层及所述第三金属层进行第一次蚀刻;
步骤S323、对所述光阻图案进行灰化,使灰化的光阻图案的两侧裸露出部分所述第三金属层;
步骤S324、以所述灰化的光阻图案为遮挡对所述第三金属层进行第二次蚀刻;以及
步骤S325、剥离掉所述灰化的光阻图案。
5.根据权利要求4所述的阵列基板制备方法,其特征在于,所述第一次蚀刻和所述第二次蚀刻均包括干法蚀刻。
6.根据权利要求4所述的阵列基板制备方法,其特征在于,灰化所述光阻图案的灰化气体包括氧气。
7.根据权利要求1所述的阵列基板制备方法,其特征在于,所述栅极采用所述叠层金属层制备。
8.一种阵列基板,其特征在于,包括:
衬底基板;
有源层,设置于所述衬底基板上;
栅极绝缘层,覆于所述有源层及所述衬底基板上;
栅极,设置于所述栅极绝缘层上;
层间绝缘层,覆于所述栅极及所述栅极绝缘层上且包括第一过孔与第二过孔;
源漏极层,包括源极和漏极,且设置于所述第一过孔与所述第二过孔中,所述源极和所述漏极分别透过所述第一过孔和所述第二过孔与所述有源层接触;
平坦化层,覆于所述源漏极层及所述层间绝缘层上;以及
像素电极,设置于所述平坦化层上;
其中,所述源极和所述漏极均包括层叠设置在所述第一过孔与所述第二过孔中及所述层间绝缘层上的叠层金属层,所述叠层金属层包括第一金属层、第二金属层及第三金属层,所述第三金属层的宽度小于或等于所述第二金属层的宽度,且所述第三金属层的宽度小于所述第一金属层的宽度。
9.根据权利要求8所述的阵列基板,其特征在于,所述第一金属层和所述第三金属层的材料为钛,所述第二金属层的材料为铝。
10.一种显示面板,其特征在于,包括如权利要求8至9任一项所述的阵列基板。
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